JPS6037168A - Manufacture of mos field effect transistor - Google Patents

Abstract

PURPOSE:To enable to control correctly impurity distribution and junction depth of a diffusion layer at manufacture of an MOS field effect transistor by a method wherein after doping impurities are implanted to the source, drain formation programing regions of a substrate, a process to drive in impurities up the the desired depth, and a process to make a gate oxide film to grow on the surface of the substrate are performed at the same time. CONSTITUTION:Boron ions 10 to act as acceptors are implanted according to the vapor phase diffusion method to the source, drain formation programing regions of an N type silicon substrate 1 [the figure (a)], then the silicon surface of a gate formation programing region 11 is also exposed according to selective etching of an oxide film 2 [the figure (b)], heat treatment is performed in a dry oxigen atmosphere to form a gate oxide film 4, and P type source, drain regions 31, 32 are formed [the figure (c)]. Then source, drain electrodes 51, 52 and a gate electrode 53 are formed according to aluminum metalization, and the surface is covered with a passivation film 6. The source, drain regions 31, 32 are formed at the process shown with the figure (c), and because they are not heated hereafter, impurity distribution and junction depth are not changed to make correct control to possible.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a method of manufacturing an MO8m field effect transistor, for example, having an aluminum gate, without using a self-aligned diffusion method.

[Prior art and its problems]

In the fabrication of MO8 field effect transistors having aluminum gates, a gate oxidation step is performed to assist in the formation of the diffusion region due to the high melting point of the gate. FIG. 1 shows such five manufacturing steps.
After depositing the oxide film 2 by the method, windows 21 and 22 are opened in the regions where the source and the train are to be formed using photo technology, and then impurities 10 are implanted into the substrate 1 by the vapor phase cup method. Further, a drive-in process is performed to form source and drain diffusion layers 31 and 32 by diffusing to a desired depth in the substrate (bl. Next, the oxide film 2, which has become somewhat thick during the diffusion and doubling process, is photophotographed. The silicon/surface of the intended gate region 11 is exposed by selective etching using a technique (C), and the gate oxide film 4 is formed on the silicon surface region 11 by a gate oxidation process (dl. After this, the source and drain layers are The silicon surface of the / region is exposed, and a source, drain/electrode 51, 52 and gate electrode 53 are provided on the aluminum layer 5, and then covered with a film 6 made of, for example, phosphosilicate glass. do(@)
. However, this method has the disadvantage that it is difficult to control the diffusion layer profile, such as fluctuations in the impurity diffusion oxidation process formed in the drive-in process shown in FIG. 1(C), and the depth is too deep.

[Purpose of the invention]

It is an object of the present invention to eliminate the above-mentioned drawbacks and to provide a manufacturing method that allows more accurate control of the formation of the source and drain regions of MO8 WFETs and allows the formation of shallow junctions.

[Key points of the invention]

The present invention involves implanting doping impurities into the surface layer of the source and drain regions of a semiconductor substrate, exposing the surface of the semiconductor substrate in the gate region, and then, in the same heating process, diffusing the impurity to a predetermined depth and draining the impurity into the gate region. The above objective is achieved by forming a gate oxide film on the substrate.

[Embodiments of the invention]

FIG. 2 shows the process of one embodiment of the present invention, and shows the steps (a) in FIG.
In the same way as l, for example, the syn concentration 1t×1015a
(The n-type silicon substrate 1 is injected with boron IO in the source and drain regions by vapor phase diffusion.) Then, the oxide film 2 is selectively etched to remove the silicon surface of the silicate region 11. (b) and heat treated at 1100°C for 50 minutes in a dry oxygen atmosphere.
．． A gate oxide film 4 with a thickness of 11 μm is formed, and a surface concentration of 3×10!9c+a−3 and a junction depth of 2− are formed.
1) Form P-type source and drain regions 31 and 32 of an (C).

Next, source and drain electrodes 51, 52, and gate electrodes 53 are formed on an aluminum metal sheet, as in the case of No. 111(e), and covered with a padding film 6. The source and drain regions 31 and 32 are shown in FIG.
Since it is formed in the step shown in C) and is not heated thereafter, the impurity distribution, junction, and depth do not change, allowing accurate control.

In the above embodiment, doping impurities were implanted into the surface layer by vapor phase diffusion, but ion implantation may also be used, and gate oxidation is performed simultaneously with the driving process of the implanted impurities.

The invention can also be applied to the manufacture of 0MO8ICs. In that case, for example, impurities are introduced into a part of an n-type semiconductor substrate to form a P-well, and after vapor phase diffusion of acceptors into the original part of the n-type substrate and donors into the p-well part, the p-channel and The semiconductor surface of the gate planned region on the n-channel is exposed, and the gate oxidation of the rain exposed surface is performed in accordance with the drive-in process for both impurities.

〔Effect of the invention〕

According to the present invention, after implanting doping impurities into the source and drain regions of a semiconductor substrate, the process of driving in the impurities to a desired depth and the process of growing a gate oxide film on the substrate surface are performed simultaneously. In addition to being able to accurately control the impurity distribution and junction depth of the diffusion layer, this method also has the advantage of reducing the number of manufacturing steps, which is extremely effective.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing the steps of a conventional MOSFET manufacturing method, and FIG. 2 is a cross-sectional view showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 31; 32... Source, drain region, 4... Gate oxide film, 10... Impurity. Figure 1 Figure 2 F

Claims (1)

[Claims] 1) Doping impurities are implanted into the surface layer of the source and drain regions of the semiconductor substrate to expose the semiconductor substrate surface in the gate region, and then, in the same heating step, the impurity is diffused to a predetermined depth and the gate region is implanted. 1. A method for manufacturing an MO8 field effect transistor, comprising forming a gate oxide film in a region.