JPS6035543A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable the electrical connection of a back surface of the element with a metallic conductor layer by a method wherein after the metallic conductor layer on a surface of an organic insulating film substrate in an element mounting region is removed, said organic insulating film of substrate in this region is removed to the metallic conductor on the back surface so as to form a recess and the element is mounted in this recess. CONSTITUTION:A glass epoxy substrate whose both surfaces are covered with Cu is prepared and a through hole 13 is opened on the desired position of said substrate. After that, the overall plating is performed by electroless plating thereby coating the inner wall of the through hole 13 with a Cu layer 12. Next, the desired Cu pattern 12'' is formed by photolithography and etching techniques on the both surfaces of the glass epoxy substrate. The Cu layer on a front surface is removed whereas the Cu layer on a back surface is left. Next, the glass epoxy of substrate in a dice mounting region is removed to the thin Cu layer on the back surface so as to form a recess 14. Next, the surface of the Cu pattern 12'' is coated with an Ni-Au plating layer to form a conductor pattern 15, after which a dice 16 is mounted in the recess 14 and electrodes are connected to the conductor pattern 15 by a wire 17.

Description

[Detailed Description of the Invention] (Technical Field) The present invention relates to a method for manufacturing a semiconductor device, and more particularly, a special backplane of a printed circuit board type using an organic insulating film, which is easy to handle and inexpensive, in place of a ceramic substrate. This relates to a manufacturing method.

(Prior art) Special printed circuit board type packages based on organic insulating films, such as glass epoxy, have already been used in L for electronic watches.
It is widely used as an SI backso. Initially, three to five layer ceramic substrates were used for LSI backnos for electronic watches, but as the packaging density of LSIs increased, the wiring pattern on the substrate became simpler.
Since double-sided wiring boards have become the main type, it has become possible to use glass epoxy printed circuit boards, which are easy to handle and inexpensive.

FIG. 1 shows a conventional method for manufacturing a glass epoxy printed circuit board type double-sided wiring package.

In FIG. 1(a), 1 is a glass epoxy substrate with a thickness of about 1 mm, and 2 is a glass epoxy substrate with a thickness of about 35 to 7 mm formed on both sides.
It is a thin Cu layer of about 0μ. In this way, first, a double-sided CLI-covered glass epoxy substrate is prepared.

Next, place the glass epoxy board at the desired position (see Figure 1).
Drill through hole 3 as shown in b).

Thereafter, by electroless plating with ωiCu, a Cu layer 2' is also deposited on the inner wall of the through hole 3, as shown in FIG. 1(e).

Next, Figure 1(d) was created using photoengraving technology and etching technology.
A desired Cu pattern 21/ is formed on both sides of the glass epoxy substrate 1 as shown in FIG.

Thereafter, a Ni--Au plating layer is deposited on the surface of the +Cu pattern 2, thereby completing the formation of the conductor pattern Vζ. The completed conductor pattern is shown in Figure 1 (e
) is shown with the reference numeral 4.

Next, about 50% of the glass epoxy substrate 1 in the die mounting area is
A concave counterbore is formed to a depth of approximately 0 μm to form four portions 5 as shown in FIG. 1(f).

Then, a die 6 is adhered to the four parts 5 as shown in FIG. 1(g), and each electrode of the die 6 is connected to the conductive pattern 4 by a wire 7.

In such a conventional manufacturing method, the glass epoxy material is exposed at the bottom of the recess 5. Therefore, electrical connection between the back surface of the dice 6 and the conductor pattern 4 was impossible.

(Object of the Invention) The present invention has been made in view of the above points, and provides a method for manufacturing a semiconductor device that enables electrical connection between the back surface of a semiconductor element (dice) and a metal conductor layer (conductor pattern). The purpose is to

(Example) An embodiment of the present invention will be described below with reference to FIG.

In FIG. 2(a), 11 is a glass epoxy substrate (organic insulating film substrate) with a thickness of about 0.5 mm, and 121 is a thin Cu layer (about 35 to 70 μm thick) formed on its surface.
122 is a thin film Cu layer formed on the back surface of the glass epoxy substrate 11 and having a thickness of about 70 to 140 μm and about twice the diameter of the Cu layer 121. metal conductor layer).

In this way, first, a double-sided Cu-clad glass epoxy substrate is prepared.

Next, place the glass epoxy board at the desired position (see Figure 2).
Flip through hole 13 as shown in b).

Then, by electroless plating the entire surface with Cu, the through holes 1 are formed as shown in FIG. 2(c).
A Cu layer 12' is also deposited on the inner wall of No.3.

Next, Figure 2(d) was created using photoengraving technology and etching technology.
As shown in FIG. 2, desired Cu patterns 12 are formed on both sides of the glass epoxy substrate 11. Here, in the die mounting area (semiconductor element mounting area).

While removing the Cu layer on the surface of the glass epoxy substrate 11,
The Cu layer on the back surface of the glass epoxy substrate 11 is left.

Next, the substrate glass epoxy in the die mounting area is hollowed out in a concave shape until it reaches the thin Cu layer on the back side, as shown in Figure 2 (e).
) A recess 14 is formed as shown in FIG. When the four parts 14 are formed in this way, the Cu layer (part of the Cu pattern 12'') is exposed on the entire surface at the bottom.

Next, the formation of the conductor pattern is completed by depositing a Ni--Au plating layer on the surface of the Cu pattern 12.' including this exposed surface. The completed conductor pattern is shown in FIG. 2(f) with reference numeral 15.

Finally, in the four parts 14 of the die mounting area (see Fig. 2ω)
As shown in FIG. 1, a die 16 is mounted on the substrate, and each electrode of the die 16 is connected to the conductor pattern 15 by a wire 17. In addition,
Mounting of the dice 16 is carried out by attaching the back surface of the dice 16 to the conductor layer (part of the conductor pattern 15) at the bottom of the recess 14 using a conductive paste or a conductive connecting agent.

(Effects of the Invention) As is clear from the above embodiment, in the method of the present invention, after removing the metal conductor layer on the surface of the organic insulating film substrate in the semiconductor element mounting area, the organic insulating film in the same area is removed. , a concave portion is formed by removing the surface layer until it reaches the metal conductor layer on the back surface. Therefore, if the metal conductor layer is exposed at the bottom of the four parts and the semiconductor element is mounted in the recess, the back side of the semiconductor element can be electrically connected to the gold JUi conductor layer (conductor pattern). Become.

(Other Examples) In the above embodiment, a glass epoxy substrate was used as the organic insulating film substrate, but a bismaleimide triazone tsukuba substrate or the like may be used instead of the glass epoxy substrate.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a conventional method for manufacturing a double-sided wiring package of the glass epoxy type printed circuit board type, and FIG. 2 is a sectional view showing an embodiment of the method for manufacturing a semiconductor device of the present invention. 11...Glass epoxy substrate, 12. ．． 122...
Thin film Cu layer, 12//...Cu pattern, 14...
Recessed portion, 15...conductor pattern, 16...dice. Patent applicant: Oki Electric Industry Co., Ltd. Figure 1 Figure 2

Claims (1)

[Claims] A process of preparing an organic insulating film substrate with a metal conductor layer formed on the front and back surfaces, and after removing the surface metal conductor layer in the semiconductor element mounting area, the substrate organic insulating film in the same area is replaced with a metal conductor layer on the back side. A method for manufacturing a semiconductor device, comprising the steps of forming a recess by removing a trench that reaches a layer, and mounting a semiconductor element in the recess.