JPH1117331A - Manufacture of flexible circuit board - Google Patents
Manufacture of flexible circuit boardInfo
- Publication number
- JPH1117331A JPH1117331A JP18573697A JP18573697A JPH1117331A JP H1117331 A JPH1117331 A JP H1117331A JP 18573697 A JP18573697 A JP 18573697A JP 18573697 A JP18573697 A JP 18573697A JP H1117331 A JPH1117331 A JP H1117331A
- Authority
- JP
- Japan
- Prior art keywords
- bumps
- circuit board
- bump
- forming
- conductive foil
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、可撓性回路基板の
製造法に関し、特には、メッキリ−ド等を用いることな
くICチップ等の回路部品との接続の為のバンプを形成
可能な可撓性回路基板の製造法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a flexible circuit board, and more particularly to a method for forming a bump for connecting to a circuit component such as an IC chip without using a plating lead or the like. The present invention relates to a method for manufacturing a flexible circuit board.
【0002】[0002]
【従来の技術】この種のバンプ付き可撓性回路基板を製
作するには、従来、先ず所望の回路配線パタ−ンを形成
した後、それらの回路配線パタ−ンを保護する為の表面
保護層を積層し、次いで、例えばその表面保護層側にバ
ンプを形成する為の開口を形成し、また、他方面の絶縁
べ−ス材側には接続ランドの為の他の開口を形成すると
いう手法を採用する場合がある。2. Description of the Related Art In order to manufacture a flexible circuit board with bumps of this type, conventionally, a desired circuit wiring pattern is first formed, and then surface protection for protecting the circuit wiring pattern is performed. The layers are laminated, and then, for example, an opening for forming a bump is formed on the surface protective layer side, and another opening for a connection land is formed on the other side of the insulating base material side. The method may be adopted.
【0003】このような手法では、バンプを電解メッキ
で形成する為に、バンプの形成面ではない側にマスクを
施した後、上記開口にメッキ手段でバンプを形成し、更
には上記マスクを除去して、バンプ側にマスクを設けた
状態で、上記開口に露出したランド部位に所要のメッキ
を施し、最後にバンプ側の上記マスクを除去して製品を
得るものである。In such a method, in order to form a bump by electrolytic plating, a mask is applied to a side other than the surface on which the bump is to be formed, then a bump is formed in the opening by plating means, and the mask is removed. Then, in a state where a mask is provided on the bump side, required plating is applied to the land portion exposed to the opening, and finally, the mask on the bump side is removed to obtain a product.
【0004】[0004]
【発明が解決しようとする課題】前記の手法では、電解
メッキの為のマスクの貼り合わせと除去を繰り返し行う
必要があって、工程が複雑となり製造コストが高い。ま
た、バンプの数が増加してバンプのピッチが狭くなる
と、メッキリ−ドの引き出しが困難となり回路設計に制
約が発生したり、或いはメッキリ−ドを引き出すことが
できず製作が不可能となる場合もあった。In the above-mentioned method, it is necessary to repeatedly attach and remove a mask for electrolytic plating, which complicates the process and increases the manufacturing cost. Also, when the number of bumps increases and the pitch of the bumps becomes narrower, it is difficult to draw out plating leads, which limits the circuit design, or the plating leads cannot be drawn out, making production impossible. There was also.
【0005】そして、このようにバンプの数が増加して
バンプのピッチが狭くなると、メッキリ−ドの導体幅と
数量に制限が生じ、メッキ電流に分布が発生してバンプ
形成の為の一様なメッキの成長を阻害するという問題が
あった。[0005] When the number of bumps increases and the pitch of the bumps becomes narrow, the conductor width and the number of plating leads are limited, and a distribution of plating current is generated, resulting in a uniform distribution of bumps. There is a problem that the growth of the plating is hindered.
【0006】そこで本発明は、メッキリ−ド等を用いる
ことなくICチップ等の回路部品との接続の為のバンプ
を高い精度で形成可能な可撓性回路基板の製造法を提供
するものである。Accordingly, the present invention provides a method of manufacturing a flexible circuit board capable of forming bumps for connecting to circuit components such as IC chips with high precision without using plating leads or the like. .
【0007】[0007]
【課題を解決するための手段】その為に本発明による可
撓性回路基板の製造法では、導電箔の一方面に設けられ
た可撓性絶縁べ−ス材の所定箇所にバンプ形成の為の開
口を適数個形成すると共に、前記導電箔の他方面にマス
ク層を形成し、次いで電解メッキ手段で前記開口にバン
プを形成した後、このバンプの表面に耐食性の高い金属
層を形成し、その後前記バンプとの関連で前記導電箔に
対して所要の回路配線パタ−ンを形成することを特徴と
するものである。Therefore, in the method of manufacturing a flexible circuit board according to the present invention, a bump is formed on a predetermined portion of a flexible insulating base material provided on one surface of a conductive foil. After forming an appropriate number of openings, forming a mask layer on the other surface of the conductive foil, and then forming a bump in the opening by electrolytic plating means, forming a highly corrosion-resistant metal layer on the surface of the bump. Thereafter, a required circuit wiring pattern is formed on the conductive foil in relation to the bump.
【0008】ここで、前記耐食性の高い金属層は電解メ
ッキ手段か又は無電解メッキ手段で形成することがで
き、そして、前記バンプが形成される反対側の前記回路
配線パタ−ン表面に所要の表面保護層を形成しながら所
要の接続用ランド又はパッドを形成することもできる。Here, the metal layer having high corrosion resistance can be formed by electrolytic plating means or electroless plating means, and a required surface is provided on the surface of the circuit wiring pattern opposite to the side where the bumps are formed. Necessary connection lands or pads can be formed while forming the surface protective layer.
【0009】[0009]
【発明の実施の形態】以下、図面を参照しながら本発明
を更に説明する。図1の(1)〜(7)は、本発明によ
る可撓性回路基板の製造工程図であり、先ず、同図
(1)のように、例えば可撓性片面銅張板等を用いて銅
箔等の導電箔1の一方面に可撓性絶縁べ−ス材2を有す
る材料を用意する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be further described below with reference to the drawings. 1 (1) to 1 (7) are manufacturing process diagrams of a flexible circuit board according to the present invention. First, as shown in FIG. 1 (1), for example, using a flexible single-sided copper-clad board or the like. A material having a flexible insulating base material 2 on one side of a conductive foil 1 such as a copper foil is prepared.
【0010】そこで、同図(2)の如く、可撓性絶縁べ
−ス材2の所定の箇所にレ−ザ−等の手段で所定の径と
ピッチでバンプ形成の為の開口3を適数個形成し、ま
た、導電箔1の外面にはマスク層4を一様に形成する。Therefore, as shown in FIG. 1B, an opening 3 for forming a bump at a predetermined diameter and a predetermined pitch is formed at a predetermined position of the flexible insulating base material 2 by means of a laser or the like. Several pieces are formed, and a mask layer 4 is uniformly formed on the outer surface of the conductive foil 1.
【0011】次に、同図(3)の如く、電解メッキ手段
で開口3にメッキを施してバンプ5を形成する。このよ
うな手段により、バンプ5の直径を100μm以下、そ
れらのピッチを150μm以下に形成することができ
る。Next, as shown in FIG. 1C, the bumps 5 are formed by plating the openings 3 by electrolytic plating means. By such means, the diameter of the bumps 5 can be formed to 100 μm or less, and their pitch can be formed to 150 μm or less.
【0012】このようなバンプ5の表面には、次いで、
電解メッキ手段か又は無電解メッキ手段を用いて、金、
白金、タングステン、チタン、半田或いはロジウム等の
耐食性の高い金属層を形成する。Next, on the surface of such a bump 5,
Using electrolytic plating means or electroless plating means, gold,
A highly corrosion-resistant metal layer such as platinum, tungsten, titanium, solder or rhodium is formed.
【0013】そこで、同図(4)の如く、マスク層4を
除去し、次いで、ドライフィルムの材料を用いてこれに
露光・現像処理を加えて所望の回路配線パタ−ン形成の
為のレジスト層4A、4Bを形成する。Therefore, as shown in FIG. 4 (4), the mask layer 4 is removed, and then a dry film material is subjected to exposure and development processing to form a resist for forming a desired circuit wiring pattern. The layers 4A and 4B are formed.
【0014】次に、エッチング処理を加え、また、不要
なレジスト層4A、4Bを除去することにより、同図
(5)の如く、各バンプ5との関連で所望の回路配線パ
タ−ン1A、1Bを形成することができる。Next, by performing an etching process and removing unnecessary resist layers 4A and 4B, desired circuit wiring patterns 1A and 1A in relation to each bump 5 as shown in FIG. 1B can be formed.
【0015】次いで、同図(6)の如く、回路配線パタ
−ン1A、1Bの外面に於ける所定の箇所に所望の形状
でカバ−フィルム等を積層することにより、表面保護層
6を形成することができ、また、その際に回路配線パタ
−ン1A、1Bの所定の箇所を露出させて得られる接続
用ランド又はパッド7を形成できる。Then, as shown in FIG. 6 (6), a surface protective layer 6 is formed by laminating a cover film or the like in a desired shape at a predetermined location on the outer surfaces of the circuit wiring patterns 1A and 1B. In this case, connection lands or pads 7 obtained by exposing predetermined portions of the circuit wiring patterns 1A and 1B can be formed.
【0016】なお、同図(7)の如く、バンプ5及び接
続用ランド又はパッド7の部位には金等の材料を用いた
端子表面処理の為の無電解メッキ層8、9を形成するこ
とも勿論可能である。As shown in FIG. 7 (7), electroless plating layers 8 and 9 for terminal surface treatment using a material such as gold are formed on the portions of the bumps 5 and the connection lands or pads 7 as shown in FIG. Of course, it is also possible.
【0017】[0017]
【発明の効果】本発明による可撓性回路基板の製造法に
よれば、回路配線パタ−ンを形成する前に、電解メッキ
手段でバンプを形成できるので、従来の如く、メッキリ
−ドは不要であって、メッキリ−ドの引き出しの問題や
メッキ電流に分布が生ずる等の問題を解消でき、高い精
度で微細且つ高密度なバンプ付き可撓性回路基板を提供
できる。According to the method of manufacturing a flexible circuit board according to the present invention, before forming circuit wiring patterns, bumps can be formed by electrolytic plating means, so that plating leads are unnecessary as in the prior art. In addition, it is possible to solve the problem of lead out of the plating lead and the problem of the distribution of the plating current, etc., and to provide a highly accurate, fine and high-density flexible circuit board with bumps.
【0018】また、回路配線パタ−ンの設計の自由度が
高まり、バンプ形成の為のメッキの均一性を向上させる
ことができ、更に、従来のようなマスクの貼り合わせと
その除去の工程の大幅な減少による工数の削減によっ
て、不良発生を低減し、製造コストを低減できる。In addition, the degree of freedom in designing circuit wiring patterns is increased, the uniformity of plating for forming bumps can be improved, and the conventional mask bonding and removal processes can be performed. By reducing the number of man-hours due to the drastic reduction, the occurrence of defects can be reduced and the manufacturing cost can be reduced.
【図1】(1)〜(7)は、本発明による可撓性回路基
板の製造工程図である。FIGS. 1 (1) to 1 (7) are manufacturing process diagrams of a flexible circuit board according to the present invention.
1 導電箔 1A,1B 回路配線パタ−ン 2 可撓性絶縁べ−ス材 3 開口 4 マスク層 4A,4B レジスト層 5 バンプ 6 表面保護層 7 接続用ランド又はパッド DESCRIPTION OF SYMBOLS 1 Conductive foil 1A, 1B Circuit wiring pattern 2 Flexible insulating base material 3 Opening 4 Mask layer 4A, 4B Resist layer 5 Bump 6 Surface protection layer 7 Land or pad for connection
Claims (4)
−ス材の所定箇所にバンプ形成の為の開口を適数個形成
すると共に、前記導電箔の他方面にマスク層を形成し、
次いで電解メッキ手段で前記開口にバンプを形成した
後、このバンプの表面に耐食性の高い金属層を形成し、
その後前記バンプとの関連で前記導電箔に対して所要の
回路配線パタ−ンを形成することを特徴とする可撓性回
路基板の製造法。An appropriate number of openings for forming bumps are formed in predetermined places of a flexible insulating base material provided on one surface of a conductive foil, and a mask layer is formed on the other surface of the conductive foil. Forming
Then, after forming a bump in the opening by electrolytic plating means, to form a highly corrosion-resistant metal layer on the surface of the bump,
Thereafter, a required circuit wiring pattern is formed on the conductive foil in relation to the bumps.
で形成する請求項1の可撓性回路基板の製造法。2. The method for manufacturing a flexible circuit board according to claim 1, wherein said metal layer having high corrosion resistance is formed by electrolytic plating means.
段で形成する請求項1の可撓性回路基板の製造法。3. The method for manufacturing a flexible circuit board according to claim 1, wherein said metal layer having high corrosion resistance is formed by electroless plating means.
配線パタ−ン表面に所要の表面保護層を形成しながら所
要の接続用ランド又はパッドを形成する請求項1〜3の
可撓性回路基板の製造法。4. A flexible connection land or pad according to claim 1, wherein a required connection land or pad is formed while a required surface protection layer is formed on the surface of said circuit wiring pattern opposite to the side where said bump is formed. Manufacturing method of circuit board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18573697A JPH1117331A (en) | 1997-06-26 | 1997-06-26 | Manufacture of flexible circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18573697A JPH1117331A (en) | 1997-06-26 | 1997-06-26 | Manufacture of flexible circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH1117331A true JPH1117331A (en) | 1999-01-22 |
Family
ID=16175969
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18573697A Pending JPH1117331A (en) | 1997-06-26 | 1997-06-26 | Manufacture of flexible circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH1117331A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6643923B1 (en) * | 1998-07-29 | 2003-11-11 | Sony Chemicals Corp. | Processes for manufacturing flexible wiring boards |
JP2006310689A (en) * | 2005-05-02 | 2006-11-09 | Nippon Mektron Ltd | Manufacturing method of double-access flexible circuit board |
KR100783340B1 (en) * | 1999-06-10 | 2007-12-07 | 소니 케미카루 앤드 인포메이션 디바이스 가부시키가이샤 | Method for production of interposer for mounting semiconductor element |
-
1997
- 1997-06-26 JP JP18573697A patent/JPH1117331A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6643923B1 (en) * | 1998-07-29 | 2003-11-11 | Sony Chemicals Corp. | Processes for manufacturing flexible wiring boards |
US6848176B2 (en) | 1998-07-29 | 2005-02-01 | Sony Chemicals Corporation | Process for manufacturing flexible wiring boards |
US7053312B2 (en) | 1998-07-29 | 2006-05-30 | Sony Corporation | Flexible wiring boards |
KR100783340B1 (en) * | 1999-06-10 | 2007-12-07 | 소니 케미카루 앤드 인포메이션 디바이스 가부시키가이샤 | Method for production of interposer for mounting semiconductor element |
JP2006310689A (en) * | 2005-05-02 | 2006-11-09 | Nippon Mektron Ltd | Manufacturing method of double-access flexible circuit board |
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