JPH03245593A - Manufacture of printed wiring board - Google Patents

Abstract

PURPOSE:To cut a printed wiring board without doing a hole boring process or the like so as to improve the plated surface of printed board by a method wherein etching resist is applied onto the surface of the printed board excluding the part of a lead pattern which is to be cut, and the cut part is removed through etching. CONSTITUTION:A plating resist 4 is applied onto a lead pattern 3 and a wiring pattern 4 formed on the surface of a insulating board 1 excluding the pattern 3 to overlay the pattern 3 with gold or the like through plating. In succession, etching resist 6 is applied onto the surface of the printed board 1 excluding the part of the pattern 4 which is to be cut, the pattern 3 is cut without doing a hole boring process, and thus burrs or the like are prevented from occurring and the surface of a plating layer can be improved in quality.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a method of manufacturing a printed wiring board in which the surface of a wiring pattern is overlaid with gold plating or the like.

[Conventional technology]

The wiring patterns on printed wiring boards are generally made of copper, but the surface of the copper wiring pattern is overplated with a different metal such as gold for external connection or protection. There is. Since the metal used for this overlay plating is generally expensive, such as gold, a method is adopted in which overlay plating is applied to the minimum necessary area. That is, as shown in FIG. 12(a), when forming the wiring patterns 2, 2, .
This lead pattern 3 is connected to a current-carrying pattern 10 similarly formed on the insulating substrate 1. Next, as shown in FIG. 2(b), a layer of 7 tack coating 4 (indicated by coarse diagonal lines downward to the left) is applied to the surface of the insulating substrate 1, excluding the wiring pattern 2 to be plated, and the lead pattern 3 is plated. Cover with resist 4. In this state, the insulating substrate 1 is immersed in plating while an electrode is connected to the energizing pattern 10 and energized, thereby applying the 7-ply 5 (indicated by fine diagonal lines downward to the right). In this way, overlay plating 5 can be applied to only the surface of wiring pattern 2 that is not covered with plating resist 4 to the minimum necessary extent. Then, in order to plate each wiring pattern 2, it is necessary to cut the lead pattern 3 connecting each wiring pattern 2 to make each wiring pattern 2 independent. In order to cut the lead pattern 3 in this way, conventionally, as shown in FIG. 2(e), this is done by drilling or milling the insulating substrate 1 at the location of the lead pattern 3 to form a hole 11. That's what I did.

[Problem to be solved by the invention]

However, in this way, the hole 11 is processed and the lead pattern 3
If the lead pattern 3 is cut, there is a risk that the lead pattern 3 will have a burr during this process, and the burr may cause a short circuit between adjacent lead patterns 3, or rust may occur from the cut end surface of the lead pattern. There was a problem that there was. The present invention has been made in view of the above, and provides a method for manufacturing a printed wiring board that does not require hole processing (lead patterns can be quadrupled) and has excellent plating surface quality. The purpose is to

[Means for Solving Problem W] The method for manufacturing a printed wiring board according to the present invention includes an insulating substrate 1
A wiring pattern 2 and a lead pattern 3 for connecting each wiring pattern 2 are provided on the surface of the wiring pattern 2, and a plating resist 4 is applied to the surface of each pattern 2 and 3 except for the areas to be plated, and then 7 plating 5 is applied. The method is characterized in that after the plating resist 4 is removed and the etching resist 6 is applied to each pattern 2°3 except for the portion of the lead pattern 3 to be cut, the portion of the lead pattern 3 to be cut is removed by etching. It is. [Function] In the present invention, the parts of the lead pattern 3 to be cut are removed by etching, so
There is no need to perform hole processing such as drilling or milling to cut the lead pattern. Furthermore, since the plating 5 is etched while being covered with the etching lens 6, the plating 5 is not attacked by the etching solution.

【Example】

The present invention will be explained in detail below with reference to Examples. First, as shown in FIG. 1(a), wiring patterns 2, 2, .・
A lead pattern 3 is formed to connect. This lead pattern 3 is connected to a conductive pattern 10 similarly formed on the insulating substrate 1.6 In the embodiment shown in FIG. 1, the wiring patterns 2, 2, . . . are formed as terminal patterns 2a and land patterns 2b. That's how it is. Each of the patterns 2.3.10 can be formed, for example, by etching a copper-clad laminate. After forming the patterns 2, 3, and 10 on the insulating substrate 1 in this manner, a resist is applied to the areas except for the cut portions of the corresponding lead patterns 3, if necessary. Next, as shown in FIG. 1(b), a plating resist 4 (indicated by rough diagonal lines downward to the left) is applied to the surface of the insulating substrate 1, except for the portion of the wiring pattern 2 where plating 5 is to be applied. Then, the lead pattern 3 is covered with a plating resist 4. The plating layer 4 is formed as a peelable insulating film or the like. In this state, an electrode is connected to the energizing pattern 10, and the wiring pattern 2 is energized from the electrode through the lead pattern 3 while being immersed in a plating bath of nickel, gold, etc., to perform electrical overlay plating. Plating 5 is shown in Figure 1(e)
As shown by fine diagonal lines slanting downward to the right, plating is applied to the surface of the wiring pattern 2 only in the portions not covered with the plating resist 4. Next, as shown in FIG. 1(d), the plating resist 4 is peeled off, and thereafter, as shown in FIG. (indicated by coarse diagonal lines slanting downward to the left) and cover the wiring pattern 2 and lead pattern 3 with an etching resist 6. The etching resist 6 is formed as a removable organic film or the like. After applying the etching resist 6 in this manner, etching is performed by immersing it in an etching solution, and the portions of the lead pattern 3 that are not covered with the etching resist 6 are etched away as shown in FIG. 1(f). . Since the lead pattern 3 is cut by removing the etching in this way, short circuits and cuts due to the occurrence of cracks may occur when the lead pattern 3 is cut by drilling or milling. This can prevent rust from occurring from the end face. Furthermore, when performing the etching process, since the overlay plating 5 applied to the wiring pattern 2 is covered with an etching resist 6, the plating solution is prevented from acting on the overlay plating 5, resulting in a decrease in the quality of the overlay plating 5. I try to prevent that from happening. In this case, Special Publick No. 63-18355
In the method provided in the publication, plating is performed using overlay plating as an etching mask, but it cannot be denied that the quality of overlay plating deteriorates because the plating solution acts on overlay plating. After partially etching away the lead pattern 3 and making each wiring pattern 2 independent as described above, the etching is performed as shown in FIG.
), the etching resist 6 is peeled off, and if necessary, solder paste is applied except for the land pattern 2b.

【Effect of the invention】

As described above, in the present invention, wiring patterns and lead patterns connecting each wiring pattern are provided on the surface of an insulating substrate, and plating is performed after applying a plating resist to the surface of each pattern except for the areas to be plated. After that, the plating resist was removed, and etching resist was applied to each pattern except for the parts of the lead pattern that should be cut.The parts of the lead pattern that should be cut were then etched away. This eliminates the need for hole machining such as drilling or milling to cut lead patterns, and the applied plating can be etched while covered with an etching lens. Because of this, the plating can be prevented from being attacked by the etching solution, and the quality of the plating surface can be maintained at a high level.

[Brief explanation of drawings]

FIGS. 1(a) to (g) are schematic plan views showing the manufacturing process of an embodiment of the present invention, and FIGS. 2(a), (b), and (c) are schematic plan views showing the manufacturing process of a conventional example. be. 1 is an insulating substrate, 2 is a wiring pattern, 3 is a lead pattern, 4 is a plating resist, 5 is a plating, and 6 is an etching resist.

Claims (1)

[Claims] (1) A wiring pattern and a lead pattern connecting each wiring pattern are provided on the surface of an insulating substrate, and plating is applied after applying a plating resist to the surface of each pattern except for the areas to be plated, and then the plating resist is removed. A method for manufacturing a printed wiring board, comprising: applying an etching resist to each pattern except for the portions of the lead pattern to be cut, and then etching away the portions of the lead pattern to be cut.