JP3688940B2 - Wiring pattern formation method for flexible circuit board - Google Patents
Wiring pattern formation method for flexible circuit board Download PDFInfo
- Publication number
- JP3688940B2 JP3688940B2 JP18615299A JP18615299A JP3688940B2 JP 3688940 B2 JP3688940 B2 JP 3688940B2 JP 18615299 A JP18615299 A JP 18615299A JP 18615299 A JP18615299 A JP 18615299A JP 3688940 B2 JP3688940 B2 JP 3688940B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring pattern
- circuit board
- flexible circuit
- fine wiring
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 23
- 230000007261 regionalization Effects 0.000 title 1
- 238000007747 plating Methods 0.000 claims description 15
- 238000009713 electroplating Methods 0.000 claims description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 9
- 238000005530 etching Methods 0.000 description 8
- 239000010410 layer Substances 0.000 description 7
- 239000010408 film Substances 0.000 description 6
- 239000011889 copper foil Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000013039 cover film Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Images
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Description
【０００１】
【発明の属する技術分野】
本発明は、微細な配線パタ−ンを含む可撓性回路基板を製造する場合に、その微細な配線パタ−ンを好適に形成可能な可撓性回路基板の配線パタ−ン形成法に関する。
【０００２】
【従来の技術】
可撓性回路基板の配線パタ−ンを形成する一般的な手法としては、例えば基板の両面に配線パタ−ンを形成する場合には材料として可撓性の両面銅張積層板を用意し、その両面の配線パタ−ンにスル−ホ−ル導通を必要とする形態では両面銅張積層板の所要箇所にスル−ホ−ルの為の穿設処理を施した後、スル−ホ−ルの導通化を図る為に無電解メッキ手段でスル−ホ−ルメッキ処理を行う。
【０００３】
次に、銅箔面に感光性ドライフィルム等を用いて所要のレジストパタ−ンを形成した段階で、エッチング処理を施して配線パタ−ンを形成し、次いで、不要となったレジストパタ−ンを剥離することによって、所要の配線パタ−ンを備えた両面型の可撓性回路基板を得ることができる。
【０００４】
【発明が解決しようとする課題】
上記の如きスル−ホ−ルメッキ処理を伴うサブトラクティブ法によれば、形成された配線パタ−ンは銅箔の厚さの他にスル−ホ−ルメッキの厚みを有することとなるが、このように導電層が厚くなるとエッチング処理工程時にはショ−トの原因となる銅残りの発生する度合いが高くなる。
【０００５】
そこで、このような事態を回避する為にエッチング処理を長時間行うと、微細な配線パタ−ンは断線してしまうという結果となり、従って、エッチング処理工程のコントロ−ルは極めて困難である。
【０００６】
ところで、微細な配線パタ−ンをエッチング手段で形成する為には、銅箔を含む導電層の厚さを薄くするのが有利であるが、その為にスル−ホ−ルメッキを薄く形成すると、スル−ホ−ル導通の接続信頼性が低下するという問題がある。
【０００７】
スル−ホ−ル導通の接続信頼性を確保する為には、現行の技術では少なくとも厚さ１５μｍ以上のスル−ホ−ルメッキが必要であり、従って材料の銅箔の厚さに加えてそのスル−ホ−ルメッキの１５μｍ以上の厚さが増すこととなる。
【０００８】
そして、材料としての銅箔は現行ではその取扱い上、厚さ１２μｍ以下に薄く形成することは不可能である為、導電層の厚さが２７μｍ以上のものをエッチング処理して配線パタ−ンを形成することとなるが、この厚さでの配線パタ−ンの限界配線パタ−ン幅は約８０μｍ程度となり、これ以下の配線パタ−ン幅を要望される場合には対応することができない。
【０００９】
そこで、本発明は、上記の如き８０μｍ未満の配線パタ−ン幅を有する微細な配線パタ−ンを一部に含む可撓性回路基板を要望された場合でも安定的に微細な配線パタ−ンを形成可能な可撓性回路基板の配線パタ−ン形成法を提供するものである。
【００１０】
【課題を解決するための手段】
その為に、本発明による可撓性回路基板の配線パタ−ン形成法では、先ず両面銅張積層板の両面に対して通常より薄い３μｍ〜７μｍの厚さでスル−ホ−ルメッキ処理を施し、この段階で必要な箇所に微細な配線パタ−ンを形成する。次いで、形成したその微細な配線パタ−ンをマスキング処理した後、所要の厚さが得られるように再度スル−ホ−ルメッキ処理を施し、最後に上記微細な配線パタ−ン以外の所要の配線パタ−ンを形成する手法を採用したものである。
【００１１】
上記のように再度スル−ホ−ルメッキ処理する工程では、初段で既にスル−ホ−ルメッキ処理を施しているので、電解メッキ手段を簡易に適用することができる。その為、形成済の微細な配線パタ−ンをマスキング処理する手段としては、形成容易な感光性ドライフィルム等のマスク材料を採用できる。
【００１２】
斯かる手法の採用により、微細な配線パタ−ンの幅を従来の限界であった８０μｍ以下の例えば６０μｍ程度に細く形成した可撓性回路基板を高い精度で安定的に製作することが可能である。
【００１３】
【発明の実施の形態】
以下、図示の実施例を参照しながら本発明を更に詳述する。図１は、本発明による可撓性回路基板の配線パタ−ン形成法を採用して形成した微細な配線パタ−ンを含む可撓性回路基板の概念的な平面構成図である。
【００１４】
図１に於いて、可撓性回路基板８には可撓性の両面銅張積層板１を使用してその一部に破線２で示す領域に所要本数の微細な配線パタ−ン３が形成され、これらの微細な配線パタ−ン３には連続して端子部又はランド４，５を有する太い幅の配線パタ−ン６及び７が形成されている。
【００１５】
微細な配線パタ−ン３の幅は、この実施例では６０μｍに形成したものであって、これらの微細な配線パタ−ン３部分には端子部又はランド等は形成されず、また、可撓性回路基板８は上記のように微細な配線パタ−ン３のみが全面に存在する形態ではなく、微細な配線パタ−ン３と幅の太い配線パタ−ン６，７が混在するものとなる。
【００１６】
図２は斯かる可撓性回路基板を製作する為の概念的な製造工程図を示し、先ず同図（１）の如く可撓性の両面銅張積層板１を用意し、これにスル−ホ−ル導通を必要とする箇所に常法によりスル−ホ−ルを穿設する。次いで、この両面銅張積層板１の全面に無電解メッキ処理を施し、必要に応じて更に厚さ５μｍ程度の電解銅メッキ処理を加える。
【００１７】
次に、領域１０を除く他の全面に感光性ドライフィルム１１を用いてレジスト層を形成するが、上記領域１０にはその感光性ドライフィルム１１により所定のレジストパタ−ンが形成される。そこで、領域１０の箇所にエッチング処理を加えて幅６０μｍの微細な配線パタ−ン３を所要本数形成する。そして、この段階で一旦上記レジスト層を剥離する。
【００１８】
次いで、同図（２）の如く、形成した微細な配線パタ−ン３をマスク１２する為に領域１０に対して再度感光性ドライフィルムを使用してマスキング処理した後、厚さ１０μｍの電解銅メッキ処理を施す。
【００１９】
更に、上記マスク１２を剥離した後、同図（３）のように、再度感光性ドライフィルムを用いて領域１０内の微細な配線パタ−ン３が再び保護されるように設けたマスク１３を含むように所要のレジスト層を形成した段階で、エッチング処理工程に付すことにより、微細な配線パタ−ン３以外に必要な端子部又はランド４，５を含む他の所要の太い配線パタ−ン６及び７を容易に形成することが可能となり、最後にマスク１３を含む不要なレジスト層を剥離することにより、微細な配線パタ−ン３とそれ以外の配線パタ−ン６，７とが混在した可撓性回路基板を得ることができる。
【００２０】
なお、上記微細な配線パタ−ン３及びそれに連続する他の配線パタ−ン６，７の表面には常法に応じてカバ−フィルム等の表面保護層を適宜設けることができる。
【００２１】
【発明の効果】
本発明による可撓性回路基板の配線パタ−ン形成法によれば、微細な配線パタ−ンとそれに連続する他の配線パタ−ンとが混在するような形態の製品であっても、８０μｍ未満の幅の微細な配線パタ−ンを安定確実に形成することが可能であり、また、所要のスル−ホ−ル導通も信頼性の高い構造に形成できる。
【００２２】
既述の如く、微細な配線パタ−ンの形成とそれ以外の配線パタ−ンとを複数段に分けてエッチング形成するので、斯かるエッチング処理工程のコントロ−ルは格段に容易となる。
【図面の簡単な説明】
【図１】本発明による可撓性回路基板の配線パタ−ン形成法を採用して形成した微細な配線パタ−ンを含む可撓性回路基板の概念的な平面構成図。
【図２】その為の概念的な製造工程図。
【符号の説明】
１ 可撓性両面銅張積層板
２ 破線
３ 微細な配線パタ−ン
４ 端子部又はランド
５ 端子部又はランド
６ 太い配線パタ−ン
７ 太い配線パタ−ン[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a wiring pattern forming method for a flexible circuit board that can suitably form a fine wiring pattern when a flexible circuit board including a fine wiring pattern is manufactured.
[0002]
[Prior art]
As a general method for forming a wiring pattern of a flexible circuit board, for example, when forming a wiring pattern on both sides of a substrate, a flexible double-sided copper-clad laminate is prepared as a material, In the form where through hole conduction is required for the wiring patterns on both sides, a through hole is drilled at a required portion of the double-sided copper-clad laminate, and then the through hole is formed. In order to achieve electrical conduction, through-hole plating is performed by electroless plating means.
[0003]
Next, when the required resist pattern is formed on the copper foil surface using a photosensitive dry film or the like, an etching process is performed to form a wiring pattern, and then the resist pattern that is no longer needed is peeled off. As a result, a double-sided flexible circuit board having a required wiring pattern can be obtained.
[0004]
[Problems to be solved by the invention]
According to the subtractive method involving the through hole plating process as described above, the formed wiring pattern has the thickness of the through hole plating in addition to the thickness of the copper foil. When the conductive layer becomes thicker, the degree of occurrence of copper residue that causes a short during the etching process increases.
[0005]
Therefore, if the etching process is performed for a long time in order to avoid such a situation, the result is that the fine wiring pattern is disconnected. Therefore, it is very difficult to control the etching process.
[0006]
By the way, in order to form a fine wiring pattern by the etching means, it is advantageous to reduce the thickness of the conductive layer including the copper foil. However, if the through hole plating is formed to be thin, There is a problem that connection reliability of through-hole conduction is lowered.
[0007]
In order to ensure the connection reliability of through-hole conduction, the current technology requires through-hole plating with a thickness of at least 15 μm. Therefore, in addition to the thickness of the copper foil of the material, the through-hole plating is necessary. -The thickness of hole plating of 15 μm or more will increase.
[0008]
Since the copper foil as a material cannot be formed thinly to a thickness of 12 μm or less at present due to its handling, a conductive layer having a thickness of 27 μm or more is etched to form a wiring pattern. Although it is formed, the limit wiring pattern width of the wiring pattern at this thickness is about 80 μm, and it is impossible to cope with the case where a wiring pattern width smaller than this is desired.
[0009]
Accordingly, the present invention provides a stable and fine wiring pattern even when a flexible circuit board partially including a fine wiring pattern having a wiring pattern width of less than 80 μm as described above is desired. And a wiring pattern forming method for a flexible circuit board.
[0010]
[Means for Solving the Problems]
Therefore, in the wiring pattern forming method of the flexible circuit board according to the present invention, first, through the two-sided copper-clad laminate, a through hole plating process is performed with a thickness of 3 μm to 7 μm, which is thinner than usual. At this stage, a fine wiring pattern is formed at a necessary place. Next, the fine wiring pattern thus formed is subjected to masking treatment, and then through through the hole plating process so as to obtain a required thickness. Finally, the required wiring other than the fine wiring pattern is applied. A method of forming a pattern is adopted.
[0011]
In the process of through-hole plating again as described above, since the through-hole plating has already been performed in the first stage, the electrolytic plating means can be easily applied. Therefore, a mask material such as a photosensitive dry film that can be easily formed can be employed as a means for masking a fine wiring pattern that has been formed.
[0012]
By adopting such a technique, it is possible to stably produce a flexible circuit board with a fine wiring pattern width as narrow as 80 μm or less, for example, about 60 μm, which was the conventional limit. is there.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in more detail with reference to the illustrated embodiments. FIG. 1 is a conceptual plan view of a flexible circuit board including a fine wiring pattern formed by adopting a wiring pattern forming method for a flexible circuit board according to the present invention.
[0014]
In FIG. 1, a flexible double-sided copper-
[0015]
The width of the
[0016]
FIG. 2 is a conceptual manufacturing process diagram for manufacturing such a flexible circuit board. First, a flexible double-sided copper-
[0017]
Next, a resist layer is formed on the entire surface other than the
[0018]
Next, as shown in FIG. 2 (2), the
[0019]
Further, after the
[0020]
In addition, a surface protective layer such as a cover film can be appropriately provided on the surfaces of the
[0021]
【The invention's effect】
According to the wiring pattern forming method of the flexible circuit board according to the present invention, even a product having a form in which a fine wiring pattern and other wiring patterns continuous thereto are mixed is 80 μm. It is possible to stably form a fine wiring pattern having a width less than that, and to form a required through hole conduction in a highly reliable structure.
[0022]
As described above, the formation of fine wiring patterns and the other wiring patterns are etched and formed in a plurality of stages, so that the control of the etching process becomes much easier.
[Brief description of the drawings]
FIG. 1 is a conceptual plan view of a flexible circuit board including a fine wiring pattern formed by adopting a wiring pattern forming method for a flexible circuit board according to the present invention.
FIG. 2 is a conceptual manufacturing process diagram for that purpose.
[Explanation of symbols]
DESCRIPTION OF
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18615299A JP3688940B2 (en) | 1999-06-30 | 1999-06-30 | Wiring pattern formation method for flexible circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18615299A JP3688940B2 (en) | 1999-06-30 | 1999-06-30 | Wiring pattern formation method for flexible circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001015890A JP2001015890A (en) | 2001-01-19 |
| JP3688940B2 true JP3688940B2 (en) | 2005-08-31 |
Family
ID=16183302
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18615299A Expired - Fee Related JP3688940B2 (en) | 1999-06-30 | 1999-06-30 | Wiring pattern formation method for flexible circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3688940B2 (en) |
-
1999
- 1999-06-30 JP JP18615299A patent/JP3688940B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2001015890A (en) | 2001-01-19 |
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