JP4252227B2 - Manufacturing method of double-sided flexible circuit board - Google Patents

Manufacturing method of double-sided flexible circuit board Download PDF

Info

Publication number
JP4252227B2
JP4252227B2 JP2001142726A JP2001142726A JP4252227B2 JP 4252227 B2 JP4252227 B2 JP 4252227B2 JP 2001142726 A JP2001142726 A JP 2001142726A JP 2001142726 A JP2001142726 A JP 2001142726A JP 4252227 B2 JP4252227 B2 JP 4252227B2
Authority
JP
Japan
Prior art keywords
conductive layer
circuit board
double
flexible circuit
sided flexible
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001142726A
Other languages
Japanese (ja)
Other versions
JP2002344133A (en
Inventor
文彦 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Mektron KK
Original Assignee
Nippon Mektron KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mektron KK filed Critical Nippon Mektron KK
Priority to JP2001142726A priority Critical patent/JP4252227B2/en
Publication of JP2002344133A publication Critical patent/JP2002344133A/en
Application granted granted Critical
Publication of JP4252227B2 publication Critical patent/JP4252227B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Description

【0001】
【発明の属する技術分野】
本発明は、微細で高精細な両面可撓性回路基板に必要である微小なスルーホール導通層を容易に形成可能な両面可撓性回路基板の製造法に関する。
【従来技術とその問題点】
従来、微細な回路配線パターンを有する可撓性回路基板の製造工程に於いて、銅箔の薄い銅張り板は高価なため、微細な回路配線パターンが必要な面の銅箔に対しては、ハーフエッチング工程によって銅箔の厚さを薄型化する手法が取られている。
【0002】
この為、基板の両面に微細な回路配線が必要な場合には、両面の銅箔に対するハーフエッチング工程が必要である。
【0003】
図2は、従来手法による微細な回路配線を形成する為の両面可撓性回路基板の製造法を示す工程図であって、同図(1)のように絶縁層20の一方面に第一の導電層21を有し、また、その他方面に第二の導電層22を有する両面銅張り板を用意する。
そこで、同図(2)の如く、第一の導電層21及び第二の導電層22をハーフエッチングして薄く形成した薄い第一の導電層23及び第二の導電層24を形成する。
【0004】
次いで、そのハーフエッチングされた第一の導電層23及び第二の導電層24に対してエッチング処理を施し、同図(3)のように所要の開口部25,26を形成してメタルマスクとして機能させる。
【0005】
そこで、このメタルマスクに対してプラズマエッチング或いはウエットエッチング等の手法により、同図(4)の如く絶縁層20に導通用穴27を形成した後、この導通用27に対して化学めっき等の導電化処理及び電解メッキ等のスルーホールメッキを施して同図(5)のようにスルーホール導通層28を形成する。
【0006】
最後に、常法により所定の回路配線加工を行うことにより両面可撓性回路基板を得る方法が採用されている。
【0007】
しかし、この従来の製造方法に於いては、微細で高精細な回路基板に求められる微小なスルーホール導通層を形成する為には、高度な位置合わせ精度が要求され、高価な装置や特殊な治具などが必要になること、及び、位置合わせ時間がかかる等によって生産性が低下するという問題がある。
【0008】
【課題を解決するための手段】
その為に本発明による両面可撓性回路基板の製造法では、絶縁層の両面に設けられた導電層の一方の導電層をハーフエッチングし、前記絶縁層の他方面の導電層に形成した所要の開口部を用いて前記絶縁層に対するレーザー加工、プラズマエッチングやウエットエッチング等の手段を施すことによって該絶縁層に導通用孔を形成し、前記一方の導電層を保護した後、前記他方面の導電層のハーフエッチングを行なうと同時に、前記導通用孔の底部に露出する前記一方の導電層をエッチング除去することにより導通用穴を形成する手法を採用したものである。
【0009】
【発明の実施の形態】
以下、図示の実施例を参照しながら本発明を更に説明する。図1は、本発明の一実施例による両面可撓性回路基板の製造法を示す工程図である。
【0010】
先ず、同図(1)の如く、適当な絶縁層1の一方面に銅箔等の第一の導電層2を有し、その他方面に同様な第二の導電層3を有する例えば両面銅張積層板を用意する。
【0011】
そこで、同図(2)に示すように、第二の導電層3をハーフエッチング手法により所望の薄い厚さになるようにエッチング処理を行って薄い第二の導電層4を形成する。
【0012】
次に、同図(3)に示すように、第一の導電層2に対するエッチング処理を行って所要の開口部5を形成することにより、この第一の導電層2をメタルマスク層として機能させる。
【0013】
次いで、同図(4)に示すとおり、そのメタルマスク層を利用して、開口部5に露出する絶縁層1に対するレーザー加工、プラズマエッチング或いはウエットエッチング等の手法により絶縁層1に導通用孔6を形成し、これにより薄い第二の導電層4をその底部に露出させる。
【0014】
そこで、同図(5)及び(6)に示すように、ハーフエッチングを行なった第二の導電層4をドライフィルムレジスト等のレジスト層7で保護した後、メタルマスク層側、即ち第一の導電層2側からハーフエッチング処理を行なうことによって、この第一の導電層2をハーフエッチングして薄い第一の導電層8に形成すると共に、導通用孔6の底部に露出する薄い第二の導電層4をエッチング除去して導通用穴9を形成する。
【0015】
次に、同図(7)に示すように、レジスト層7を剥離した後、化学メッキ等の手法による導電化処理及び電解銅メッキ手法により、導通用穴9に対してスルーホールメッキ導通層10を形成する。
【0016】
これによって、両面にマスク層を形成することなく、レーザー加工、プラズマエッチング或いはウエットエッチング等の手法でスルーホール導通層を形成できるので、最後に、常法により所望の回路配線パターンを形成することによって、両面可撓性回路基板を製作することができる。
【0017】
【発明の効果】
本発明によれば、両面可撓性回路基板の製造工程に於いて、絶縁層の一方の面にのみ所要の開口部を有するメタルマスクとして機能する第一の導電層を形成した後、上記開口部に位置する絶縁層に導通用孔を形成し、この導通用孔の底部に露出する他方面の第二の導電層をエッチング除去すると共に、上記第一の導電層に対するハーフエッチング処理を同時に行う方法を採用したものである。
【0018】
従って、高精度な両面の位置合わせが不要となり、高価な設備や特殊な治具等を用いることなく、微小なスルーホール導通部を設けた微細な回路配線パターンを有する両面可撓性回路基板を安価且つ安定的に得る事が可能となる。
【0019】
また、本発明を回路基板の外形の形成手法に採用すれば、高精細な回路基板の外形加工が可能となり、精密な回路基板を製作することが可能となる。
【図面の簡単な説明】
【図1】本発明による両面可撓性回路基板の製造法を示す工程図。
【図2】従来例による両面可撓性回路基板の製造法を示す工程図。
【符号の説明】
1 絶縁層
2 第一の導電層
3 第二の導電層
4 薄い第二の導電層
5 開口部
6 導通用孔
7 レジスト層
8 薄い第一の導電層
9 導通用穴
10 スルーホール導通層
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a double-sided flexible circuit board capable of easily forming a minute through-hole conductive layer required for a fine and high-definition double-sided flexible circuit board.
[Prior art and its problems]
Conventionally, in the process of manufacturing a flexible circuit board having a fine circuit wiring pattern, a copper-clad plate with a thin copper foil is expensive, so for a copper foil on a surface that requires a fine circuit wiring pattern, A technique for reducing the thickness of the copper foil by a half-etching process is employed.
[0002]
For this reason, when fine circuit wiring is required on both sides of the substrate, a half-etching process for the copper foils on both sides is required.
[0003]
FIG. 2 is a process diagram showing a manufacturing method of a double-sided flexible circuit board for forming fine circuit wirings by a conventional method. As shown in FIG. A double-sided copper-clad plate having a second conductive layer 22 on the other side is prepared.
Therefore, as shown in FIG. 2B, the thin first conductive layer 23 and the second conductive layer 24 formed by thin etching the first conductive layer 21 and the second conductive layer 22 are formed.
[0004]
Next, the half-etched first conductive layer 23 and second conductive layer 24 are etched to form the required openings 25 and 26 as shown in FIG. Make it work.
[0005]
Therefore, after a conductive hole 27 is formed in the insulating layer 20 as shown in FIG. 4 (4) by a method such as plasma etching or wet etching on the metal mask, the conductive layer 27 is electrically conductive such as chemical plating. Through-hole plating such as electrolytic treatment and electrolytic plating is performed to form a through-hole conductive layer 28 as shown in FIG.
[0006]
Finally, a method of obtaining a double-sided flexible circuit board by performing predetermined circuit wiring processing by a conventional method is employed.
[0007]
However, in this conventional manufacturing method, in order to form a minute through-hole conductive layer required for a fine and high-definition circuit board, a high degree of alignment accuracy is required, and an expensive apparatus or special device is required. There is a problem that productivity is lowered due to the necessity of a jig and the like and the time required for alignment.
[0008]
[Means for Solving the Problems]
Therefore, in the method for manufacturing a double-sided flexible circuit board according to the present invention, one of the conductive layers provided on both sides of the insulating layer is half-etched and formed on the conductive layer on the other side of the insulating layer. After forming the conduction hole in the insulating layer by applying means such as laser processing, plasma etching, wet etching, etc. to the insulating layer using the opening, and protecting the one conductive layer, At the same time that half etching of the conductive layer is performed, a method of forming a conductive hole by etching and removing the one conductive layer exposed at the bottom of the conductive hole is employed.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
The present invention will be further described below with reference to the illustrated embodiments. FIG. 1 is a process diagram illustrating a method of manufacturing a double-sided flexible circuit board according to an embodiment of the present invention.
[0010]
First, as shown in FIG. 1 (1), a suitable insulating layer 1 has a first conductive layer 2 such as a copper foil on one side and a similar second conductive layer 3 on the other side. Prepare a laminate.
[0011]
Therefore, as shown in FIG. 2B, the second conductive layer 3 is etched to a desired thin thickness by a half-etching method to form a thin second conductive layer 4.
[0012]
Next, as shown in FIG. 3 (3), the first conductive layer 2 is etched to form a required opening 5, thereby causing the first conductive layer 2 to function as a metal mask layer. .
[0013]
Next, as shown in FIG. 4 (4), using the metal mask layer, the conduction hole 6 is formed in the insulating layer 1 by a technique such as laser processing, plasma etching or wet etching for the insulating layer 1 exposed in the opening 5. , Thereby exposing the thin second conductive layer 4 to the bottom thereof.
[0014]
Therefore, as shown in FIGS. 5 (5) and (6), after the second conductive layer 4 that has been half-etched is protected with a resist layer 7 such as a dry film resist, the metal mask layer side, i.e., the first By performing a half-etching process from the conductive layer 2 side, the first conductive layer 2 is half-etched to form a thin first conductive layer 8 and a thin second conductive layer exposed at the bottom of the conduction hole 6 is formed. The conductive layer 4 is removed by etching to form a conduction hole 9.
[0015]
Next, as shown in FIG. 7 (7), after the resist layer 7 is peeled off, the through-hole plating conductive layer 10 is formed with respect to the conductive hole 9 by a conductive treatment by a technique such as chemical plating and an electrolytic copper plating technique. Form.
[0016]
As a result, the through-hole conductive layer can be formed by a technique such as laser processing, plasma etching, or wet etching without forming a mask layer on both sides. Finally, a desired circuit wiring pattern is formed by a conventional method. A double-sided flexible circuit board can be manufactured.
[0017]
【The invention's effect】
According to the present invention, in the manufacturing process of the double-sided flexible circuit board, the first conductive layer functioning as a metal mask having a required opening only on one surface of the insulating layer is formed, and then the opening is formed. A conductive hole is formed in the insulating layer located at the portion, the second conductive layer on the other surface exposed at the bottom of the conductive hole is removed by etching, and a half-etching process is simultaneously performed on the first conductive layer. The method is adopted.
[0018]
Therefore, a double-sided flexible circuit board having a fine circuit wiring pattern provided with a minute through-hole conduction portion without using expensive equipment or a special jig is not required. It can be obtained inexpensively and stably.
[0019]
Further, if the present invention is employed in the method for forming the outer shape of the circuit board, it becomes possible to process the outer shape of the high-definition circuit board and to manufacture a precise circuit board.
[Brief description of the drawings]
FIG. 1 is a process diagram showing a method of manufacturing a double-sided flexible circuit board according to the present invention.
FIG. 2 is a process diagram showing a method of manufacturing a double-sided flexible circuit board according to a conventional example.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Insulating layer 2 1st conductive layer 3 2nd conductive layer 4 Thin 2nd conductive layer 5 Opening part 6 Conductive hole 7 Resist layer 8 Thin 1st conductive layer 9 Conductive hole 10 Through-hole conductive layer

Claims (1)

絶縁層の両面に設けられた導電層の一方の導電層をハーフエッチングし、前記絶縁層の他方面の導電層に形成した所要の開口部を用いて前記絶縁層に導通用孔を形成し、次いで前記一方の導電層を保護した後、前記他方面の導電層にハーフエッチングを施すと同時に、前記導通用孔の底部に露出する前記一方の導電層をエッチング除去することにより導通用穴を形成することを特徴とする両面可撓性回路基板の製造法。Half-etching one conductive layer of the conductive layer provided on both sides of the insulating layer, using a required opening formed in the conductive layer on the other side of the insulating layer to form a conduction hole in the insulating layer, Next, after protecting the one conductive layer, half-etching is performed on the conductive layer on the other side, and at the same time, the one conductive layer exposed at the bottom of the conduction hole is removed by etching to form a conduction hole. A method for producing a double-sided flexible circuit board, comprising:
JP2001142726A 2001-05-14 2001-05-14 Manufacturing method of double-sided flexible circuit board Expired - Fee Related JP4252227B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001142726A JP4252227B2 (en) 2001-05-14 2001-05-14 Manufacturing method of double-sided flexible circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001142726A JP4252227B2 (en) 2001-05-14 2001-05-14 Manufacturing method of double-sided flexible circuit board

Publications (2)

Publication Number Publication Date
JP2002344133A JP2002344133A (en) 2002-11-29
JP4252227B2 true JP4252227B2 (en) 2009-04-08

Family

ID=18988972

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001142726A Expired - Fee Related JP4252227B2 (en) 2001-05-14 2001-05-14 Manufacturing method of double-sided flexible circuit board

Country Status (1)

Country Link
JP (1) JP4252227B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007227648A (en) * 2006-02-23 2007-09-06 Sharp Corp Printed wiring board, and method for manufacturing printed wiring board

Also Published As

Publication number Publication date
JP2002344133A (en) 2002-11-29

Similar Documents

Publication Publication Date Title
JP3361556B2 (en) Method of forming circuit wiring pattern
TWI307142B (en) Semiconductor package substrate having different thicknesses between wire bonding pad and ball pad and method for fabricating the same
JPH0141272B2 (en)
JP4252227B2 (en) Manufacturing method of double-sided flexible circuit board
JP2001358257A (en) Method for manufacturing substrate for semiconductor device
JP2004014880A (en) Flexible wiring board and its manufacturing method
KR20020085635A (en) Routing method of the outside of a castle type printed circuit board
JP3958639B2 (en) Flexible circuit board and manufacturing method thereof
JP4267807B2 (en) Method for forming fine through hole on circuit board
JPH1117315A (en) Manufacture of flexible circuit board
JP3453318B2 (en) Method of manufacturing substrate for semiconductor device
JPH06252529A (en) Manufacture of printed wiring board
TW200541430A (en) Method for making a circuit board
JPH06177277A (en) Manufacture of semiconductor device
KR19990049190A (en) Printed Circuit Board Manufacturing Method
JPH0548246A (en) Manufacture of flexible printed circuit board
JP2000049195A (en) Producing method of electronic component member
JP2003304060A (en) Method of manufacturing double-sided circuit board
JPH10270826A (en) Manufacture of printed wiring board
JPH02119298A (en) Manufacture of multilayer printed wiring board for mounting semiconductor element
JPH1117331A (en) Manufacture of flexible circuit board
JP3688940B2 (en) Wiring pattern formation method for flexible circuit board
JP2001015560A (en) Manufacture of film carrier
JP2003158158A (en) Method of manufacturing double-sided wiring tab tape carrier
JP2003133699A (en) Method for forming surface protection layer of circuit board

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060510

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20081216

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20081224

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090121

R150 Certificate of patent or registration of utility model

Ref document number: 4252227

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120130

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130130

Year of fee payment: 4

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130130

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140130

Year of fee payment: 5

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees