JP3066201B2 - Circuit board and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board and a method of manufacturing the same, and more particularly, to a circuit board on which semiconductor elements are mounted via solder bumps and a method of manufacturing the same.

[0002]

2. Description of the Related Art A multi-layer circuit board or the like on which a semiconductor element is mounted has a mounting portion to which solder bumps on the semiconductor element side are joined on one main surface, and an input portion electrically connected to an external electric board on the other main surface side. And an output pad. The mounting portion is composed of, for example, nickel and a gold plating layer formed on a thin film wiring layer made of copper. Further, the input / output pad is composed of two nickel plating layers formed on the input / output terminals of the thick film wiring layer made of tungsten or molybdenum. The nickel plating layer of the mounting portion and the second nickel plating layer of the input / output pad are simultaneously formed by an electroless plating method.

[0003]

In the conventional circuit board, when the simultaneous electroless nickel plating is performed, the plating on the nickel plating layer is preferentially performed, and a non-plated portion is generated in the thin film wiring layer. I will. This is because nickel and copper have different surface potentials. When a non-plated portion occurs in the thin film wiring layer, the bonding strength of the mounting portion decreases.

An object of the present invention is to form a sufficient plating layer on both a mounting portion of a circuit board and input / output pads.

[0005]

A circuit board according to a first aspect of the present invention includes an insulator, input / output pads, and a mounting portion. The insulator has an input / output terminal and a wiring layer on a surface. The input / output pad is formed on an input / output terminal. The mounting portion is for mounting a semiconductor element via a solder bump, and is provided on a wiring layer. The input / output pad includes a first nickel plating layer formed on the input / output terminal, and a second nickel plating layer formed on the first nickel plating layer by electroless nickel plating. The mounting portion includes a nickel sputtered layer formed on the wiring layer by a sputtering method, and a third nickel plated layer formed on the nickel sputtered layer by an electroless nickel plating method.

According to a second aspect of the present invention, there is provided a circuit board manufacturing method comprising: a preparation step, a first plating step, a sputtering step,
And a second plating step. In the preparation step, an insulator having input / output terminals on the surface is prepared. In the first plating step, a first nickel plating layer is formed on the input / output terminals. In the sputtering process, a nickel layer is formed on the wiring layer by a sputtering method while a wiring layer is formed. In the second plating step, a second nickel plating layer is formed on the first nickel plating layer by an electroless nickel plating method, and at the same time, a third nickel plating layer is formed on the nickel sputtering layer.

[0007]

In the circuit board according to the first aspect of the invention, the second nickel plating layer of the input / output pad and the third nickel plating layer of the mounting portion can be formed simultaneously by electroless nickel plating. At this time, the wiring has a surface potential substantially the same as that of the first nickel plating layer of the input / output pad since a nickel sputtered layer is previously formed thereon by a sputtering method. As a result, the second nickel plating layer of the input / output pad and the third nickel plating layer of the mounting portion are both formed uniformly, and a non-plated portion hardly occurs in any of them.

In the method for manufacturing a circuit board according to the second invention,
A nickel sputtering layer is formed on the wiring layer in the sputtering process. Therefore, when the second nickel plating layer and the third nickel plating layer are simultaneously formed in the second plating step, the first nickel plating layer and the nickel sputter layer have substantially the same surface potential, so that the second nickel plating layer and the nickel sputter layer have the same surface potential. Both the plating layer and the third nickel plating layer are formed uniformly, and a non-plated portion hardly occurs in any of them.

[0009]

FIG. 1 shows a multilayer circuit board 1 as one embodiment of the present invention. The multilayer circuit board 1 mainly includes a ceramic substrate 2, a resin insulating layer 3 made of polyimide laminated on the ceramic substrate 2, input / output pads 4 formed on the lower surface of the ceramic substrate 2, and a resin insulating layer 3. And a bump mounting portion 5 formed on the upper surface of the substrate. The first thin film wiring layer 6 made of copper is formed between the ceramic substrate 2 and the first insulating layer 3a. Second thin film wiring layer 7
Is formed between the first insulating layer 3a and the second insulating layer 3b. The third thin-film wiring layer 8 is formed between the second insulating layer 3b and the third insulating layer 3c. Fourth thin film wiring layer 9
Is formed on the third insulating layer 3c, and the bump mounting portion 5 is provided thereon. Each thin film wiring layer is electrically connected via a through hole.

Inside the ceramic substrate 2, there is formed a thick-film wiring conductor 10 made of molybdenum, tungsten or the like and electrically connected to the first thin-film wiring layer 6. The thick film wiring conductor 10 has an input / output terminal portion 10a (FIG. 2) exposed on the lower surface of the ceramic substrate 2. The input / output pad 4 is formed on the input / output terminal 10a.

The structure of the input / output pad 4 will be described with reference to FIG. The input / output pad 4 is formed of a first nickel-plated layer 11 containing boron, a second nickel-plated layer 12 containing phosphorus, and a gold-plated layer 13 formed in this order on the input / output terminal portion 10a. . This input / output pad 4
, The thick film wiring conductor 10 can be electrically connected to an external electric circuit board.

The bump mounting portion 5 shown in FIG. 3 is composed of a nickel sputter layer 15 formed on the fourth thin film wiring layer 9 in sequence and a third nickel plating layer 16 formed on the nickel sputter layer 15. And a gold plating layer 17 formed on the third nickel plating layer 16. Third
The nickel plating layer 16 contains phosphorus similarly to the second nickel plating layer 12 of the input / output pad 4.

A chromium adhesion layer 14 is formed between the fourth thin film wiring layer 9 and the third insulating layer 3c made of polyimide. The chromium adhesion layer 14 is for improving the adhesion between the fourth thin film wiring layer 9 and the third insulating layer 3c, and furthermore, the copper of the fourth thin film wiring layer 9 diffuses into the third insulating layer 3c. Is prevented. Next, a method for manufacturing the multilayer circuit board 1 will be described. The ceramic substrate 2 is formed from a plurality of ceramic green sheets. After the ceramic green sheet is appropriately punched, a metal paste made of a high melting point metal powder such as tungsten or molybdenum is applied by a screen printing method. Next, a plurality of ceramic green sheets are laminated to form a ceramic green sheet and a laminate, and the laminate is formed at an appropriate temperature to form the ceramic substrate 2 including the thick film wiring conductor 10 therein.

Next, the ceramic substrate 2 having the thick-film wiring conductor 10 was heated to 70 ° C. comprising 2.0 g / l of amine palladium chloride, 50.0 g / l of potassium hydroxide, and 5.0 g / l of ethylenediaminetetraacetate. For 5 minutes. Then, the surface of the input / output terminal portion 10a, which is the exposed portion of the thick film wiring conductor 10, is activated. Next, the ceramic substrate 2 was coated with nickel sulfate 30.0.
g / l, sodium citrate 50.0 g / l, ammonium acetate 10.0 g / l, dimethylamine borane 3.0
It is immersed in a nickel plating solution having a liquid temperature of 60 ° C. and a temperature of 60 g for 20 minutes. Then, the first nickel plating layer 11 is attached to the surface of the input / output terminal portion 10a. This first nickel plating layer 11 prevents oxidation of the thick film wiring conductor 10.

Next, a thin-film copper layer is formed on the upper surface of the ceramic substrate 2 by vapor deposition, sputtering, or the like. Then, apply, develop and etch photosensitive resist,
The first thin film wiring layer 6 having a desired pattern is formed. next,
A photosensitive polyimide paste is applied on the ceramic substrate 2 by a spin coating method, and baking, exposure, development, and baking are continuously performed, and baked in a furnace at about 400 ° C. in a nitrogen atmosphere. 3a is formed. The method for forming the second resin insulating layer 3b and the third resin insulating layer 3c and the method for forming the second, third and fourth thin film wiring layers are the same as those described above. Is formed.

The fourth thin film wiring layer 9 is formed on the adhesion layer 14 made of chromium. Nickel sputtering is performed on the surface of the ceramic substrate 2. That is, purity 99.9.
Using a nickel target of 9% or more, a target applied current of 8 A, an argon gas flow rate of 23 SCCM, and a degree of vacuum of 0.
5 Pascal, target-substrate distance about 60 mm, about 3
Sputtering is performed for 0 minutes. The nickel sputter layer formed at this time has a thickness of 0.1 to 1.0 μm.
It is preferably within the range. Subsequently, well-known resist processing and etching are performed to obtain a desired nickel sputtering layer 15.

An electroless plating process is performed on the ceramic substrate 2. That is, the ceramic substrate 2 was prepared by adding 2.0 g / l of amine palladium chloride, 50.0 g / l of potassium hydroxide, and 5.0 g / l of ethylenediaminetetraacetic acid.
Then, the first nickel plating layer 11 and the nickel sputtering layer 15 are activated by immersing in a 70 ° C. activation solution for 5 minutes. This ceramic substrate 2 was coated with nickel chloride 16.
0 g / l, sodium hypophosphite 24.0 g / l, sodium succinate 16.0 g / l, malic acid 18.0 g / l
For about 10 minutes in a nickel plating bath having a liquid temperature of 90 ° C. As a result, the third nickel plating layer 16 is formed on the bump mounting portion 5 and the second nickel plating layer 12 is formed on the first nickel plating layer 11 of the input / output pad 4 at the same time. At this time, since the portions serving as the bases at both locations are made of nickel, the potentials are equal.
Therefore, plating is uniformly formed on both of them, and non-plating is prevented on one side.

Finally, a gold plating layer 17 and a gold plating layer 13 are simultaneously formed on the surfaces of the third nickel plating layer 16 and the second nickel plating layer 12, respectively. In particular,
The ceramic substrate 2 was prepared by adding 5.0 g of potassium potassium cyanide /
1, 50.0 g / l of potassium citrate and 5.0 g / l of ethylenediaminetetraacetic acid are immersed in a primary gold plating bath at a liquid temperature of 90 ° C. for 5 minutes to form primary gold plating. Thereafter, the ceramic substrate 2 was prepared by adding 5.0 g / l of potassium gold cyanide and 10 g of potassium cyanide.
0 g / l, potassium citrate 50.0 g / l, potassium hydroxide 15.0 g / l, dimethylamine borane 20.0
g / l in a secondary gold plating bath at a liquid temperature of 70 ° C.
The gold plating layer 17 and the gold plating layer 13 are formed at the same time by immersion for minutes.

In this embodiment, nickel plating can be performed simultaneously on both the input / output pad 4 and the bump mounting portion 5. In the conventional example, since it is necessary to separately form a nickel plating layer, first, the input / output pad side is coated with an organic resist film or the like, and a nickel and gold plating layer is formed on the thin film wiring layer side. Next, the organic resist film on the input / output pad side is peeled off, the thin film wiring layer is coated with an organic resist film or the like, and a nickel or gold plating layer is formed on the input / output pad side. In this manufacturing method, a step of coating an organic resist film and removing the same is required on both the input / output pad side and the bump mounting portion.
Since the operation has to be performed several times, the number of steps is increased, and the work is complicated. Furthermore, in the input / output pad part,
In order to form an organic resist film coat on the first nickel plating layer, the organic resist residue after peeling may reduce the adhesion of the second nickel plating layer. In the multilayer circuit board 1 according to the present invention, since the nickel plating layer can be simultaneously formed, the above-described problems do not occur.

The applicant of the present invention has five input / output pads.
A comparison was made of the non-plating rate between the conventional technology and the one employing the present invention for 10,000 substrates having 00 pieces. In the prior art, unplated input / output pads occurred on 0.9% of the substrates, but none of the substrates employing the present invention had unplated input / output pads. [Other Embodiments] In the above embodiment, a multilayer circuit board in which a plurality of resin insulating layers are formed on a ceramic substrate has been described as one embodiment of the present invention. However, as shown in FIG. The present invention can also be applied to a device having a plurality of thin film wiring layers. The thin-film single-layer circuit board 21 shown in FIG. 4 has a ceramic substrate 22, an input / output pad 24 exposed on the lower surface of the ceramic substrate 22, and an upper surface of the ceramic substrate 22 on which semiconductor elements (not shown) are mounted via solder bumps. And a bump mounting portion 25 formed on the substrate. A thick-film wiring conductor 30 extending vertically is formed in the ceramic substrate 22. The input / output pad 24 and the bump mounting portion 25 are electrically connected by the thick film wiring conductor 30. Note that a thin film wiring layer 29 connected to the thick film wiring conductor 30 is formed on the upper surface of the ceramic substrate 22. The above-mentioned bump mounting portion 25 is formed on the thin film wiring layer 29.

In this embodiment, the input / output pad 24
The structure of the bump mounting portion 25 is the same as that of the above embodiment. Therefore, the same effects as in the above embodiment can be obtained both in the manufacturing process and in the manufactured product.

[0022]

In the circuit board according to the first aspect of the present invention, since the nickel sputter layer is formed on the mounting portion in advance, the second nickel plating layer of the input / output pad and the third nickel plating layer of the mounting portion are different from each other. It is formed uniformly by the electroless plating method, and a non-plated portion hardly occurs in any of them.

In the method for manufacturing a circuit board according to the second invention,
A nickel sputtering layer is formed on the wiring layer in the sputtering process. Therefore, when the second nickel plating layer and the third nickel plating layer are simultaneously formed by the electroless plating method in the second plating step, the two are uniformly formed, and both of them are less likely to have no plating.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view of a multilayer circuit board as one embodiment of the present invention.

FIG. 2 is an enlarged partial view of FIG. 1;

FIG. 3 is an enlarged partial view of FIG. 1;

FIG. 4 is a schematic longitudinal sectional view of a single-layer thin-film circuit board as another embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Multilayer circuit board 4 I / O pad 5 Bump mounting part 9 4th thin film wiring layer 10a I / O terminal section 11 1st nickel plating layer 12 2nd nickel plating layer 15 nickel sputter layer 16 3rd nickel plating layer 21 single layer thin film circuit Substrate 22 Ceramic substrate 24 I / O pad 25 Bump mounting part 29 Thin film wiring layer

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H05K 1/11 H01L 21/60 311 H05K 3/24 H05K 3/46

Claims (2)

(57) [Claims] An insulator having an input / output terminal and a wiring layer on a surface, an input / output pad formed on the input / output terminal, and a semiconductor element mounted on the wiring layer via a solder bump. Wherein the input / output pads are formed by a first nickel plating layer formed on the input / output terminals and an electroless nickel plating method on the first nickel plating layer. A second nickel plating layer, wherein the mounting portion includes a nickel sputtering layer formed on the wiring layer by a sputtering method, and a third nickel plating layer formed on the nickel sputtering layer by an electroless nickel plating method.
A circuit board comprising a nickel plating layer. 2. A preparation step of preparing an insulator having an input / output terminal on a surface thereof, and a first step of forming a first nickel plating layer on the input / output terminal.
A plating step; forming a wiring layer on the insulator; and forming a nickel sputtering layer on the wiring layer by a sputtering method; and a second electroless nickel plating method on the first nickel plating layer. A second plating step of forming a nickel plating layer and simultaneously forming a third nickel plating layer on the nickel sputtering layer.