JPH0656861B2 - Board-to-board connector manufacturing method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a terminal connection technique, and more particularly to a method for manufacturing inter-board connection terminals.

2. Description of the Related Art A board-to-board connection terminal (Japanese Patent Application No. 156621 in 1985) has been proposed as a terminal connection method between a large chip and a wiring board. FIG. 5 is a diagram showing the above embodiment, in which a is a chip, b is an electrode, c is a wiring board, d is a terminal portion, and e is
Is a solder bump, l, l ′ and l ″ are metal layers such as Cu having wettability to solder, m is Ti which is not wettable to the solder sandwiched between the metal layers l and l ′. And n is a heat-resistant resin film such as polyimide, etc. A conventional method for manufacturing the inter-substrate connector shown in Fig. 5 will be described with reference to Fig. 6. Fig. 6 (a) So that 12.5
Approximately 25 μm of polyimide film n is used as a base material by vacuum deposition method, etc., and Cu (about 5 μm), Ti (about
0.2-1 μm), Cu (about 5 μm), Ti (about 0.5-1 μm)
Is continuously vapor-deposited in this order on l'-m-l-m 'and Cu is deposited on the lower surface.
Then, as shown in FIG. 6 (b), a film-like resist having a thickness of about 50 μm is laminated on both sides, and this is placed between two masks which are previously aligned. The film-shaped resist o is developed by picking and exposing both sides and using trichloroethane etc. Then, as shown in FIG. 6 (c), Cu (l ″) on the lower surface is obtained.
Etching with an aqueous solution of ammonium persulfate having selectivity for Ti. Next, as shown in FIG. 6 (d), the film-shaped resist o on the upper surface is used as a mask to etch Ti (m ') with an aqueous solution of hydrofluoric acid, which has selectivity for Cu, and an aqueous solution of ammonium persulfate, etc. Etch Cu (l) and finally etch Ti (m) with hydrofluoric acid solution. Next, as shown in FIG. 6 (e), after removing the film-shaped resist o with acetone or the like, Cu on the lower surface is removed.
Using (l ″) as a mask, the polyimide film n is etched with an aqueous solution of hydrazine or the like to obtain the opening p.
As shown in Figure (f), a film-like resist is laminated and developed on the upper and lower surfaces to obtain patterns o'and o "slightly larger than the opening p. Next, the film-like resist o'and Cu on the lower surface with o "as a mask
After etching (l ″) with an aqueous solution of ammonium persulfate or the like, the film-like resist is peeled off using acetone or the like, and the film-like resist o is laminated again as shown in FIG. Etching (l ′) with an aqueous solution of ammonium persulfate etc. Next, as shown in FIG. 6 (h), after etching Ti (m ′) with an aqueous solution of hydrofluoric acid, the film-like resist o on the lower surface is removed with acetone. A multi-layered metal layer is formed by peeling using a method such as.

In general, when a metal is vacuum-deposited, it is possible to obtain a dense metal film without pinholes by heating a sample to a high temperature to perform vapor deposition. During the above manufacturing process, when Cu-Ti-Cu-Ti is continuously vapor-deposited on the polyimide film, when heated at a high temperature, a thin polyimide film serving as a substrate forms a metal film in a deformed state due to thermal expansion. Therefore, pattern formation becomes difficult in the subsequent steps. Therefore, in this manufacturing method, in order to prevent deformation of the polyimide film due to thermal expansion, it is necessary to form the metal layer at a low temperature without heating the sample. However, when Ti is formed by low temperature vapor deposition, the film quality is porous. Therefore, as shown in FIG. 6 (g), when Cu (l ') on the upper surface is chemically etched using Ti (m') as a mask, the Cu (l) layer under the Ti (m ') mask is etched. Is also etched, resulting in many pinholes reaching the Ti (m) layer sandwiched in between. In this state, as shown in FIG. 6 (h), the Ti (m) layer exposed at the pinholes generated when the uppermost layer Ti (m ') was removed by etching with a hydrofluoric acid solution or the like. Is also etched, and many pinholes (h) are generated in the sandwiched Ti (m) layer. Therefore, the 7th
As shown in the figure, when the solder ball is melted, there is a problem that the solder partially penetrates from the pinhole portion and is integrated.

OBJECT OF THE INVENTION It is an object of the present invention to provide a method for producing a multi-layered metal layer that completely prevents penetration of solder due to melting in a process for producing connection terminals of multi-stage solder bumps.

Structure of the Invention Differences between Features of the Invention and Conventional Technology In the conventional technology, a multilayer metal layer is formed by using Ti of low-temperature deposition as a mask, so the multilayer metal layer contains many pinholes. . However, as in the present invention, when a method of forming a multi-layered metal layer using Al having no pinhole even at low temperature deposition as a mask or a method of forming a multi-layered metal layer by plating using a mask, pinholes are used. It is different from the prior art in that a good multi-layer metal layer can be formed.

Example FIG. 1 shows a first example of the production method of the present invention for forming a multi-layer metal layer at a low temperature. Using Figure 1,
A process of manufacturing the inter-substrate connection terminal when Al is used as the mask material will be described. As shown in Fig. 1 (a), 12.5
Approximately 25 μm of polyimide film n is used as a base material by vacuum deposition method, etc., and Cu (about 5 μm), Ti (about
0.2-1 μm), Cu (about 5 μm), Al (about 0.5-1 μm)
Is continuously vapor-deposited in this order on l'-m-la, and Cu is deposited on the lower surface.
(About 2 μm) l ″ is deposited. Next, as shown in FIG. 1 (b), a film-like resist (dry film) with a thickness of about 50 μm is laminated on both sides, and this is pre-aligned 2 It is sandwiched between masks, exposed on both sides, and a film-like resist o is developed using a developer such as trichloroethane to obtain a desired pattern.
As shown in Figure (c), Cu (l ″) on the lower surface is etched with an aqueous solution of ammonium persulfate, which has selectivity for Al and Ti. Next, as shown in Figure 1 (d), Using the film-shaped resist o on the surface as a mask, etch Al (a) with hydrochloric acid, etc., which has selectivity for Cu, etch Cu (l) with an aqueous solution of ammonium persulfate, and finally with respect to Al and Cu. Ti with a hydrofluoric acid aqueous solution that has selectivity
Etching (m). Next, as shown in FIG. 1 (e), after removing the film-shaped resist o with acetone or the like, the polyimide film n is etched with a hydrazine aqueous solution or the like using Cu (l ″) on the lower surface as a mask, An opening p is obtained Next, as shown in Fig. 1 (f), a film-like resist is laminated and developed on the upper surface and the lower surface to obtain patterns o'and o "slightly larger than the opening p. Next, using the film-like resists o ′ and o ″ as masks,
After etching Cu (l ″) on the lower surface with an ammonium persulfate aqueous solution or the like, the film-like resist is peeled off using acetone or the like, and the film-like resist o is laminated again as shown in FIG. 1 (g). Etching Cu (l ') on the upper surface with an aqueous solution of ammonium persulfate etc. Next, as shown in Fig. 1 (h), after etching Al (a) with hydrochloric acid etc., a film-like resist o on the lower surface is formed. A multi-layer metal layer is formed by peeling off using acetone etc. Then, a small solder ball is placed on the Cu (l) portion of the upper surface through a mask, and after heating and melting, it is cooled and fixed, and then, as shown in FIG. As shown in (i), a basic structure having solder bumps fixed thereto is formed.

The manufacturing method is not limited to the first embodiment shown here, and the manufacturing method can be changed within the scope of the claims of the present invention. For example, Al-Si and Al-Cu, which are Al-based alloys containing a small amount of another substance, can be used as the mask material. Furthermore, Cr or the like formed by plating can be used as the mask material.

FIG. 2 shows a second embodiment of the manufacturing method of the present invention for forming a multi-layered metal layer at a low temperature.

The process of forming a multi-layer metal layer by electroless plating or the like will be described below with reference to FIG. As shown in FIG. 2 (a), a polyimide film n having a thickness of about 12.5 to 25 μm is used as a base material, and Cu (about 5 μm) l is formed on the upper surface and Cu (about 2 μm) on the lower surface.
μm) l ″ is deposited by depositing Cu foil with a vapor deposition, spatter, and room temperature curing adhesive. Next, as shown in FIG. 2 (b), a film with a thickness of about 50 μm is formed on both sides. -Shaped resist (dry film) is laminated, the lower surface is exposed, and the film-shaped resist o is developed using trichloroethane or the like to obtain a desired pattern.
As shown in Figure (c), the lower surface Cu (l ") is etched with an aqueous solution of ammonium persulfate, etc. Next, as shown in Figure 2 (d), a film-shaped resist o is formed using acetone or the like. After peeling, the polyimide film n is etched with a hydrazine aqueous solution or the like using Cu (l ″) on the lower surface as a mask to obtain an opening p. Next, as shown in FIG. 2 (e), a film-shaped resist is laminated on the upper surface, and a Cr metal layer m having no wettability with respect to solder is opened in an aqueous solution of chromic acid or the like by electroplating to form a p-layer. After the formation, the Cu film 1'having a wettability to solder is formed by electrolytic plating in an aqueous solution of copper sulfate or the like to form a Cu film having a thickness of about 5 μm.
Next, as shown in FIG. 2 (f), a film-like resist (dry film) having a thickness of about 50 μm to 100 μm is laminated and developed on both the upper surface and the lower surface, and a hole slightly larger than the opening p is formed. To obtain open resist patterns q and q '. Next, using the film-like resists q and q'as masks, as shown in FIG. 2 (g), a solder layer (50 to 50 100
.mu.m) e, e'are formed by electrolytic plating in a blister solution or the like. Next, as shown in FIG. 2 (h), after removing the film-like resist using acetone or the like, as shown in FIG. 2 (i), the solder layers e and e ′ are used as a mask to Etching the Cu (l) on the surface and Cu (l ″) on the lower surface with ammonium persulfate aqueous solution, etc. Then, in this state, melt the solder through an electric furnace to form solder bumps, and use it as the inter-terminal connector. (Fig. 2 (j)).

The manufacturing method is not limited to the second embodiment shown here, and the manufacturing method can be changed within the scope of the claims of the present invention. For example, when forming a solder layer, it is possible to deposit Pb and Sn separately.

Next, the reason for adopting such a manufacturing method will be described.

In the board-to-board connector (Japanese Patent Application No. 156621 in 1985), Cu
When Ti is used as a mask material when patterning a multi-layer metal layer of -Ti-Cu, the low-temperature deposited Ti is porous,
The etching liquid penetrates into the Ti of the mask, and the multilayer metal layer is etched to form pinholes as shown in FIG. Although Ti sandwiched in the middle is also porous, penetration of solder can be prevented. As a result, the solder has wettability.
Even in a multi-layer metal layer having a structure in which a Ti layer having a solder diffusion preventing effect is inserted in the middle of Cu, the solder diffuses from the pinholes and penetrates through several times to be integrated. For this reason, in the present invention, a multi-layer metal layer formed by Al is used as a mask material, which is free from pinholes even at low temperature vapor deposition, as a mask material, or is formed by plating. FIG. 4 shows the solder penetration rate in the pinhole portion as the number of times of melting of the solder. From this, it can be seen that the multi-layer metal layer produced by the production method of the present invention is superior to the conventional production method using Ti as the mask material without penetration of solder.

Further, in the manufacturing method using plating, it is possible to form a multi-layered metal layer having excellent adhesiveness, and moreover, the number of times of mask alignment can be adjusted by the conventional method or the first method of the present invention in all steps until the solder bumps are formed. Since it is possible to improve the patterning accuracy by reducing the number of times from three times in one embodiment to two times,
A finer terminal can be obtained.

EFFECTS OF THE INVENTION As described above, according to the present invention, it is possible to form a multilayer metal layer without pinholes, prevent penetration by molten solder, and manufacture a connector having a structure in which solder bumps are stacked.

[Brief description of drawings]

1 (a) to 1 (i) show the manufacturing process of the first embodiment of the present invention. 2 (a) to 2 (j) show the manufacturing process of the second embodiment of the present invention. FIG. 3 is a diagram for explaining the drawbacks of the inter-board connector proposed by the applicant of the present application. FIG. 4 shows the characteristics of the solder penetration rate-melting frequency of the multi-layer metal layer according to the manufacturing method of the present invention and the multi-layer metal layer according to the conventional manufacturing method (FIG. 6) in comparison. FIG. 5 shows a structure of a prior art inter-board connector proposed by the applicant of the present application. 6 (a) to 6 (h) show a method of manufacturing the inter-board connector of FIG. FIG. 7 shows a cross-sectional view of the case where solder bumps are formed on a multi-layer metal layer produced by a Ti mask of the prior art. In FIG. 1, n: polyimide film (12.5 to 25 μm) a: Al 1 ′: Cu m: Til: Cu 1 ″: Cu o, o ′, o ″, o: film-like resist

Claims (3)

[Claims] 1. A first metal layer made of a first metal having a wettability with solder and a first metal layer having a wettability with solder on a first main surface of a supporting substrate having an insulating property, and being alloyed with the solder. The second metal layer made of the second metal, the third metal layer made of the first metal, and the fourth metal layer made of the fourth metal are sequentially laminated, and the first metal layer is formed on the second main surface. A step of forming a fifth metal layer made of a metal, a step of applying a resist on the fourth metal layer to form a mask after pattern formation, and etching the fourth metal layer with the mask to form a metal mask, Etching the first, second, and third metal layers with the metal mask, and applying a resist to the fifth metal layer arranged on the second main surface to form a mask after pattern formation, 2, on the back surface of the remaining portion of the third and fourth metal layers,
A step of forming an opening portion having a smaller area than the remaining portion in the fifth metal layer; a step of etching the support substrate from the fifth metal opening portion to form a through hole reaching the first metal layer; Forming a resist residual pattern having an area slightly larger than the opening of the fifth metal layer; etching the fifth metal layer using the resist pattern as a mask; etching the fourth metal layer; Step of removing and placing a small solder ball through a mask directly above the first, second, and third metal remaining portions on the first main surface, heating and melting, then cooling and fixing, and solder bump fixing In the manufacturing process that forms the basic structure,
The fourth metal layer can be formed at 150 degrees Celsius or less, and
A method for manufacturing an inter-substrate connector, which uses a metal having no pinholes and not soluble in a chemical etching liquid for the first metal layer. 2. The method of manufacturing an inter-substrate connector according to claim 1, wherein an Al mask material is used as the fourth metal layer. 3. A first metal layer made of a first metal having solderability and wettability on a first main surface of an insulating support substrate, and a solderability and wettability on a second main surface. Forming a second metal layer composed of a second metal having a metal, a resist is applied to the second metal layer provided on the second main surface to form a mask after pattern formation, and an opening is formed in the second metal layer. And the etching of the support substrate through the opening to form the first
A step of forming a through hole reaching the metal layer, and a third metal having no wettability with respect to solder and alloying with solder is selected on the first metal layer in the through hole. Electrolessly depositing to form a third metal layer, and a fourth metal layer made of a fourth metal having wettability to solder is electrolyzed on the third metal layer. A step of forming by plating, a step of forming a resist opening pattern having an area slightly larger than the second metal layer opening on the first metal layer and the second metal layer, and using the resist pattern as a mask, Manufacturing of forming a solder layer on the first metal layer and the fourth metal layer by electrolytic plating, removing a resist, cooling by heating and melting, and forming a basic structure with solder bumps fixed A group characterized by comprising steps and Manufacturing method of interplane connectors.