JPS6027051B2 - ランダム・アクセス記憶装置のアクセス時間短縮装置 - Google Patents

ランダム・アクセス記憶装置のアクセス時間短縮装置

Info

Publication number
JPS6027051B2
JPS6027051B2 JP52039587A JP3958777A JPS6027051B2 JP S6027051 B2 JPS6027051 B2 JP S6027051B2 JP 52039587 A JP52039587 A JP 52039587A JP 3958777 A JP3958777 A JP 3958777A JP S6027051 B2 JPS6027051 B2 JP S6027051B2
Authority
JP
Japan
Prior art keywords
data
output buffer
clock
signal
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52039587A
Other languages
English (en)
Japanese (ja)
Other versions
JPS52132638A (en
Inventor
ユエイ・ポ−・リン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Publication of JPS52132638A publication Critical patent/JPS52132638A/ja
Publication of JPS6027051B2 publication Critical patent/JPS6027051B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operations
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP52039587A 1976-04-29 1977-04-08 ランダム・アクセス記憶装置のアクセス時間短縮装置 Expired JPS6027051B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US681675 1976-04-29
US05/681,675 US4051355A (en) 1976-04-29 1976-04-29 Apparatus and method for increasing the efficiency of random access storage

Publications (2)

Publication Number Publication Date
JPS52132638A JPS52132638A (en) 1977-11-07
JPS6027051B2 true JPS6027051B2 (ja) 1985-06-27

Family

ID=24736275

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52039587A Expired JPS6027051B2 (ja) 1976-04-29 1977-04-08 ランダム・アクセス記憶装置のアクセス時間短縮装置

Country Status (6)

Country Link
US (1) US4051355A (https=)
JP (1) JPS6027051B2 (https=)
CA (1) CA1070850A (https=)
DE (1) DE2719291C3 (https=)
FR (1) FR2349917A1 (https=)
GB (1) GB1536103A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6235952U (https=) * 1985-08-23 1987-03-03

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228496A (en) * 1976-09-07 1980-10-14 Tandem Computers Incorporated Multiprocessor system
US4360915A (en) * 1979-02-07 1982-11-23 The Warner & Swasey Company Error detection means
WO1983000242A1 (en) * 1981-06-26 1983-01-20 Ncr Co High speed memory error checker
US4464754A (en) * 1982-03-26 1984-08-07 Rca Corporation Memory system with redundancy for error avoidance
US4612640A (en) * 1984-02-21 1986-09-16 Seeq Technology, Inc. Error checking and correction circuitry for use with an electrically-programmable and electrically-erasable memory array
ES2074058T3 (es) * 1989-01-27 1995-09-01 Siemens Ag Procedimiento para el tratamiento de palabras codificadas binarias supervisables en la paridad, que experimentan en el transcurso de su transmision una atenuacion digital y/o conversion de codigo.
US5283763A (en) * 1989-09-21 1994-02-01 Ncr Corporation Memory control system and method
US5500950A (en) * 1993-01-29 1996-03-19 Motorola, Inc. Data processor with speculative data transfer and address-free retry
US6061305A (en) * 1997-06-25 2000-05-09 Advanced Micro Devices, Inc. Device to measure average timing parameters
US6167032A (en) * 1997-11-07 2000-12-26 International Business Machines Corporation System and method for avoiding host transmit underruns in a communication network
US6137804A (en) * 1997-12-02 2000-10-24 International Business Machines Corporation System and method for automatic retry of transmit, independent of a host processor, after an underrun occurs in a LAN
JP3741077B2 (ja) * 2002-05-22 2006-02-01 日本電気株式会社 データ転送装置
GB0905377D0 (en) * 2009-03-30 2009-05-13 Danmedical Ltd Medical apparatus
CN105283850A (zh) * 2013-06-27 2016-01-27 惠普发展公司，有限责任合伙企业 存储器总线误差信号
WO2015065426A1 (en) 2013-10-31 2015-05-07 Hewlett-Packard Development Company, L.P. Memory access for busy memory
US10073652B2 (en) * 2015-09-24 2018-09-11 International Business Machines Corporation Performance optimized storage vaults in a dispersed storage network

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3619585A (en) * 1969-11-17 1971-11-09 Rca Corp Error controlled automatic reinterrogation of memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6235952U (https=) * 1985-08-23 1987-03-03

Also Published As

Publication number Publication date
JPS52132638A (en) 1977-11-07
DE2719291C3 (de) 1979-05-31
US4051355A (en) 1977-09-27
DE2719291A1 (de) 1977-11-10
FR2349917B1 (https=) 1982-07-09
CA1070850A (en) 1980-01-29
GB1536103A (en) 1978-12-20
FR2349917A1 (fr) 1977-11-25
DE2719291B2 (de) 1978-10-05

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