JPS60246673A - Solid-state image pickup element - Google Patents

Abstract

PURPOSE:To reduce the size of a resetting mechanism for a storage capacitor for beam generating carriers, and to increase density by unifying gate and drain electrodes in an MOS type field-effect transistor. CONSTITUTION:An N type region 2 forms a photodiode through a joining with a P type semiconductor substrate 1. A depletion layer 4 is shaped to the P type substrate 1, and a storage gate electrode 3 storing beam generating carriers in the photodiode and a barrier gate electrode 5 for setting the potential of the photodiode are formed. An N<+> drain region 6 and a resetting gate electrode 7 constitute an MOSFET using the depletion layer 4 as a source. An electrode for drawing out charges is unified with the resetting gate electrode 7. A margin of an opening and the N<+> drain diffusion layer 6 on the formation of the opening of an insulating film is unnecessitated, thus miniaturizing resetting structure.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a solid-state image sensor, and particularly to a solid-state image sensor equipped with a reset mechanism for a storage capacitor for photogenerated carriers.

[Prior art]

FIG. 1(a) is a cross-sectional view showing the configuration of a solid-state image sensor equipped with a reset mechanism according to a conventional example. Reference numeral 1 denotes a P-type semiconductor substrate, and 2 denotes an N-type region, which forms a photodiode by joining with the P-type semiconductor substrate l. 3 is a P-type substrate 1
5 is a storage gate electrode for forming a depletion layer 4 to accumulate photogenerated carriers of the photodiode; 5 is a barrier gate electrode for setting the potential of the FiN type region 2, that is, the photodiode; 6 is an N+ type drain; Region 7 is a reset gate electrode. The N+ drain region and the reset gate electrode 7 constitute a MOSFET using the depletion layer 4 as a source. 8 is a charge extraction electrode connected to the N+ type drain region.

Next, the operation will be explained with reference to FIG. 1(b).

FIG. 1(b) is a diagram showing the potential distribution of each part shown in FIG. 1(a). φIIT l φ8. φD is the pariah gate electrode 5. Storage gate electrode 3. Reset gate electrode7. This is the potential of the N+ drain region 6.

First, the photogenerated carriers generated in the N-type region 2 reach the potential φB
, and is collected at a potential φ8 below the storage gate electrode 3. Therefore, the potential φ8T gradually becomes shallower, φ
, when the depth becomes shallower, the carriers exceed the potential φ8 and are collected in the N+ drain region 6 at the potential φ9.Then, the carriers are sucked out by the electrode 8. In this case, the reset gate [poles 7 and ! The drain region 6 functions as a blooming suppression mechanism. Further, after sending the internal voltage under the charge storage gate 3 to the charge transfer register (not shown) connected to the output circuit diagram (not shown), the potential φR is changed to the potential φ8? If the voltage is set higher than that, the carriers remaining in the portion of the potential φ8T can be sucked out by the t diffusion layer 6. This makes it possible to remove the dark current component and widen the dynamic range of the solid-state image sensor.

By the way, in the conventional reset mechanism shown in FIG. 1(a),! 11 for sucking out charges from the type drain diffusion layer 6. When providing the pole 8, it is necessary to open a hole in the insulating film as thick as about 11 tm.

However, even with today's fine pattern technology, the size of this opening cannot be reduced to less than 2 μm square.
In order to ensure that the hole is formed in the mold drain diffusion layer 6 and taking into consideration the lateral etching when forming the hole, it is necessary to provide a margin of about 2 μm between the opening end and the edge of the furnace-type drain diffusion layer 6. be. Considering each dimension in this manner, the furnace-type drain diffusion layer has a size of 6 μm square.

Furthermore, the effective channel length of the reset gate electrode, ie, the distance between the end of the N+ type drain diffusion layer 6 and the end of the storage gate electrode 3, needs to be 3 μm or more, taking short channel effects and the like into account.

Therefore, the length when providing the reset mechanism is 9 μm in total, which is the effective channel length of 3 μm and the length of the N+ type drain diffusion layer 6 of 6 μm. This value is extremely large for solid-state imaging devices, which will become increasingly dense in the future, and will make it difficult to increase the density.

[Purpose of the invention]

An object of the present invention is to provide a solid-state imaging device that can be made higher in density by reducing the size of the reset mechanism.

[Structure of the invention]

A solid-state image sensor according to the present invention includes a photo-diode,
A storage gate electrode that stores carriers photogenerated by the photodiode and a gate and drain electrode of an MO8m field effect transistor whose source is a depletion layer under the storage gate electrode are integrated. .

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 2 is a cross-sectional view showing the configuration of a solid-state image sensor equipped with a reset mechanism according to an embodiment of the present invention, in which the same components as in FIG. 1(a) are denoted by the same reference numerals.

The N1 drain diffusion layer 6 is formed of N-type impurities diffused through or from the reset gate electrode (for example, polycrystalline silicon).

According to this configuration, the charge extraction electrode 8 shown in FIG. 1(a) is integrated with the pole 7 of the reset gate 1'. However, the potential φ in the P-type substrate under each electrode is exactly the same as that shown in FIG. 1(b).

In this manner, the opening −N+ drain diffusion layer margin when opening is indestructible, and the reset gate electrode 7 also serves as a charge sucking function. Total unnecessary margin amount is 4μ
m, so the length when providing the conventional reset structure is 9
μm is reduced to 5 μm, which is approximately noisy.

〔Effect of the invention〕

In this way, according to the present invention, the reset structure can be reduced to 1/2 that of the conventional one.
Therefore, a high-density solid-state imaging device can be achieved.

[Brief explanation of the drawing]

FIG. 1(a) is a cross-sectional view showing the configuration of a solid-state image sensor equipped with a conventional reset mechanism, and FIG.
FIG. 2 is a cross-sectional view showing the configuration of a solid-state image sensor equipped with a reset mechanism according to an embodiment of the present invention. 1...P-type semiconductor substrate, 2...N-type region. 3...Storage gate 'fki pole, 4...Depletion layer. 5... Barrier gate electrode, 6... N''ffl drain diffusion layer, 7... Reset gate electrode. 8...' Charge extraction electrode.

Claims (1)

[Claims] A solid-state imaging device comprising a photo-ψ diode, a storage gate electrode that stores carriers photogenerated by the photo-diode, and an MO8 type field effect transistor whose source is a depletion layer under the storage gate electrode. A solid-state imaging device characterized in that the gate and drain electrodes of an MO8ffl field effect transistor are integrated.