JPS6024588B2 - Manufacturing method for semiconductor lead frames - Google Patents
Manufacturing method for semiconductor lead framesInfo
- Publication number
- JPS6024588B2 JPS6024588B2 JP54168743A JP16874379A JPS6024588B2 JP S6024588 B2 JPS6024588 B2 JP S6024588B2 JP 54168743 A JP54168743 A JP 54168743A JP 16874379 A JP16874379 A JP 16874379A JP S6024588 B2 JPS6024588 B2 JP S6024588B2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- plating
- frame body
- plated
- area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】
この発明は半導体用のりードフレーム秦体の一面及び他
面に金、銀等の金属をメッキして、半導体用リードフレ
ームを製造する方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor lead frame by plating one side and the other side of a lead frame body with metal such as gold or silver.
従来よりこの様なりードフレームを製造するにあたって
は、リードフレーム秦体のまず一面に金属をメッキし、
然るのちその反対面にメッキをしていた。この様な方法
によれば一つのりードフレームを製造するにあたりメッ
キ操作を二回行なわなければならずその作業性が悪いと
いう欠点があった。Conventionally, when manufacturing lead frames like this, metal is first plated on the entire surface of the lead frame body.
Later, the other side was plated. This method has the disadvantage that the plating operation must be performed twice to produce one lead frame, resulting in poor workability.
又この様な方法では必要箇所以体の場合にもメッキが成
される為、メッキ用の金属の消費量が多く、不経済とな
る欠点があった。又上記の様な方法によれば、リードフ
レーム素体の一面にメッキをしているうちに他面が酸化
してしまい、その他面へのメッキの品質が極めて低下す
る問題点があつた。そこで本発明は上記欠点を除く様に
したもので、リードフレーム素体の表裏両面へのメッキ
を極めて作業性良く行なうことができ、又その場合に必
要なメッキ材料も節減することができ、更に又、メッキ
を良好に行なうことができて高品質の半導体用リードフ
レームを製造しうる様にした半導体用リードフレームの
製造方法を提供しようとするものである。In addition, this method has the disadvantage that plating is performed on more than the required areas, which results in a large consumption of metal for plating, making it uneconomical. Further, according to the above-described method, there is a problem that while one side of the lead frame body is being plated, the other side becomes oxidized, and the quality of the plating on the other side is extremely deteriorated. Therefore, the present invention is designed to eliminate the above-mentioned drawbacks, and it is possible to plate both the front and back sides of the lead frame body with extremely good workability, and in that case, the necessary plating materials can be saved, and furthermore, Another object of the present invention is to provide a method for manufacturing a semiconductor lead frame that allows for good plating and allows the manufacture of a high quality semiconductor lead frame.
以下本願の実施例を示す図面について説明する。The drawings showing the embodiments of the present application will be described below.
第１図乃至第３図に於いて、１は周知の半導体用リード
フレーム素体を示す。２，２′はリードフレーム秦体１
の一面及び他面に於けるそれぞれメッキ領域を示す。In FIGS. 1 to 3, reference numeral 1 indicates a well-known semiconductor lead frame body. 2, 2' are lead frame Qin body 1
The plated areas on one side and the other side are shown, respectively.
このメッキ領域２，２′は、リードフレーム素体１に於
いて半導体チップを取付ける為のマウント部３、或いは
リードフレーム素体に於けるインナーリードのうちのワ
イヤーボンデイングを行なう為のワイヤーボンディング
部等、金属をメッキする必要のある場所であり、この領
域は第２図に明示される様に前記マウント部３或いはワ
イヤーボンディング部４等が間隙５を介して存在し多孔
状となっている。次に７はリードフレーム秦体１の一面
に押当状に添わせた第１治具体で、前記メッキ領域２と
対応する部分には閉口部８が形成されている。この治具
体７の構成材料としては、電気絶縁性並びに耐蝕性を有
するゴム系材料及び樹脂系材料等を適用することができ
るが、天然ゴム及び合成ゴム（例えばクロロプレンゴム
、シリコンゴム、ブチルゴム、フタジェンゴム）等の材
料は、半導体用リードフレーム素体１への鉄合度の高い
フレキシブルで且つ弾発性の治具体を構成するので特に
望ましい。１０はリードフレーム素体１の他面に押当状
に添わせた第２袷具体で、メッキ領域２′に対応する部
分には閉口部１１を備えている。These plating areas 2, 2' are used as a mounting part 3 for attaching a semiconductor chip in the lead frame body 1, or a wire bonding part for wire bonding of the inner leads in the lead frame body, etc. This is the area where metal plating is required, and as clearly shown in FIG. 2, this area is porous with the mounting portion 3, wire bonding portion 4, etc. existing through a gap 5. Next, reference numeral 7 denotes a first jig which is pressed against one surface of the lead frame body 1, and a closed portion 8 is formed in a portion corresponding to the plated area 2. Rubber-based materials and resin-based materials that have electrical insulation and corrosion resistance can be used as the constituent material of this fixture 7, but include natural rubber and synthetic rubber (such as chloroprene rubber, silicone rubber, butyl rubber, phthalene rubber, etc.). ) and the like are particularly desirable because they form a flexible and resilient jig with a high iron content to the semiconductor lead frame body 1. Reference numeral 10 designates a second sleeve member attached to the other surface of the lead frame body 1 in a pressing manner, and is provided with a closed portion 11 in a portion corresponding to the plating area 2'.
又この第２拾具体１０は、第１図に明示される様に、リ
ードフレーム秦体１とは離間する位置にメッキ液の流通
を阻止する様にしたメッキ液阻止板１２を一体に備えて
いる。尚この第２治具体１０も前記第１治臭体７と同様
の材料で形成するとよい。尚１３は周知の噴流式部分メ
ッキ装置を示す。次にリードフレーム素体１に於けるメ
ッキ領域２，２′へのメッキ手段について説明する。Further, as clearly shown in FIG. 1, this second pick-up member 10 is integrally provided with a plating solution blocking plate 12 located at a distance from the lead frame body 1 to prevent the flow of the plating solution. There is. The second odor control body 10 may also be formed of the same material as the first odor control body 7. Reference numeral 13 indicates a well-known jet-type partial plating apparatus. Next, the means for plating the plating regions 2 and 2' in the lead frame body 1 will be explained.
先ずメッキ領域２，２′が研摩され清浄化されたりード
フレーム素体１の一面及び他面に、それぞれ第１図に示
される様に第１拾具体７及び第・２治具体１０を添え付
ける。次にこれら三者が一体になった物を部分メッキ装
置１３に装着し、又プレス板１５によって押えつける。
この状態で部分メッキ装置１３に於けるメッキ液流出口
１４から、矢印１６で示される様にメッキ液をリードフ
レーム秦体１のメッキ領域２に向けて移行させる。する
とリードフレーム秦体１に於けるメッキ領域２には周知
の如くメッキが成される。又上記〆ッキ液の一部は、リ
ードフレーム秦体１に於ける間隙５を通って矢印１６′
で示される様に第２沿具体１０に於ける開口部１１の側
にも入り込む。その入り込んだメッキ液はメッキ液阻止
板１２によって第１図に於ける上方への移行が阻止され
、リードフレーム秦体１に於けるメッキ領域２′に接す
る。するとこの領域２′に於いてもマウント部３或いは
ワイヤーボンディング部４等にメッキが成される。上記
の様なメッキ作業の後は両拾具体７，１０を相互に離反
させ、第３図に示される様な半導体用リードフレーム１
７の完成品を取り出す。First, the plated areas 2, 2' are polished and cleaned, and a first pick-up member 7 and a second pick-up member 10 are attached to one side and the other side of the plated frame body 1, respectively, as shown in FIG. Next, the assembly of these three parts is mounted on the partial plating device 13 and pressed down by the press plate 15.
In this state, the plating solution is transferred from the plating solution outlet 14 in the partial plating device 13 toward the plating area 2 of the lead frame body 1 as shown by the arrow 16. Then, the plating area 2 on the lead frame body 1 is plated as is well known. Also, a part of the lacquer liquid passes through the gap 5 in the lead frame body 1 as indicated by the arrow 16'.
As shown, it also enters the opening 11 side of the second rib 10. The plating solution that has entered is prevented from moving upward in FIG. Then, also in this region 2', the mount portion 3, wire bonding portion 4, etc. are plated. After the above-mentioned plating work, the two pick-up members 7 and 10 are separated from each other, and the semiconductor lead frame 1 as shown in FIG.
Take out the finished product from step 7.
この取り出された完成品のＩＪードフレーム１７に於い
ては、それぞれメッキ領域２，２′にメッキ層１８，１
９が付着した状態となっている。これらのメッキ層１８
，１９の厚みは前記第１治臭体７の開口部８と対向して
いた側（メッキ層１８）が厚く、その反対側の第２拾臭
体に於ける関口部１１と対向していた側（メッキ層１９
）が薄く（半分程度）なっている。これらのメッキ層１
８，１９のそれぞれの厚みは、例えばメッキ層１８の厚
みが２０ムｍ、メッキ層１９の厚みが１０〆肌程度にな
る。これらそれぞれのメッキ層１８，１９の厚みは、一
方のメッキ層１８に於いては半導体（ＩＣ）チップから
の熱の拡散を良好にする為に厚．し・程好ましく、他方
のメッキ層１９に於いてはワイヤーボンディングにあた
りワイヤ一の埋没を防ぐ為に最大で１０山肌程度が好ま
しいとされている。In the finished IJ card frame 17 taken out, plating layers 18 and 1 are formed in the plating areas 2 and 2', respectively.
9 is attached. These plating layers 18
, 19 was thicker on the side (plated layer 18) facing the opening 8 of the first odor absorbing body 7, and facing the entrance part 11 of the second odor absorbing body on the opposite side. side (plating layer 19
) is thinner (about half). These plating layers 1
For example, the thickness of the plating layer 18 is about 20 mm, and the thickness of the plating layer 19 is about 10 mm. The thickness of each of these plating layers 18 and 19 is set such that one of the plating layers 18 is thick enough to improve the diffusion of heat from the semiconductor (IC) chip. It is said that the other plating layer 19 should preferably have a maximum of about 10 peaks in order to prevent the wire from being buried during wire bonding.
次に第４図及び第５図は本願の異なる実施例を示すもの
である。Next, FIGS. 4 and 5 show different embodiments of the present application.
先ず第４図はメッキ領域２ｅ以外の部分にも多数の間隙
２０を有する周知の半導体用リードフレーム素体ｌｅを
示す。この様なりードフレーム素体ｌｅに於いてメッキ
領域２ｅ以外のアウターリード２１等の部分にメッキを
したくない場合には、第５図に示される様に、前記第２
袷具体１０ｅとして、リードフレーム素体ｌｅに接する
面に上記間隔２０‘こ丁度収まる様にした充填用の凸部
２２を有する治具体１０ｅを用いるとよい。この様な充
填用の凸部２２を有する治具体１０ｅを用いた場合には
、上記充填用の凸部２２が間隙２０の中に密着状に入り
込み、そこへのメッキ液の進入を防止する。First, FIG. 4 shows a well-known semiconductor lead frame element le having a large number of gaps 20 in areas other than the plated area 2e. If you do not want to plate parts such as the outer leads 21 other than the plating area 2e in such a shaped frame element le, as shown in FIG.
As the sleeve member 10e, it is preferable to use a jig member 10e having a filling convex portion 22 which is arranged to fit exactly the above-mentioned interval 20′ on the surface in contact with the lead frame body le. When the jig 10e having such a filling protrusion 22 is used, the filling protrusion 22 fits tightly into the gap 20 and prevents the plating solution from entering there.
従って完成したりードフレームに於いては、メッキ領域
２ｅ以外のアウターリード２１その他にはメッキが成さ
れておらず、メッキ領域２ｅにある種々のりード或いは
マウント部３ｅ等にのみ正しくメッキが成されている。
尚第５図に於いて、２３は固定板で、拾具体１０ｅが柔
軟な場合に使用すると好ましいものである。又前記充填
用の凸部２２は、第２治具体に限ることなく第１治具体
に於いてリードフレーム素体と対向する面に具備させて
もよい。なお、機能上前図のものと同一又は均等構成と
考えられる部分には、前図と同一の符号にアルファベッ
トのｅに付して重複する説明を省略した。Therefore, in the completed lead frame, the outer leads 21 and other parts other than the plated area 2e are not plated, and only the various leads in the plated area 2e or the mount part 3e, etc. are plated correctly. has been done.
In FIG. 5, reference numeral 23 denotes a fixed plate, which is preferably used when the pick-up member 10e is flexible. Further, the filling convex portion 22 is not limited to the second jig, but may be provided on the surface of the first jig that faces the lead frame body. In addition, parts that are considered to have the same or equivalent configuration as those in the previous figure in terms of function are given the same reference numerals as in the previous figure and the letter e is added, and redundant explanations are omitted.
以上のようにこの発明にあっては、リードフレーム蓑体
１の一面と他面に夫々袷具体７，８を押当状に添付け、
しかもそれらの治具体においてはリードフレーム素体１
の一面と他面にあるメッキ領域２，２′に対応する部分
に関口部を設けて、それらのメッキ領域２，２′にのみ
メッキ液が付く様にしてメッキするものであるから、リ
ードフレーム素体１の一面と他面のメッキ領域２，２′
を同時にメッキすることのできる作業効率上の特長があ
り、その上、上記の様に表裏にあるメッキ領域２，２′
を同時にメッキできるものであっても、そのメッキされ
る部分は前記構成によって必要箇所に限定され、メッキ
材料を極めて有効に使って即ちメッキ材料が少ない状態
で必要かつ充分なメッキ作業をすることができ、高価な
メッキ材料を節約して製品コストの低減を図ることので
きる画期的効果がある。尚付言すれば、リードフレーム
素体１の表裏にある二つのメッキ領域２，２′を同時に
メッキするということは、前工程によって清浄化された
メッキ領域２，２′がいずれも酸化しないうちに迅速に
メッキをして、高品質のメッキされた製品を造りだす上
に極めて大きな効果があり、この点だけをみても本発明
が業界に与える貢献度はすこぶる高く評価しうるもので
ある。As described above, in the present invention, the sleeves 7 and 8 are attached to one side and the other side of the lead frame cover body 1 in a pressing manner, respectively.
Moreover, in those fixtures, the lead frame element 1
Since the lead frame is plated by providing a plug in the portion corresponding to the plating areas 2 and 2' on one side and the other side, and plating so that the plating solution is applied only to those plating areas 2 and 2', the lead frame Plated areas 2, 2' on one side and the other side of the element body 1
It has the advantage of improving work efficiency by being able to plate both sides at the same time, and in addition, as mentioned above, the plated areas 2 and
Even if the plated parts can be plated at the same time, the parts to be plated are limited to the necessary parts due to the above structure, and it is difficult to use the plating material extremely effectively, that is, to perform the necessary and sufficient plating work with a small amount of plating material. This has the revolutionary effect of saving expensive plating materials and reducing product costs. In addition, plating the two plating regions 2 and 2' on the front and back sides of the lead frame body 1 at the same time means that the plating regions 2 and 2', which have been cleaned in the previous process, are not oxidized. This invention has an extremely large effect in rapidly plating and producing high-quality plated products, and from this point alone, the contribution of the present invention to the industry can be highly evaluated.
図面は本願の実施例を示すもので、第１図はメッキ作業
状態を示す縦断面図、第２図は第１拾具体に於ける開□
部から半導体用リードフレーム素体に於けるメッキ領域
を見た図、第３図は完成した半導体用リードフレームの
縦断面図、第４図は異なる実施例を示す図でリードフレ
ーム素体の平面図、第５図は同拾具体の部分縦断面図。
１・・・・・・半導体用リードフレーム秦体、２，２′
・・・・・・メッキ領域、５…・・・間隙、７，１０・
…・・給具体、８，１１・・・・・・関口部、１２・・
・・・・メッキ液阻止板。第１図
第Ｚ図
第３図
第５図
第４図The drawings show an embodiment of the present application, and Fig. 1 is a longitudinal cross-sectional view showing the state of plating work, and Fig. 2 is an opening in the first embodiment.
FIG. 3 is a vertical sectional view of the completed semiconductor lead frame, and FIG. 4 is a plan view of the lead frame body showing a different embodiment. Figure 5 is a partial vertical sectional view of the same concrete. 1... Semiconductor lead frame Qin body, 2, 2'
......Plating area, 5...Gap, 7,10.
...Gai Gutai, 8, 11... Sekiguchi Department, 12...
...Plating solution blocking plate. Figure 1 Figure Z Figure 3 Figure 5 Figure 4
Claims (1)
治具体を押当状に添付け、上記治具体の内、上記リード
フレーム素体の一面に添わせた治具体には、上記リード
フレーム素体の一面における多孔状のメツキ領域に対応
する開口部を予め設けておき、他方、他の治具体には、
上記リードフレーム素体の他面における多孔状のメツキ
領域に対応する開口部を予め設けておくと共に、その開
口部には上記リードフレーム素体とは離間する位置に予
めメツキ液阻止板を具備させてこき、上記リードフレー
ム素体の一面にあるメツキ領域に向けてメツキ液を移行
させることによつて該領域にメツキを施すと同時に、上
記メツキ液の一部はリードフレームの間隙を通して他面
にあるメツキ領域に致達させてリードフレーム素体の他
面にあるメツキ領域をも同時にメツキすることを特徴と
する半導体用リードフレームの製造方法。1 Attach jigs to one side and the other side of a lead frame element for semiconductors in a pressing form, and among the above jigs, the jigs attached to one side of the lead frame element are An opening corresponding to the porous plating area is provided in advance on one side of the element body, and on the other hand,
An opening corresponding to the porous plating area on the other surface of the lead frame body is provided in advance, and a plating liquid blocking plate is provided in advance at a position away from the lead frame body. The plating liquid is applied to the plating area on one side of the lead frame body by applying a lever, and at the same time, a part of the plating liquid is transferred to the other side through the gap of the lead frame. A method for manufacturing a lead frame for a semiconductor, characterized in that a certain plating area is reached and a plating area on the other side of the lead frame body is also plated at the same time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54168743A JPS6024588B2 (en) | 1979-12-25 | 1979-12-25 | Manufacturing method for semiconductor lead frames |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54168743A JPS6024588B2 (en) | 1979-12-25 | 1979-12-25 | Manufacturing method for semiconductor lead frames |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5691457A JPS5691457A (en) | 1981-07-24 |
| JPS6024588B2 true JPS6024588B2 (en) | 1985-06-13 |
Family
ID=15873586
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP54168743A Expired JPS6024588B2 (en) | 1979-12-25 | 1979-12-25 | Manufacturing method for semiconductor lead frames |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6024588B2 (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4731053U (en) * | 1971-04-16 | 1972-12-08 | ||
| JPS4924775A (en) * | 1972-06-26 | 1974-03-05 | ||
| JPS5148729A (en) * | 1974-10-24 | 1976-04-27 | Noge Denki Kogyo Kk | BUBUNMETSUKINOHOHO |
| JPS5173936A (en) * | 1974-12-25 | 1976-06-26 | Noge Denki Kogyo Kk | BUBUNMETSUKINOHOHOOYOBISOCHI |
-
1979
- 1979-12-25 JP JP54168743A patent/JPS6024588B2/en not_active Expired
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4731053U (en) * | 1971-04-16 | 1972-12-08 | ||
| JPS4924775A (en) * | 1972-06-26 | 1974-03-05 | ||
| JPS5148729A (en) * | 1974-10-24 | 1976-04-27 | Noge Denki Kogyo Kk | BUBUNMETSUKINOHOHO |
| JPS5173936A (en) * | 1974-12-25 | 1976-06-26 | Noge Denki Kogyo Kk | BUBUNMETSUKINOHOHOOYOBISOCHI |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5691457A (en) | 1981-07-24 |
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