JPS6018924A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6018924A
JPS6018924A JP58126650A JP12665083A JPS6018924A JP S6018924 A JPS6018924 A JP S6018924A JP 58126650 A JP58126650 A JP 58126650A JP 12665083 A JP12665083 A JP 12665083A JP S6018924 A JPS6018924 A JP S6018924A
Authority
JP
Japan
Prior art keywords
film
scribing line
thermal oxide
oxide film
psg
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58126650A
Other languages
Japanese (ja)
Inventor
Masahiro Yamada
正弘 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP58126650A priority Critical patent/JPS6018924A/en
Publication of JPS6018924A publication Critical patent/JPS6018924A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To prevent any corrosion of a bonding pad by a method wherein, when forming a scribing line region for a semiconductor device, an interlayer insulating layer is formed inward of an element separation thermal oxide film. CONSTITUTION:A thermal oxide film 202 is formed on an Si substrate 201 and a PSG film 203 is then formed thereon. At this time, a portion in the vicinity of the scribing line is removed by etching such that the film 203 is formed inwardly of the thermal oxide film 202. Thereafter, an Al bonding pad 204 and passivation film 205 are formed in order. When dicing the thus formed IC, a part of the passivation film 205 on the scribing line is chipped. As a result, water content is going to penetrate into the films on a route indicated by the arrow such as to move along the scribing line. However, the film 203 is recessed from the scribing line so as not to absorb the moisture, it is therefore possible to prevent Al corrosion.

Description

【発明の詳細な説明】 本発明は、層間絶縁膜［ＰＳＧを用いる半導体装置に関
する。半導体装置（以下ＩＣと略）の層間絶縁膜は、以
前からＰＳＧを用いることが多い。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device using an interlayer insulating film [PSG]. PSG has long been used as an interlayer insulating film for semiconductor devices (hereinafter abbreviated as IC).

これはＰＳＧに含まれるリンが半導体が特性上嫌う、可
動イオン等のゲッタリング効果をもっこと、手軽にかつ
安価に形成出来ること、シリコーン基板との舎外が良い
などの理由からである。ところが、ＰＳＧは、リンを含
んでいるため、非常に吸湿性であり、吸湿した時はリン
酸が出来て、これがＩＣの配線層として用いられている
Ａｐ、を腐食することがある。そのため、ＰＳＧに外部
からの水の侵入を防ぐために、パッシベーション膜を形
成している。ところが、チップにグイシングされた時、
チップ端からの水の侵入によりＡｎ腐食を起こす場合が
あり、この時はスクライブライン周辺のＡ℃（主にポン
ディングパッドの腐食が顕著である。これについて従来
例第１図をもって説明する。シリコン基板１０１上に、
熱酸化膜１０２が形成され、ＰＳＧ膜１０３が層間絶縁
膜として形成されたのち、Ａｆｌボンディングパソド１
０４を設け、パッシベーション膜１０６を形成する。This is because the phosphorus contained in PSG has a gettering effect on mobile ions, which semiconductors dislike due to their characteristics, can be easily and inexpensively formed, and is suitable for use outside of silicone substrates. However, since PSG contains phosphorus, it is highly hygroscopic, and when it absorbs moisture, it produces phosphoric acid, which can corrode Ap used as the wiring layer of an IC. Therefore, a passivation film is formed to prevent water from entering the PSG from the outside. However, when he was attacked by Chip,
Intrusion of water from the edge of the chip may cause An corrosion, and in this case, corrosion of A°C around the scribe line (mainly corrosion of the bonding pad is noticeable. This will be explained with reference to a conventional example shown in FIG. 1.Silicon) On the substrate 101,
After a thermal oxide film 102 is formed and a PSG film 103 is formed as an interlayer insulating film, an Afl bonding pad 1 is formed.
04 is provided, and a passivation film 106 is formed.

ここでスクライブライン１０５は、熱酸化膜１０２及び
ＰＳＧ膜１０３の形成されていない領域である。さて、
このような膜構成をもってＩＣをグイシングすると、ス
クライブライン上の切れ口では上記パッシベーション膜
１０６の一部がかける。Here, the scribe line 105 is an area where the thermal oxide film 102 and the PSG film 103 are not formed. Now,
When an IC with such a film configuration is subjected to guising, a portion of the passivation film 106 is covered at the cut end on the scribe line.

そこで、矢印で示した経路によりスクライブラインに沿
って水分が侵入していく。このときスクライプラインの
際に吸湿性のＰＳＧ膜１０３が存在しているため侵入し
てきた水分はＰＳＧ膜１０５に吸収されていき、水との
反応によって生じたリン酸によりポンディングパッド１
０４が腐食される。本発明は、かかる欠点をのぞくもの
であり、第２図に実施例を示す。シリコン基板上２０１
に熱酸化膜２０２を形成後、ｐｓａ膜を形成するが、こ
のとき・スクライプライン接近部を、エツチング除去し
、熱酸化膜２０２より内側に形成する。Therefore, moisture enters along the scribe line along the path shown by the arrow. At this time, since the hygroscopic PSG film 103 is present in the scribe line, the invading water is absorbed by the PSG film 105, and the phosphoric acid generated by the reaction with water causes the bonding pad to
04 is corroded. The present invention eliminates this drawback, and an embodiment thereof is shown in FIG. On silicon substrate 201
After forming the thermal oxide film 202, a PSA film is formed. At this time, the portion near the scribe line is removed by etching and formed inside the thermal oxide film 202.

次にＡλポンディングパッド２０４及び、パッシベーシ
ョン膜２０５を順次形成する。この工ａをグイシングす
ると、従来例と同様に、スクライプライン上のパッシベ
ーション膜２０５の一部がかける。そこで、矢印で示し
た経路により水分がスクライブラインに沿って侵入しよ
うとするか、従来例と異って、Ｐ　Ｓ　Ｇ膜２０６が、
スクライブラインより後退しているため、ＰＳＧ膜２０
３は吸湿しないため、ＡＩ！、腐食は防止できる。尚、
ＰＳＧ膜とスクライプライン端の距ＨＡは、実験により
５μｍ程度で効果があった。Next, an Aλ bonding pad 204 and a passivation film 205 are sequentially formed. When this step a is covered, a part of the passivation film 205 on the scribe line is covered, as in the conventional example. Therefore, either the moisture tries to enter along the scribe line through the path shown by the arrow, or unlike the conventional example, the PSG film 206
Since it is set back from the scribe line, the PSG film 20
3 does not absorb moisture, so AI! , corrosion can be prevented. still,
Experiments have shown that a distance HA between the PSG film and the edge of the scribe line of about 5 μm is effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図・・・従来例のパッド周辺の断面図Ｏ第２図・本
発明のバッド周辺の断面図。 １０４．２０４がＰＳＧ膜である０ 以　上 出願人　株式会社諏訪精工舎 代理人　弁ｙ１１士　最上　務FIG. 1: A sectional view around the pad of a conventional example; FIG. 2: A sectional view around the pad of the present invention. 104.204 is a PSG film 0 or more Applicant Suwa Seikosha Co., Ltd. Agent Tsutomu Mogami

Claims (1)

【特許請求の範囲】[Claims] を用いる半導体装置に於いて、該半導体装置のスクライ
ブライン領域を形成するに、素子分離熱酸化膜より、内
側に層間絶縁層か形成されていることを特徴とする半導
体装置の製造方法。1. A method of manufacturing a semiconductor device, characterized in that an interlayer insulating layer is formed inside an element isolation thermal oxide film to form a scribe line region of the semiconductor device.
JP58126650A 1983-07-12 1983-07-12 Manufacture of semiconductor device Pending JPS6018924A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58126650A JPS6018924A (en) 1983-07-12 1983-07-12 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58126650A JPS6018924A (en) 1983-07-12 1983-07-12 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6018924A true JPS6018924A (en) 1985-01-31

Family

ID=14940455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58126650A Pending JPS6018924A (en) 1983-07-12 1983-07-12 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6018924A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62174953A (en) * 1986-01-28 1987-07-31 Mitsubishi Electric Corp Semiconductor device
JPS62174952A (en) * 1986-01-28 1987-07-31 Mitsubishi Electric Corp Semiconductor device
JP4750129B2 (en) * 2004-12-08 2011-08-17 フィリップ・モーリス・プロダクツ・ソシエテ・アノニム Side open hinge lid container with audible indication of closure and / or opening

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5617025A (en) * 1979-07-20 1981-02-18 Mitsubishi Electric Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5617025A (en) * 1979-07-20 1981-02-18 Mitsubishi Electric Corp Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62174953A (en) * 1986-01-28 1987-07-31 Mitsubishi Electric Corp Semiconductor device
JPS62174952A (en) * 1986-01-28 1987-07-31 Mitsubishi Electric Corp Semiconductor device
JP4750129B2 (en) * 2004-12-08 2011-08-17 フィリップ・モーリス・プロダクツ・ソシエテ・アノニム Side open hinge lid container with audible indication of closure and / or opening

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