JPH06163713A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPH06163713A
JPH06163713A JP4311700A JP31170092A JPH06163713A JP H06163713 A JPH06163713 A JP H06163713A JP 4311700 A JP4311700 A JP 4311700A JP 31170092 A JP31170092 A JP 31170092A JP H06163713 A JPH06163713 A JP H06163713A
Authority
JP
Japan
Prior art keywords
protective film
semiconductor device
film
wiring conductor
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4311700A
Other languages
Japanese (ja)
Inventor
Makoto Hasobe
誠 羽曽部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JFE Steel Corp
Original Assignee
Kawasaki Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kawasaki Steel Corp filed Critical Kawasaki Steel Corp
Priority to JP4311700A priority Critical patent/JPH06163713A/en
Publication of JPH06163713A publication Critical patent/JPH06163713A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To provide a highly reliable semiconductor device having excellent moisture resistance because films, which sufficiently protect the sidewall of an opening part, are provided and to provide the method, which can manufacture the semiconductor device with less man-hours and the simple process. CONSTITUTION:A first protecting film 4 comprising a phosphate glass layer and a second protecting film 5 comprising a silicon nitride film are provided on a wiring conductor 3. An opening part 6, which reaches the wiring conductor layer 3 through the first protective film 4 and the second protective film 5, is provided in this semiconductor device. A moisture-resistant film 8 comprising a plasma oxide film is provided at an inner sidewall 7 of the opening part 6. Thus, the semiconductor device and the manufacturing method thereof are provided.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の製造方法
に関し、特に、開孔部の側壁を十分に保護する被膜を有
するため、耐湿性に優れ、高い信頼性を有する半導体装
置を提供し、ならびにその半導体装置を少ない工数で簡
便な工程で製造することができる方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a semiconductor device having excellent moisture resistance and high reliability because it has a coating film that sufficiently protects the side wall of an opening. And a method capable of manufacturing the semiconductor device in a simple process with a small number of steps.

【0002】[0002]

【従来の技術】IC、LSI等の半導体装置において、
金属配線の断線や短絡を防止し、また外部汚染から半導
体装置を遮断するために、表面保護膜が形設されてい
る。従来、この表面保護膜としてリンガラス層、および
プラズマCVD法によるシリコン窒化膜(以下、「プラ
ズマ窒化膜」という)等が一般に用いられている。
2. Description of the Related Art In semiconductor devices such as IC and LSI,
A surface protective film is formed in order to prevent disconnection or short circuit of metal wiring and to shield the semiconductor device from external contamination. Conventionally, as the surface protection film, a phosphorus glass layer, a silicon nitride film formed by a plasma CVD method (hereinafter, referred to as “plasma nitride film”) and the like are generally used.

【0003】これらの中でも、リンガラス層は、Na+
等のイオンに対するパッシベーション効果が大きいが、
その反面、吸水性が強く、機械的強度が弱く、また膜の
緻密性が十分ではない。そのため、配線の傷の防止に余
り有効ではなく、また、外部から水が侵入すると、リン
ガラスと水の反応によってリン酸が精製し、このリン酸
によって配線の腐食や電気特性の変動を招くため、耐湿
性の面において十分なものではなかった。
Of these, the phosphorus glass layer is Na +
Has a large passivation effect on ions such as
On the other hand, it has high water absorption, weak mechanical strength, and insufficient film compactness. Therefore, it is not very effective in preventing wiring damage, and when water enters from the outside, phosphoric acid is purified by the reaction of phosphor glass and water, and this phosphoric acid causes corrosion of wiring and fluctuations in electrical characteristics. However, it was not sufficient in terms of moisture resistance.

【0004】一方、プラズマ窒化膜は、前記のリンガラ
ス層より、機械的強度および膜の緻密性に優れるもので
ある。
On the other hand, the plasma nitride film is superior in mechanical strength and film density to the phosphor glass layer.

【0005】そのため、配線導体層の表面保護膜には、
リンガラス層と、プラズマ窒化膜の2層構造のものが用
いられる。例えば、図2(A)に示すように、シリコン
基板11の上に形成されたフィールド酸化膜12の所定
箇所に形設された配線導体層13に、表面保護膜とし
て、図2(B)に示すように、リンガラス層からなる第
1の保護膜14を形成する。さらに、その第1の保護膜
14の上に、プラズマ窒化膜からなる第2の保護膜15
を形成し、この第1の保護膜14と第2の保護膜15と
からなる2層構造の表面保護膜が形成されることが多
い。この表面保護膜は第1の保護膜14と第2の保護膜
15の両者の長所を併せ持つ保護膜である。そして、図
2(C)に示すように、配線導体層13にボンディング
接続するために、第1の保護膜14と第2の保護膜15
を貫通して配線導体層13に達する開孔部16が穿孔さ
れる。
Therefore, the surface protective film of the wiring conductor layer is
A phosphor glass layer and a plasma nitride film having a two-layer structure are used. For example, as shown in FIG. 2A, the wiring conductor layer 13 formed at a predetermined position of the field oxide film 12 formed on the silicon substrate 11 is used as a surface protection film in FIG. As shown, the first protective film 14 made of a phosphorus glass layer is formed. Further, a second protective film 15 made of a plasma nitride film is formed on the first protective film 14.
In many cases, a surface protective film having a two-layer structure composed of the first protective film 14 and the second protective film 15 is formed. This surface protective film is a protective film having the advantages of both the first protective film 14 and the second protective film 15. Then, as shown in FIG. 2C, in order to perform bonding connection to the wiring conductor layer 13, the first protective film 14 and the second protective film 15 are formed.
An opening portion 16 that penetrates through and reaches the wiring conductor layer 13 is drilled.

【0006】しかし、図2(C)に示す従来の半導体装
置においては、開孔部16の内側壁17に、リンガラス
層からなる第1の保護膜14が露出され、この内側壁1
7に露出された第1の保護膜は、前記のとおり、耐湿性
に劣るため、空気中の水分を吸湿して、配線導体層13
が電気的安定性を損ない、甚だしい場合は腐食し、信頼
性の低下を招くおそれがある。
However, in the conventional semiconductor device shown in FIG. 2C, the first protective film 14 made of a phosphorus glass layer is exposed on the inner side wall 17 of the opening 16, and the inner side wall 1 is formed.
As described above, the first protective film exposed to No. 7 is inferior in moisture resistance, so that it absorbs moisture in the air and the wiring conductor layer 13
May impair the electrical stability and, in extreme cases, may corrode, resulting in reduced reliability.

【0007】そこで、開孔部の内側壁に第1の保護膜が
露出するのを防止する構造が特開昭60−145628
号公報に提案されている。この方法は、図2(A)のと
おり、シリコン基板の上に形成されたフィールド酸化膜
の所定箇所に形設された配線導体層に、第1の保護膜と
してリンガラス層を形成した後、該リンガラス層に配線
導体層に達する開孔部(開孔径R)を1回目のホトリソ
グラフィーによって穿孔する。次に、そのリンガラス層
および開孔部の上を第2の保護膜であるプラズマ窒化膜
で被覆し、さらに2回目のホトリソグラフィーによっ
て、プラズマ窒化膜に前記開孔径Rより小さい開孔径r
の開孔部を穿孔することにより、開孔部の内側壁にプラ
ズマ窒化膜を残し、第2の保護膜であるプラズマ窒化膜
で開孔部の内側壁を被覆する技術である。
Therefore, a structure for preventing the first protective film from being exposed on the inner wall of the opening is disclosed in Japanese Patent Laid-Open No. 60-145628.
It is proposed in Japanese Patent Publication No. This method is, as shown in FIG. 2A, after forming a phosphorus glass layer as a first protective film on a wiring conductor layer formed at a predetermined position of a field oxide film formed on a silicon substrate, An opening portion (opening diameter R) reaching the wiring conductor layer is formed in the phosphor glass layer by the first photolithography. Next, the phosphorous glass layer and the opening are covered with a plasma nitride film which is a second protective film, and the second opening photolithography is performed to form an opening diameter r smaller than the opening diameter R in the plasma nitride film.
This is a technique in which the plasma nitride film is left on the inner wall of the hole by punching the hole and the inner wall of the hole is covered with the plasma nitride film which is the second protective film.

【0008】[0008]

【発明が解決しようとする課題】しかし、前記特開昭6
0−145628号公報に記載の構造の半導体装置の製
造においては、2回目の開孔部の形成において、1回目
の開孔径よりも小さい開孔部を形成するために、2回目
のホトリソグラフィー工程が必要であり、工程が煩雑と
なるという問題があった。
However, the above-mentioned Japanese Patent Laid-Open No.
In the manufacture of the semiconductor device having the structure described in Japanese Patent Application Laid-Open No. 0-145628, the second photolithography step is performed in order to form an opening smaller than the diameter of the first opening in forming the second opening. However, there is a problem that the process becomes complicated.

【0009】そこで本発明の目的は、開孔部の側壁を十
分に保護する被膜を有するため、耐湿性に優れ、高い信
頼性を有する半導体装置を提供し、ならびにその半導体
装置を少ない工数で簡便な工程で製造することができる
方法を提供することにある。
Therefore, an object of the present invention is to provide a semiconductor device having excellent moisture resistance and high reliability because it has a film that sufficiently protects the side wall of the opening portion, and the semiconductor device can be easily manufactured with a small number of steps. It is to provide a method that can be manufactured by various steps.

【0010】[0010]

【課題を解決するための手段】前記課題を解決するため
に、本発明は、配線導体上に、リンガラス層からなる第
1の保護膜と、シリコン窒化膜からなる第2の保護膜と
を有し、かつ前記第1の保護膜と第2の保護膜とを貫通
して配線導体層に達する開孔部を有する半導体装置であ
って、前記開孔部の内側壁にプラズマ酸化膜からなる耐
湿性被膜を有する半導体装置を提供するものである。
In order to solve the above problems, the present invention provides a wiring conductor with a first protective film made of a phosphorous glass layer and a second protective film made of a silicon nitride film. A semiconductor device having an opening that penetrates through the first protective film and the second protective film and reaches the wiring conductor layer, wherein the inner wall of the opening is made of a plasma oxide film. A semiconductor device having a moisture resistant coating is provided.

【0011】前記耐湿性被膜が、屈折率1.5以上のも
のであると、好ましい。
It is preferable that the moisture resistant coating has a refractive index of 1.5 or more.

【0012】また、本発明は、前記半導体装置を製造す
る方法として、配線導体層上に、リンガラス層からなる
第1の保護膜、およびシリコン窒化膜からなる第2の保
護膜を形成し、該第1の保護膜と第2の保護膜とを貫通
して配線導体層に達する開孔部を形成した後、開孔部の
内側壁を被覆するようにプラズマ酸化膜からなる耐湿性
被膜を形成する工程を有する半導体装置の製造方法をも
提供するものである。
As a method for manufacturing the semiconductor device, the present invention forms a first protective film made of a phosphorus glass layer and a second protective film made of a silicon nitride film on the wiring conductor layer, After forming an opening that penetrates the first protective film and the second protective film and reaches the wiring conductor layer, a moisture resistant coating made of a plasma oxide film is formed so as to cover the inner wall of the opening. The present invention also provides a method for manufacturing a semiconductor device having a step of forming.

【0013】以下、本発明の半導体装置およびその製造
方法について詳細に説明する。
The semiconductor device of the present invention and the method of manufacturing the same will be described in detail below.

【0014】本発明は、Si基板上に配設される配線導
体層を保護するために、該配線導体層の上部に保護膜を
有し、さらに配線導体層との電気的接続を形成するため
に、その保護膜を貫通して配線導体層に達する開孔、例
えば、ボンディングパッド、コンタクトホール等を配設
する半導体装置のいずれにも適用可能である。また、本
発明は、半導体装置のチップ側面のスクライブラインに
も適用可能である。また、配線導体層を構成する導体金
属は、AlSi、AlCu等の半導体装置の配線層に使
用される金属のいずれでもよく、特に制限されない。
According to the present invention, in order to protect the wiring conductor layer disposed on the Si substrate, a protective film is provided on the wiring conductor layer, and an electrical connection with the wiring conductor layer is formed. In addition, the invention can be applied to any semiconductor device having an opening penetrating the protective film and reaching the wiring conductor layer, for example, a bonding pad, a contact hole, or the like. The present invention can also be applied to a scribe line on the side surface of a chip of a semiconductor device. Further, the conductor metal forming the wiring conductor layer may be any metal used for the wiring layer of the semiconductor device, such as AlSi or AlCu, and is not particularly limited.

【0015】本発明の半導体装置において、第1の保護
膜は、配線導体層の上部に配設され、配線導体層を含む
所定の表面を被覆するものである。この第1の保護膜
は、リンガラス層で形成される。この第1の保護膜の厚
さは、通常、1000〜3000Å程度である。
In the semiconductor device of the present invention, the first protective film is provided on the wiring conductor layer and covers a predetermined surface including the wiring conductor layer. This first protective film is formed of a phosphorus glass layer. The thickness of the first protective film is usually about 1000 to 3000Å.

【0016】第2の保護膜は、第1の保護膜の上部に配
設され、第1の保護膜と同時に配線導体層を含む所定の
表面を被覆するプラズマ窒化膜である。この第2の保護
膜の厚さは、通常、7000〜10000Å程度であ
る。
The second protective film is a plasma nitride film which is provided on the first protective film and covers a predetermined surface including the wiring conductor layer at the same time as the first protective film. The thickness of the second protective film is usually about 7,000 to 10,000 Å.

【0017】本発明の半導体装置は、第1の保護膜と第
2の保護膜を貫通して配線導体層に達する開孔部を有
し、その開孔部の内側壁にプラズマ酸化膜からなる耐湿
性被膜を有するものである。この耐湿性被膜は、開孔部
の内側壁に露出する第1の保護膜および第2の保護膜の
端部を被覆するように形設される。
The semiconductor device of the present invention has an opening that penetrates the first protective film and the second protective film to reach the wiring conductor layer, and is formed of a plasma oxide film on the inner wall of the opening. It has a moisture resistant coating. This moisture-resistant coating is formed so as to cover the end portions of the first protective film and the second protective film exposed on the inner wall of the opening.

【0018】以下、本発明の半導体装置の一実施態様と
して、外部との電気的接続を行うためのボンディングパ
ッド部を有する半導体装置を例にとり、その製造方法の
主要工程を図1(A)〜(E)に基づいて説明し、併せ
て本発明の半導体装置について詳細に説明する。
Hereinafter, as an embodiment of the semiconductor device of the present invention, a semiconductor device having a bonding pad portion for making an electrical connection to the outside is taken as an example, and the main steps of the manufacturing method thereof are shown in FIG. A description will be given based on (E), and the semiconductor device of the present invention will also be described in detail.

【0019】この半導体装置の製造においては、まず、
図1(A)に示すように、前段の工程において、シリコ
ン基板1上に形成されたフィールド酸化膜2、さらに配
線導体層3を有する半導体装置において、図1(B)に
示すように、リンガラス層からなる第1の保護膜4を形
成した後、さらにその第1の保護膜4の上部にシリコン
窒化膜からなる第2の保護膜5を、形成する。
In manufacturing this semiconductor device, first,
As shown in FIG. 1A, in the semiconductor device having the field oxide film 2 formed on the silicon substrate 1 and the wiring conductor layer 3 in the previous step, as shown in FIG. After forming the first protective film 4 made of a glass layer, a second protective film 5 made of a silicon nitride film is further formed on the first protective film 4.

【0020】この第1の保護膜4の形成は、常法にした
がって行えばよく、特に制限されない。このリンガラス
層におけるリンの含有量は、通常、3.6〜4.2モル
%程度である。
The formation of the first protective film 4 may be carried out by a conventional method and is not particularly limited. The content of phosphorus in this phosphorus glass layer is usually about 3.6 to 4.2 mol%.

【0021】また、第2の保護膜5であるシリコン窒化
膜の形成は、例えば、SiH4 等とアンモニアとを原料
としてプラズマCVD法で形成する方法等によって、行
うことができる。
The silicon nitride film, which is the second protective film 5, can be formed by, for example, a plasma CVD method using SiH 4 or the like and ammonia as raw materials.

【0022】次に、図1(C)に示すように、ボンディ
ングパッド部を形成するために、第1の保護膜4と第2
の保護膜5を貫通して配線導体層3の上表面に達する開
孔部6を穿孔する。
Next, as shown in FIG. 1C, in order to form a bonding pad portion, a first protective film 4 and a second protective film 4 are formed.
An opening 6 is formed by penetrating the protective film 5 and reaching the upper surface of the wiring conductor layer 3.

【0023】この開孔部6の穿孔は、常法にしたがって
行うことができる。例えば、反応性イオンエッチング
(RIE)等の方法にしたがって行うことができる。
The perforation of the opening 6 can be carried out by a conventional method. For example, it can be performed according to a method such as reactive ion etching (RIE).

【0024】次に、本発明の方法においては、開孔部6
の内側壁7にプラズマ酸化膜からなる耐湿性被膜8を形
設する。このプラズマ酸化膜の形成は、図1(D)に示
すように、まず、第2の保護膜5の上部にプラズマ酸化
膜7を形成する。このプラズマ酸化膜の形成は、例え
ば、SiH4 とN2 Oを原料ガスとしてプラズマCVD
法によって400℃以下の低温で形成することができ
る。このプラズマ酸化膜は、通常、厚さ5000〜15
000Å程度に形成される。
Next, in the method of the present invention, the opening 6
A moisture resistant coating 8 made of a plasma oxide film is formed on the inner wall 7 of the. In forming the plasma oxide film, first, as shown in FIG. 1D, the plasma oxide film 7 is formed on the second protective film 5. This plasma oxide film is formed, for example, by plasma CVD using SiH 4 and N 2 O as source gases.
It can be formed at a low temperature of 400 ° C. or less by the method. This plasma oxide film usually has a thickness of 5000 to 15
It is formed to about 000Å.

【0025】さらに、このプラズマ酸化膜をエッチング
して、開孔部6の内側壁7にのみプラズマ酸化膜からな
る耐湿性被膜8を残して、本発明の半導体装置を得るこ
とができる。
Further, the plasma oxide film is etched to leave the moisture resistant coating 8 made of the plasma oxide film only on the inner wall 7 of the opening 6, whereby the semiconductor device of the present invention can be obtained.

【0026】プラズマ酸化膜の除去は、反応性イオンエ
ッチング等のエッチング処理により行うことができる。
The plasma oxide film can be removed by etching treatment such as reactive ion etching.

【0027】本発明の半導体装置において、この耐湿性
被膜8が、好ましくは屈折率が1.5以上となるもの
が、水分透過性が低い被膜となる点で有利である。
In the semiconductor device of the present invention, the moisture resistant coating 8 having a refractive index of preferably 1.5 or more is advantageous in that it has a low water permeability.

【0028】この屈折率が1.5以上の耐湿性被膜は、
プラズマ酸化膜の形成において、プラズマCVDにおけ
る原料ガスのSiH4 とN2 Oの混合比、供給量、ある
いは雰囲気圧力、温度等の条件を調整することにより、
得ることができる。
The moisture resistant coating having a refractive index of 1.5 or more is
In the formation of the plasma oxide film, by adjusting the conditions such as the mixing ratio of SiH 4 and N 2 O of the source gas in plasma CVD, the supply amount, the atmospheric pressure and the temperature,
Obtainable.

【0029】以上のように、図1(A)〜(E)に順を
追って示す工程に従って、図1(E)に示すボンディン
グパッド部Gとなる開孔部6を有する半導体装置を製造
することができる。この半導体装置においては、開孔部
6の内側壁7を覆うように耐湿性被膜8が形設されてい
るため、第1の保護膜4が開孔部6において露出するこ
となく、耐湿性被膜8によって空気中の水分の侵入によ
る配線導体層の電気的安定性の阻害、あるいは腐食等に
より半導体装置の信頼性の低下を招くことがない。ま
た、耐湿性被膜の形成を、プラズマ酸化膜をホトリソグ
ラフィー等の煩雑な工程を経ずに、エッチング処理のみ
で行うことができるため、従来の工程に比して工数が削
減され、簡便な工程で行うことができる。
As described above, the semiconductor device having the opening portion 6 to be the bonding pad portion G shown in FIG. 1E is manufactured by following the steps sequentially shown in FIGS. You can In this semiconductor device, since the moisture resistant coating 8 is formed so as to cover the inner wall 7 of the opening 6, the first protective film 4 is not exposed in the opening 6, and the moisture resistant coating is not exposed. 8 prevents the electric stability of the wiring conductor layer from being impaired by the intrusion of moisture in the air, or the reliability of the semiconductor device from being deteriorated due to corrosion or the like. Further, since the formation of the moisture resistant film can be performed only by the etching process without performing a complicated process such as photolithography of the plasma oxide film, the number of steps is reduced as compared with the conventional process, and a simple process. Can be done at.

【0030】[0030]

【発明の効果】本発明の半導体装置は、開孔部の内側壁
において露出されるリンガラス層等の耐湿性に劣る膜
が、プラズマ酸化膜からなる耐湿性被膜で被覆され、保
護されているため、開孔部の内側壁からの水分の侵入に
よる配線導体層の電気的安定性への悪影響、またその腐
食を防止することができ、高い信頼性を保持することが
できる。また、本発明の方法によれば、この半導体装置
を少ない工数で簡便な工程で製造することができる。
According to the semiconductor device of the present invention, a film having poor moisture resistance such as a phosphorus glass layer exposed on the inner wall of the opening is covered and protected by a moisture resistant film made of a plasma oxide film. Therefore, it is possible to prevent the electric stability of the wiring conductor layer from being adversely affected by the intrusion of water from the inner wall of the opening, and to prevent its corrosion, and it is possible to maintain high reliability. Further, according to the method of the present invention, this semiconductor device can be manufactured in a simple process with a small number of steps.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の半導体装置の製造方法の一実施態様
を説明する工程図。
FIG. 1 is a process diagram illustrating an embodiment of a method for manufacturing a semiconductor device of the present invention.

【図2】 従来の半導体装置の表面保護膜の製造工程を
説明する図。
FIG. 2 is a diagram illustrating a manufacturing process of a surface protection film of a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 フィールド酸化膜 3 配線導体層 4 第1の保護膜 5 第2の保護膜 6 開孔部 7 開孔部の内側壁 8 耐湿性被膜 1 Silicon Substrate 2 Field Oxide Film 3 Wiring Conductor Layer 4 First Protective Film 5 Second Protective Film 6 Openings 7 Inner Side Walls of Openings 8 Moisture Resistant Coating

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】配線導体上に、リンガラス層からなる第1
の保護膜と、シリコン窒化膜からなる第2の保護膜とを
有し、かつ前記第1の保護膜と第2の保護膜とを貫通し
て配線導体層に達する開孔部を有する半導体装置であっ
て、前記開孔部の内側壁にプラズマ酸化膜からなる耐湿
性被膜を有する半導体装置。
1. A first phosphor glass layer formed on a wiring conductor.
And a second protective film made of a silicon nitride film, and an opening portion penetrating the first protective film and the second protective film to reach the wiring conductor layer. A semiconductor device having a moisture resistant coating made of a plasma oxide film on the inner wall of the opening.
【請求項2】前記耐湿性被膜が、屈折率1.5以上のも
のである請求項1に記載の半導体装置。
2. The semiconductor device according to claim 1, wherein the moisture resistant coating has a refractive index of 1.5 or more.
【請求項3】配線導体層上に、リンガラス層からなる第
1の保護膜、およびシリコン窒化膜からなる第2の保護
膜を形成し、該第1の保護膜と第2の保護膜とを貫通し
て配線導体層に達する開孔部を形成した後、開孔部の内
側壁を被覆するようにプラズマ酸化膜からなる耐湿性被
膜を形成する工程を有する半導体装置の製造方法。
3. A first protective film made of a phosphorus glass layer and a second protective film made of a silicon nitride film are formed on the wiring conductor layer, and the first protective film and the second protective film are formed. A method of manufacturing a semiconductor device, comprising the step of forming an opening that penetrates through the wiring and reaches the wiring conductor layer, and then forming a moisture-resistant film made of a plasma oxide film so as to cover the inner wall of the opening.
【請求項4】前記耐湿性被膜の屈折率を1.5以上に形
成する請求項3に記載の半導体装置の製造方法。
4. The method of manufacturing a semiconductor device according to claim 3, wherein the moisture-resistant coating has a refractive index of 1.5 or more.
JP4311700A 1992-11-20 1992-11-20 Semiconductor device and manufacture thereof Withdrawn JPH06163713A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4311700A JPH06163713A (en) 1992-11-20 1992-11-20 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4311700A JPH06163713A (en) 1992-11-20 1992-11-20 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH06163713A true JPH06163713A (en) 1994-06-10

Family

ID=18020419

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4311700A Withdrawn JPH06163713A (en) 1992-11-20 1992-11-20 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH06163713A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6011308A (en) * 1996-06-14 2000-01-04 Nec Corporation Semiconductor device having a barrier film formed to prevent the entry of moisture and method of manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6011308A (en) * 1996-06-14 2000-01-04 Nec Corporation Semiconductor device having a barrier film formed to prevent the entry of moisture and method of manufacturing the same

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