JPS601858A - 多層混成集積回路 - Google Patents

多層混成集積回路

Info

Publication number
JPS601858A
JPS601858A JP58109672A JP10967283A JPS601858A JP S601858 A JPS601858 A JP S601858A JP 58109672 A JP58109672 A JP 58109672A JP 10967283 A JP10967283 A JP 10967283A JP S601858 A JPS601858 A JP S601858A
Authority
JP
Japan
Prior art keywords
resistor
path
printed
conductive path
epoxy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58109672A
Other languages
English (en)
Japanese (ja)
Other versions
JPH023558B2 (esLanguage
Inventor
Masakazu Yamagishi
正和 山岸
Akira Kazami
風見　明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP58109672A priority Critical patent/JPS601858A/ja
Publication of JPS601858A publication Critical patent/JPS601858A/ja
Publication of JPH023558B2 publication Critical patent/JPH023558B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment

Landscapes

  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP58109672A 1983-06-17 1983-06-17 多層混成集積回路 Granted JPS601858A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58109672A JPS601858A (ja) 1983-06-17 1983-06-17 多層混成集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58109672A JPS601858A (ja) 1983-06-17 1983-06-17 多層混成集積回路

Publications (2)

Publication Number Publication Date
JPS601858A true JPS601858A (ja) 1985-01-08
JPH023558B2 JPH023558B2 (esLanguage) 1990-01-24

Family

ID=14516240

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58109672A Granted JPS601858A (ja) 1983-06-17 1983-06-17 多層混成集積回路

Country Status (1)

Country Link
JP (1) JPS601858A (esLanguage)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH027596A (ja) * 1988-06-27 1990-01-11 Fujitsu Ltd 膜素子を内層した配線基板
JP2020064999A (ja) * 2018-10-18 2020-04-23 日本特殊陶業株式会社 配線基板

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5773959A (en) * 1980-10-27 1982-05-08 Hitachi Ltd Manufacture of thick film hybrid integrated circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5773959A (en) * 1980-10-27 1982-05-08 Hitachi Ltd Manufacture of thick film hybrid integrated circuit board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH027596A (ja) * 1988-06-27 1990-01-11 Fujitsu Ltd 膜素子を内層した配線基板
JP2020064999A (ja) * 2018-10-18 2020-04-23 日本特殊陶業株式会社 配線基板

Also Published As

Publication number Publication date
JPH023558B2 (esLanguage) 1990-01-24

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