JPS60183642A - Reed-solomon code error detector - Google Patents

Abstract

PURPOSE:To attain quick error detection and correction processing by deciding whether or not a final syndrome is to be zero from the result of half-way operation of a syndrome in the reception with the transmission system using a Reed- Solomon code. CONSTITUTION:Each transmitted symbol is received sequentially by a reception circuit 1, a prescribed operation is inputted to syndrome operation circuits 11- 14 and the result is inputted to a correction execution circuit 60. Every time each symbol is received to the reception circuit 1, the syndrome is calculated by the operating circuits 11-14 by selecting a check symbol number N being a positive integer, a total transmission symbol number M and a value L satisfying L<N. When the symbols of M-L-set are transmitted to the reception side, the result of halfway operation of syndrome is discriminated. When the transmission has no error at all at the reception of the M-L-set of the symbols, a prescribed discriminating formula is established, and if the discriminating formula is not established, the error location detection and error correction are processed immediately.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an error detection device during data transfer, and an error detection device for detecting errors in data transfer using a Reed-Solomon code.
Regarding equipment.

[Technical background of invention]

The Reed-Solomon code is one of the currently known powerful error correction codes for correcting random errors).
Ru. Regarding Reed-Solomon codes, the North Holland Nobbing Company (1i0RTH) in the United States
40LI, A11D PUBI, Engineering 8 ■ Engineering 11G OO
F.G.A. MacWilliam (IP-J-MACW Engineering 1. +
L Engineering AM) j NJA Sloan (N,
The Theory of Error Correcting Course (THE TH) by J. A. SLO M11) ItORY
OF KRRORC0RRECTENG 0O-DB
S). Regarding the decoding method of the Reed-Solomon code, for example, the Japanese Patent Application Laid-open No. 5G-16
Details are given in the publication.

Here, we will give a brief general explanation of the data transmission method using Reed-Solomon codes.

It is assumed that the i data to be transmitted is called an information transmission symbol, and the i information transmission symbols are transmitted. On the transmitting side, a certain operation is performed using these N symbols to generate N test symbols. In actual transmission, +N=M symbols are transmitted and received, and on the receiving side, a certain decoding operation is performed using all M symbols to check for errors.

Let the symbols be Hiropit's code vector, and =! , N=Hiroshi, and M=32 will be explained. The ψ test symbols are expressed as B(1* Bl + Bt mB,
Bind the three information transmission symbols to B4 yBl t・
...13th. Inspection symbol I3o I B
l y p, # II.

is calculated to satisfy the following equations (1) to (1).

Karasu + Ten Karasu +... Ten Fan = 0 (1) B6 +
a Bl + a" % 10-+ d" B11 =
0 (,2) Crow+c12+-Crow+...+/2 fan==0
(jJ type 10 - 11 crow + ... + tl" Bst =
o (Here, α is called a primitive element and represents a specific symbol. The operation to insert the test symbol is N
This is done using a generator polynomial consisting of the product of first-order polynomials. When N=Hiroshi, the generator polynomial g(X) is expressed by equation (51).

g(X)-(X-/)(X-a)(X-asu(X-ff
(j) The method of this calculation is detailed in the above-mentioned documents, and its explanation will be omitted here.

Once the test symbol is found, it is transmitted together with the information transmission symbol, and the receiving side decodes it to check for any erroneous symbols. That is, based on the received B0 to B□ (
1)~(Perform the calculation on the left side of the Rin equation and determine whether this reaches zero.If the calculation result on the left side of the equation (4'3) on the receiving side is s0*S1 rBR+8m ,
These so yBl rBRpBm are called syndromes, and if there is no error in reception, they will all be zero. If there is a small number of errors, by performing certain calculations based on syndromes, it is possible to determine the symbol position where the error occurred and the correct symbol value, and perform correction.

[Problems with background technology]

Conventionally, when syndromes are generated on the receiving side.

When all symbols (B6 = Bat for clay figurines) were received, ff1i calculation was performed. For this reason, even though the transmission of all symbols constituting an l code block has already been completed, error detection processing by syndrome generation takes time, and the next code block cannot be transmitted immediately. The disadvantage is that the processing speed is slow as fcc+ [Object of the invention] So! An object of the present invention is to provide a Reed-Solomon code error detection device that does not require much time for syndrome generation processing.

[Summary of the invention]

The special purpose of the present invention is to generate a Reed-Solomon code using a generator polynomial consisting of the product of N first-order polynomials, and to transmit a total of M symbols including N test symbols. In reception, select a number such that L<N, and at the point when (M-I,) symbols are transmitted to the receiving side, determine whether the final syndrome will be 90% from the intermediate result of the syndrome calculation. The difference is that the error detection process based on syndrome generation can be performed quickly.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described using an example similar to the example used in the discussion of the prior art. That is.

One symbol is a code vector of reference bits, and the number of symbols for information transmission is K = ! , number of symbols for inspection N=≠,
The total number of transmission symbols M=32. First, let me briefly explain the principle of the present invention. As mentioned above, the syndrome calculation is performed using the equations (/J~(ri), but these equations can be expressed as the equations (6)~(ri) by wrapping them with α.

Crow + Ha + Crow + ... Ten Crows. 10 Fanning = 0 (Shun Karasu±α(Bl+α(Crow+α(...α(ed+α翫)...)
20 (ηEo 10p(Bl +(' (Bl +'
(・' (Bao +' Bat >・-)=77
(t) King-+♂ (Bl +♂<h +a” <-・・♂
(〜＋♂ 'I1g＞”)=0 (?) Send B
□yB11°, . . . , Bo. When this is done in the order of □yB11°, .

As a positive integer that satisfies L (N, we will now choose L = 2. In other words, at the time when M - L = J□ symbols have been transmitted to the receiving side, the intermediate result of the syndrome calculation will be determined. The 30 symbols transmitted are B
S1~B! up to, and equations (6) to (r) are (10) to
It can be expressed as in equation (13).

B, 10B1+ β. =o (10) Bo+'ff B, +αβ@:0 ,' , (//)
B, 10”B, +〆β3=0, (/riB0+-B
m+-β, = o (/3) where β. , β1. β2
．． β is a constant that includes B2 and is determined by the calculation result of this term at the time when 30 symbols are transmitted. Therefore, in equations (10) to (13), the only unknown quantities at this point are B and B1. Therefore, by combining these two discriminants (l
sp C15) formula is obtained.

f, (β., β8.β1.β3.α)=0 (/sf!
(β0.β8.β1.β3.α) = o (ts)3
If there is no error in the transmission at the time when 0 symbols are received, both discriminants (1 and 15) should hold.If the discriminants do not hold, the error position is immediately determined. Detection and error correction processing can be performed.

The configuration and functions of this embodiment will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a false 9 detection device according to the present invention. Each transmitted symbol is sequentially received by the receiving circuit l, inputted to the syndrome calculation circuit l/~/44, and also sent to the correction execution circuit 6.
It is input to 0. In this embodiment, since N=lI, ≠1 syndrome calculation circuits are provided. In the syndrome calculation circuit //-/4', (6) to (
) The calculation corresponding to the expression is performed. Each syndrome calculation circuit is controlled by a syndrome calculation control circuit 10.

The syndrome calculation performed each time each symbol is received by the receiving circuit is as follows. First, the register contents of each syndrome calculation circuit before symbol reception are all zero. When the first symbol 13at is received, 13st is latched as is in the register of the syndrome calculation circuit /l. αBjl, which is the result of multiplying BAI by α, is latched into the register of the syndrome calculation circuit l, and similarly, the syndrome calculation circuits /3 and /4'
α” Bml #α3B□ is latched in the register. When the second symbol BIIO is subsequently received, the syndrome calculation circuit /l receives 13n.

The sum of BIS and the latched BIS. +Bit is latched into the register. B in the syndrome calculation circuit 12. The sum of BaO and 9α13st
+"B111 is latched to the register, similarly, in the syndrome calculation circuit /J, /4', BMG+α"11
p BSo +α"B111 is added to the register twice. Through the above process, the calculations in the innermost parentheses of each expression are performed and become f'Lf.Subsequently, each syndrome is In the arithmetic circuit, each of these arithmetic results is
, α.

It is multiplied by C2 and C3 and latched into each register.

Similar calculations are repeated after the third symbol B29 is received. A block diagram of this calculation procedure is shown in Figure 1. Note that addition and multiplication in the above operations are
The special addition and multiplication of n7 defined for the Reed-Solomon code is a different operation from general binary addition and multiplication.

In this embodiment, the discriminant is calculated when L=2, that is, when M-L=JO symbols are transmitted to the receiving side, so the discriminant is N-L=2. . The number of discriminant determining circuits used is equal to the number of discriminants, and in this embodiment, two discriminant determining circuits 2/ and g are used. The reason why L<N is required as a condition for L is that no discriminant can be obtained when L≧N. After receiving B2 at the 30th symbol, the value stored in the register of each syndrome arithmetic circuit is
) to (/3) β in the formula. 〜β3. At this point, β0 to β are sent to the discriminant determining circuit 2/n, and simultaneously sent to the storage circuit 30. Discriminant judgment circuit 2/.

In n, β. ~β and the known primitive element α, the discriminant shown in equation (15) is calculated, and the result is sent to the correction control circuit.The result on the left side of the discriminant is If n does not become zero, it means that there is an error in the 30 symbols received in this 1. If an error is detected, the error location determining circuit 50 detects the error.

β stored in the memory circuit 30. ~Based on the value of β3 and the determination result sent from the correction control circuit, the error position β1
and sends the result specifically to the correction control circuit. The symbols B111 to B and t received so far are stored in the correction execution circuit 60, and the correction control circuit to gives an instruction to the correction execution circuit A0 to perform necessary correction processing. When all the symbols are received without errors, all the symbols stocked in the correction execution circuit are sent to the main body of the data processing system, etc. In addition, in the embodiment of 0 or more in which the data stored in the storage circuit 30 can also be sent to the main body of the data processing system if necessary, the case where M=32, N=≠, and L=λ has been described. , L(H), the present invention can be implemented in other cases as well. Also, the / symbol does not need to be represented by ≠ bits. Definition of Reed-Solomon code Preferably, the calculated % imputation and calculation are calculated based on data provided by a PLA, ROM, or random logic.

〔Effect of the invention〕

As mentioned above, according to the book, in reception using a transmission method using Reed-Solomon codes, before receiving all symbols, it is determined whether the final syndrome can be zero or not. As a result, the error detection and correction processing can be started before all symbols are received, and the error detection and correction processing can be performed quickly.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an error detection device according to the present invention, and FIG. 2 is a block diagram showing the syndrome operator j1 according to the present invention. /...Reception circuit, 10...Syndrome calculation control circuit, //-/4'...Syndrome calculation circuit, 2/
jJ...Discriminant judgment circuit, 30...Blind 1shi circuit, Su...Correction control circuit, 50...Gift position determination circuit, A
O...Correction execution circuit. Applicant's agent Seikan Inomata Figure 1 Figure 2

Claims (1)

[Claims] N-9 (M is M) generated using a generator polynomial consisting of /, N (N is a positive integer) -degree polynomial
A receiver receives a Reed-Solomon code consisting of symbols (a positive integer), and separately outputs N syndromes for the Reed-Solomon code previously input from the receiver. The intermediate result of the syndrome operation in the syndrome operation a2 at the time when M−L 1 (L (a positive integer such that L<F) symbols are received. N-L determination devices which input each symbol from the receiving device and determine from these intermediate results whether or not the inebriated taste of the syndrome is all zero; 1. Input the intermediate results of the syndrome calculation 7 from the syndrome calculation device, and if the judgment result is negative, based on the judgment result and the intermediate result of the syndrome calculation. Reed-Solomon code error, which is characterized by having a correction device that corrects each symbol, and the following!
ll$ outsousen゛.