JPS60182730A - ワイヤボンデイング方法 - Google Patents

ワイヤボンデイング方法

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Publication number
JPS60182730A
JPS60182730A JP59038064A JP3806484A JPS60182730A JP S60182730 A JPS60182730 A JP S60182730A JP 59038064 A JP59038064 A JP 59038064A JP 3806484 A JP3806484 A JP 3806484A JP S60182730 A JPS60182730 A JP S60182730A
Authority
JP
Japan
Prior art keywords
wire
lead frame
bonding
capillary
onto
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59038064A
Other languages
English (en)
Other versions
JPH0363814B2 (ja
Inventor
Koichi Chiba
宏一 千葉
Yoshio Terasaka
寺坂 良夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59038064A priority Critical patent/JPS60182730A/ja
Publication of JPS60182730A publication Critical patent/JPS60182730A/ja
Publication of JPH0363814B2 publication Critical patent/JPH0363814B2/ja
Granted legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary
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    • H01L2224/8512Aligning
    • H01L2224/85148Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518Translational movements
    • H01L2224/85181Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
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    • H01L2924/01082Lead [Pb]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 「発明の技術分野」 本発明は、基板、特にハイブリッド阜板上にダイボンド
された半導体ペレットのインナーポンディングパッドと
この基板上に設けられたリードフレームとをボンディン
グワイA1を用いC電気的に接続づる方法に関する。
[発明の技術的背留] 従来から、第1図に示ずJ:うに、ハイブリッドICモ
ジュール用の基板1上にダイボンドされた半導体ペレッ
ト2上に設けられた多数のポンディングパッド3と、こ
の基板1上に形成されたリードフレーム4とを電気的に
接続するには、ボンディング装置を用いて金線等のボン
ディングワイヤ5で以下のようにしC接続する方法がと
られている。
すなわち、ボンディング装置のキャピラリー6を通した
ボンデイングワイ175の先端を水素トーチ、電気アー
ク等により加熱溶融してボールを作り、まずポンディン
グパッド3上に4=17ビラリー6′c押付けUrf着
し、次いでキ17ピラリー5を対応づるリードフレーム
4上に移動させつつホンディングワイA75を引き出し
でループを釣り、川び同様にしてリードフレーム4上に
ボンディングワイ八75を圧着した後、キャピラリー6
をト5ち上げてワイヤクランパぐボンディングワイヤ5
をその圧着部から切り離Jプノ法が行われている。
[青用技術の問題点] しかしながら、このような方法では、リードフレーム4
上への圧着部5aが第2図に示すように薄くなって圧着
に必要な塑性変形が不十分となり、特にハイブリッド基
板のように表面が粗い基板1の場合には、リードフレー
ム4上へのボンデイングワイV5の圧着部5aが剥がれ
易くなり、製品不良が生じ易いという欠点があった。
「発明の目的」 本発明はこのような問題点を解決するためになされたち
のC・、半導体ベレットのポンディングパッドとリード
フレームとをボンディングワイヤを用いて強固に接続す
る方法を提供することを目的どする。
[発明の1既要1 すなわら本発明のソイ\7ホンデイング方法は、基板上
の所定の位置にダイボンドされた半導体ペレット上のポ
ンディングパッドと前記基板上に設けられたリードフレ
ームとを、キ17ピラリーを用いてボンディングワイA
7により電気的に接続するワイヤボンディング方法にお
いて、 <a >前記ボンゲイングパツドヘボンデイングワイヤ
の一端をキャピラリーを用いて圧着する工程と、 (b)ボンディングワイヤを引出しつつ前記キレピラリ
−をリードフレーム上へ案内しCボンディングワイヤを
リードフレーム上へ押付ける工程と、(C)前記キャピ
ラリーを保かに引戻して前記ボンディングワイA7を折
返し、この折返し部を重わく一前記リードフレーム上へ
圧着する工程とからなることを特徴としている。
[発明の実施例] 以下本発明を図面に示づ゛一実施例についてd1明する
。なお以下の図におい゛C,第1図と共通ずる部分には
同−行帰を角しである。
本発明においては、第3図(a )に示すように、基板
1土にダイボンドされた半導体ベレンl〜2のポンディ
ングパッド3と同じ基板1上に設けられたリードフレー
ム4とをボンディングワイt75によりボンデインタす
るにあたり、まずポンディングパッド3側でキトピラリ
−6を通したホンディングワイヤ5の先端を水素トーチ
、′電気アーク等で溶かしてボール(ネイルヘッド)7
を作り、このボール7を半導体ベレット2のポンディン
グパッド3上にキャピラリー6の先端で押(=Jけなが
ら超音波をかけ−C圧着する。
次いC第3図(b)に示すように、キャピラリー6を移
動すると同時にボンディングワイヤ5をキャピラリー6
から引き出しCループを作り、引き出し端をリードフレ
ーム4上にキレピラリ−6の先端で押イqける。
この(夛、:1−トビラリ−6を」二57ざUると第3
図〈b′ )のように、金線5がはがれる場合がある。
これはハイブリッド用基板のリードフレーム4は表面が
粗く、圧着が困雌なためである。この不良をなくすため
第3図(C)に示ずJ:うに、キャピラリー6を上昇さ
せ、ボンディングワイヤ5に沿ってボンディングパット
3側に若干引戻す。
この状c、C′再度ボンディングワイヤ5をリードフレ
ーlX/l上に押付はキャピラリーに超音波振動を加え
C圧着ざぜる。
このようにリードフレーム4上へのホンディングワイヤ
5の圧着をボンディングワイヤ5を折重ねた状態で行な
うことにより、圧着部のボンディングワイヤの但は従来
の2倍のmどなるので、加圧によるボンデインクワイA
7の塑性変形が充分に行なわれ、ハイブリット基板のよ
うな表面状態の粗い基板1の場合でもリードフレーム4
ヘボンデイングワイ175が強固にル着され圧着部が剥
がれることがなくなる。
「発明の効果」 以−1ニ説明したように本発明によれは′、半導体ペレ
ットのポンディングパッドどリードフレームとを強固に
ワイ\7ボンドすることができ、特にハイブリッドIC
モジュールの製品不良をなくし歩留りを飛躍的に向上さ
せることができる。
【図面の簡単な説明】
第1図は従来のワイヤポンプイングツ7法を示づ斜視図
、第2図はリードフレームに圧着されたボンディングワ
イ17が剥離した状態を拡大しC示J側面図、第3図<
a >〜(d >は本発明の一実施例を説明するための
図である。 1・・・・・・・・・・・・基板 2・・・・・・・・・・・・半導体ペレッ1−3・・・
・・・・・・・・・ポンディングパッド4・・・・・・
・・・・・・リードフレーム5・・・・・・・・・・・
・ボンディングワイヤ6・・・・・・・・・・・・キャ
ピラリー代理人弁理士 須 山 佐 −

Claims (2)

    【特許請求の範囲】
  1. (1)基板上の所定の位置にダイボンドされた半導体ペ
    レット上のポンディングパッドと前記基板上に設けられ
    たリードフレームとを、キャピラリーを用いてボンディ
    ングワイヤにJ:り電気的に接続するワイヤボンディン
    グ方法において、(a )前記ボンゲイングパツドヘボ
    ン−j−イングワイヤの一端をキャピラリーを用いて圧
    着する工程と、 (1))ボンディングワイヤを引出しつつ前記ギセピラ
    リーをリードフレーム上へ案内してボンディングワイヤ
    をリードフレーム上へ押付()る工程と、CG >前記
    キトピラリ−を僅かに引戻して前記ボンディングワイA
    7を折返し、この折返し部を重ねて前記リードフレーム
    上へ圧着する工程とからなることを特徴とするワイヤボ
    ンディング方法。
  2. (2)(b)の工程においてはキャピラリーに超音波振
    動を加えずにボンディングワイヤをリードフレーム上へ
    押付け、(C)の工程においてはキャピラリーにJJJ
     u波振動を加えながらボンディングワイヤをリードフ
    レーム上へ押付番プてボンディングワイヤとリードフレ
    ームとを圧着させることを特徴とする特許請求の範囲第
    1項記載のワイヤボンディング方i人。
JP59038064A 1984-02-29 1984-02-29 ワイヤボンデイング方法 Granted JPS60182730A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59038064A JPS60182730A (ja) 1984-02-29 1984-02-29 ワイヤボンデイング方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59038064A JPS60182730A (ja) 1984-02-29 1984-02-29 ワイヤボンデイング方法

Publications (2)

Publication Number Publication Date
JPS60182730A true JPS60182730A (ja) 1985-09-18
JPH0363814B2 JPH0363814B2 (ja) 1991-10-02

Family

ID=12515060

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59038064A Granted JPS60182730A (ja) 1984-02-29 1984-02-29 ワイヤボンデイング方法

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8123108B2 (en) 2010-01-27 2012-02-28 Shinkawa Ltd. Method of manufacturing semiconductor device and wire bonding apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8123108B2 (en) 2010-01-27 2012-02-28 Shinkawa Ltd. Method of manufacturing semiconductor device and wire bonding apparatus
US8196803B2 (en) 2010-01-27 2012-06-12 Shinkawa Ltd. Method of manufacturing semiconductor device and wire bonding apparatus

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JPH0363814B2 (ja) 1991-10-02

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