JPS60175163A - デ−タ格納装置 - Google Patents

デ−タ格納装置

Info

Publication number
JPS60175163A
JPS60175163A JP59030794A JP3079484A JPS60175163A JP S60175163 A JPS60175163 A JP S60175163A JP 59030794 A JP59030794 A JP 59030794A JP 3079484 A JP3079484 A JP 3079484A JP S60175163 A JPS60175163 A JP S60175163A
Authority
JP
Japan
Prior art keywords
channel
data
encoder
decoder
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59030794A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0438022B2 (enrdf_load_stackoverflow
Inventor
Hideaki Furuya
古家　英明
Toshikatsu Taketomi
利勝 武富
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Akai Electric Co Ltd
Original Assignee
Akai Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Akai Electric Co Ltd filed Critical Akai Electric Co Ltd
Priority to JP59030794A priority Critical patent/JPS60175163A/ja
Publication of JPS60175163A publication Critical patent/JPS60175163A/ja
Publication of JPH0438022B2 publication Critical patent/JPH0438022B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP59030794A 1984-02-21 1984-02-21 デ−タ格納装置 Granted JPS60175163A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59030794A JPS60175163A (ja) 1984-02-21 1984-02-21 デ−タ格納装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59030794A JPS60175163A (ja) 1984-02-21 1984-02-21 デ−タ格納装置

Publications (2)

Publication Number Publication Date
JPS60175163A true JPS60175163A (ja) 1985-09-09
JPH0438022B2 JPH0438022B2 (enrdf_load_stackoverflow) 1992-06-23

Family

ID=12313584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59030794A Granted JPS60175163A (ja) 1984-02-21 1984-02-21 デ−タ格納装置

Country Status (1)

Country Link
JP (1) JPS60175163A (enrdf_load_stackoverflow)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56120915A (en) * 1980-02-29 1981-09-22 Hokkaido Daigaku Data recorder provided with cmos-type memory

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56120915A (en) * 1980-02-29 1981-09-22 Hokkaido Daigaku Data recorder provided with cmos-type memory

Also Published As

Publication number Publication date
JPH0438022B2 (enrdf_load_stackoverflow) 1992-06-23

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