JPS6016740A - 時分割多方向多重通信方式の時間軸発生方式 - Google Patents

時分割多方向多重通信方式の時間軸発生方式

Info

Publication number
JPS6016740A
JPS6016740A JP12443783A JP12443783A JPS6016740A JP S6016740 A JPS6016740 A JP S6016740A JP 12443783 A JP12443783 A JP 12443783A JP 12443783 A JP12443783 A JP 12443783A JP S6016740 A JPS6016740 A JP S6016740A
Authority
JP
Japan
Prior art keywords
output
counter
time
clock
communication system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12443783A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0225574B2 (enExample
Inventor
Ryuhei Fujiwara
隆平 藤原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12443783A priority Critical patent/JPS6016740A/ja
Publication of JPS6016740A publication Critical patent/JPS6016740A/ja
Publication of JPH0225574B2 publication Critical patent/JPH0225574B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/062Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
JP12443783A 1983-07-08 1983-07-08 時分割多方向多重通信方式の時間軸発生方式 Granted JPS6016740A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12443783A JPS6016740A (ja) 1983-07-08 1983-07-08 時分割多方向多重通信方式の時間軸発生方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12443783A JPS6016740A (ja) 1983-07-08 1983-07-08 時分割多方向多重通信方式の時間軸発生方式

Publications (2)

Publication Number Publication Date
JPS6016740A true JPS6016740A (ja) 1985-01-28
JPH0225574B2 JPH0225574B2 (enExample) 1990-06-04

Family

ID=14885469

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12443783A Granted JPS6016740A (ja) 1983-07-08 1983-07-08 時分割多方向多重通信方式の時間軸発生方式

Country Status (1)

Country Link
JP (1) JPS6016740A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6253530A (ja) * 1985-09-03 1987-03-09 Nec Corp Tdma通信装置の制御用情報発生回路
US5299189A (en) * 1991-07-19 1994-03-29 Mitsubishi Denki Kabushiki Kaisha TDMA processing apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55158748A (en) * 1979-05-26 1980-12-10 Fujitsu Ltd Digital signal multiplexing circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55158748A (en) * 1979-05-26 1980-12-10 Fujitsu Ltd Digital signal multiplexing circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6253530A (ja) * 1985-09-03 1987-03-09 Nec Corp Tdma通信装置の制御用情報発生回路
US5299189A (en) * 1991-07-19 1994-03-29 Mitsubishi Denki Kabushiki Kaisha TDMA processing apparatus

Also Published As

Publication number Publication date
JPH0225574B2 (enExample) 1990-06-04

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