JPS60158648A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPS60158648A
JPS60158648A JP59012921A JP1292184A JPS60158648A JP S60158648 A JPS60158648 A JP S60158648A JP 59012921 A JP59012921 A JP 59012921A JP 1292184 A JP1292184 A JP 1292184A JP S60158648 A JPS60158648 A JP S60158648A
Authority
JP
Japan
Prior art keywords
resin
marks
semiconductor device
envelope
smooth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59012921A
Other languages
Japanese (ja)
Inventor
Hiroshi Yamamoto
浩 山本
Yoshio Shimizu
義男 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59012921A priority Critical patent/JPS60158648A/en
Publication of JPS60158648A publication Critical patent/JPS60158648A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54406—Marks applied to semiconductor devices or parts comprising alphanumeric information
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/54486—Located on package parts, e.g. encapsulation, leads, package substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent the manufacturing cost of a metal mold from raising by a method wherein one part of the surface of a resin molded layer is formed in a smooth surface, and at the same time, the remnant of the surface is formed in a rough surface and marks are put on the smooth surface by performing a laser irradiation. CONSTITUTION:The top surface only of an enclosure 1 consisting of a resin molded layer is formed in a smooth surface and the surfaces other than that of the enclosure 1 are respectively formed as a rough surface or an aventurine surface. Marks 4 are put on the smooth top surface of the enclosure 1 by a laser marking system. As a result, the marks 4 are remarkably clear compared to the case of marks put on the aventurine surfaces and the discrimination of the marks 4 is performed more easily than ever. Accordingly, the commodity value of this device is enhanced coupled with a fact that the strength of the marks 4 is larger. Moreover, the manufacturing cost of the metal mold is prevented from raising, because so long as a necessary part of the molded surface is formed in a smooth surface, that will do.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は外囲器表面にレーザー照射によるマークを付し
た樹脂封止型半導体装置に関し、特に、その外囲器の表
面仕上げ形状に係る。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a resin-sealed semiconductor device in which marks are formed on the surface of an envelope by laser irradiation, and particularly to the surface finish shape of the envelope.

〔発明の技術的背景〕[Technical background of the invention]

樹脂封止型半導体装置は、第１図に示すように樹脂モー
ルド層（外囲器）１の内部にＩＣやＬＳＩ等の半導体チ
ップ（図示せず）を封止し、外囲器１の側壁からは、そ
の内部で前記半導体チップの内部端子に接続されている
リード２・・・が外部に延出された形状を有している。As shown in FIG. 1, a resin-sealed semiconductor device has a semiconductor chip (not shown) such as an IC or LSI sealed inside a resin mold layer (envelope) 1, and a side wall of the envelope 1. The leads 2, which are connected to the internal terminals of the semiconductor chip inside thereof, extend to the outside.

なお、図中３は半導体装置の１ピン表示穴である。Note that 3 in the figure is a 1-pin display hole of the semiconductor device.

上記のような樹脂封止型半導体装置において、外囲器１
の表面は当初全面平滑に仕上げられていたが、近年では
樹脂モールド金型の製造コスト低減等の理由から、第１
図に示したように全面を梨地仕上げされるようになって
いる。即ち、外囲器１はエポキシ樹脂等のトランスファ
ーモールドにより形成され、従来は成形室壁面の平滑な
樹脂モールド金型が使用されていたが、近年では金型の
製造コストを低減し得ることから、放電加工により成形
室壁面を全面梨地タイプにしたモールド金型が主流にな
ってきたものである。In the resin-sealed semiconductor device as described above, the envelope 1
Initially, the surface of
As shown in the figure, the entire surface has a matte finish. That is, the envelope 1 is formed by transfer molding of epoxy resin or the like, and conventionally, a resin mold with a smooth molding chamber wall surface has been used, but in recent years, since the manufacturing cost of the mold can be reduced, Molds in which the walls of the molding chamber are completely satin-finished by electrical discharge machining have become mainstream.

ところで、樹脂封止型半導体装置では、一般に外囲器１
の表面（通常は頂面）に製品名等がマーキングされる。By the way, in a resin-sealed semiconductor device, the envelope 1 is generally
The product name, etc. is marked on the surface (usually the top surface).

このマーキングとして従来はインり印刷方式、即ち、イ
ンクを印刷した後、オーブン等により加熱乾燥する方法
が用いられていた。Conventionally, this marking has been performed using an ink printing method, that is, a method in which ink is printed and then heated and dried in an oven or the like.

然し乍ら、近年ではマーキングスピードを大幅に向上で
き、しかもマーキング後の加熱乾燥工程が不要で且つマ
ーク強度を飛躍的に向上できるといった利点が得られる
レーザーマーク方式が主流になってきている。このレー
ザーマーキング方式は、外囲器１の樹脂表面をレーザー
光で焼くことにより樹脂を変色させてマークを付するも
のである。However, in recent years, laser marking methods have become mainstream, as they offer the advantages of significantly increasing marking speed, eliminating the need for a heating drying process after marking, and dramatically improving mark strength. In this laser marking method, a mark is attached by burning the resin surface of the envelope 1 with laser light to change the color of the resin.

〔背景技術の問題点〕[Problems with background technology]

前述のように樹脂封止型半導体装置の外囲器表面が平滑
面から梨地面に移行しても、前記のインク印刷方式が採
用されている間は、マーキングに際して同等問題は生じ
なかった。即ち、従来のインク印刷方式では白または銀
色のインクが通常用いられ、外囲器１の色が通常は黒で
あることｈ＼らマークのコントラストが明瞭で、マーク
字体の輪郭が梨地面の窪みのために凹凸になってもマー
クが不鮮明になって字体が読み難くなることはなかった
。むしろ、梨地面の窪みにインクが入り込むため、平滑
面に印刷した場合よりもマーク強度が向上するといった
報告もなされている。Even if the surface of the envelope of the resin-sealed semiconductor device changed from a smooth surface to a satin surface as described above, no similar problem occurred in marking as long as the above-mentioned ink printing method was employed. That is, in conventional ink printing methods, white or silver ink is usually used, and the color of the envelope 1 is usually black. Even though the markings were uneven, the marks did not become unclear or the font became difficult to read. In fact, it has been reported that because the ink enters the depressions of the satin surface, the mark strength is improved compared to when printing on a smooth surface.

ところが、近年主流になってきたレーザーマーク方式で
は、レーザ光で付与されたマークは薄茶色等、外囲器の
色とのコントラストが不明瞭な色となる。このため、梨
地タイプの外囲器に対してレーザーマーク方式を適用す
ると、マーク字体の輪郭が外囲器面の凹凸で不鮮明にな
ることとも相俟って、マーク字体が不明瞭で識別し難く
なるという問題が生じていた。特に、フラットパッケー
ジのような小形外囲器ではマークの字体が小さくなるか
ら、この傾向が顕著に現れるとになる。However, in the laser mark method that has become mainstream in recent years, the mark applied with laser light is a color such as light brown that has an unclear contrast with the color of the envelope. For this reason, when the laser mark method is applied to a satin type envelope, the outline of the mark font becomes unclear due to the unevenness of the envelope surface, and the mark font becomes unclear and difficult to identify. A problem had arisen. This tendency is particularly noticeable in small envelopes such as flat packages, where the font of the mark becomes smaller.

〔発明の目的〕[Purpose of the invention]

本発明は上記事情に鑑みてなされたもので、樹脂封止型
半導体装置における粗表面をもった梨地タイプの外囲器
にレーザーマーキングによる鮮明なマークを付すことを
目的としてなされたものである。The present invention has been made in view of the above-mentioned circumstances, and has been made for the purpose of attaching a clear mark by laser marking to a matte type envelope with a rough surface in a resin-sealed semiconductor device.

〔発明の概要〕[Summary of the invention]

本発明による樹脂封止型半導体装置は、樹脂モールド層
の中に封止された半導体チップと、前記樹脂モールド層
の内部でこの半導体チップに接続されると共に、前記樹
脂モールド層の側壁がら外部に延出された金属製のリー
ドとを具備した樹脂封止型半導体装置において、前記樹
脂モールド層表面の少なくとも一部を平滑面ととすると
共に残部を粗面あるいは梨地面とし、前記平滑面にレー
ザー照射によるマークを付したことを特徴とするもので
ある。A resin-molded semiconductor device according to the present invention includes a semiconductor chip sealed in a resin mold layer, a semiconductor chip connected to the semiconductor chip inside the resin mold layer, and a side wall of the resin mold layer connected to the outside. In a resin-sealed semiconductor device equipped with extended metal leads, at least a part of the surface of the resin mold layer is a smooth surface, and the remaining part is a rough or matte surface, and a laser is applied to the smooth surface. It is characterized by a mark made by irradiation.

本発明の樹脂封止型半導体装置では、外囲器の平滑面に
レーザーマーキングが施されるからマークの輪郭が鮮明
になり、コントラストが多少不明瞭になっても容易に識
別が可能である。また、マークが付与されない外囲器表
面の大部分は梨地タイプであるから、樹脂モールド金型
のコスト低減効果も略維持することができる。即ち、本
発明の樹脂封止型半導体装置における外囲器は、成形室
のマーク付与面となる部分のみを平滑面とし、その他の
成形掌面は放電加工により粗面あるいは梨地面とした樹
脂モールド金型を用いて形成することができる。In the resin-sealed semiconductor device of the present invention, since the laser marking is applied to the smooth surface of the envelope, the outline of the mark becomes clear and it can be easily identified even if the contrast is somewhat unclear. Further, since most of the surface of the envelope to which no marks are provided is of a satin type, the cost reduction effect of the resin mold can be substantially maintained. That is, the envelope in the resin-sealed semiconductor device of the present invention is made of a resin mold in which only the part that will become the marking surface of the molding chamber is a smooth surface, and the other molding palm surfaces are roughened or satin-finished by electrical discharge machining. It can be formed using a mold.

〔発明の実施例〕[Embodiments of the invention]

以下、第２図を参照して本発明の一実施例を説明する。 An embodiment of the present invention will be described below with reference to FIG.

第２図は本発明の一実施例になる樹脂封止型半導体装置
を示す斜視図である。この実施例では、図示のように樹
脂モールド層からなる外囲器１の頂面のみが平滑面で、
それ以外の外囲器表面は粗面あるいは梨地面として形成
されている。そして、外囲器１の平滑な頂面にはレーザ
ーマーク方式によりマーク４が付されている。その他の
構成は第１図について説明した一般的な樹脂封止型半導
体装置と同じで、図中２・・・は外囲器１の内部で図示
しない半導体チップに接続されているリード、３は半導
体装置の１ビン表示穴である。FIG. 2 is a perspective view showing a resin-sealed semiconductor device according to an embodiment of the present invention. In this embodiment, only the top surface of the envelope 1 made of a resin molded layer is a smooth surface as shown in the figure.
The rest of the envelope surface is formed as a rough surface or a satin surface. A mark 4 is attached to the smooth top surface of the envelope 1 using a laser marking method. The rest of the structure is the same as the general resin-sealed semiconductor device described with reference to FIG. This is a 1-bin display hole of a semiconductor device.

上記実施例の樹脂封止型半導体装置では、外囲器１の平
滑な頂面にレーザーマーキングが施されているから、マ
ーク４は梨地面に付された場合に比較して著しく鮮明で
、識別は容易である。従って、マーク強度が大きいこと
とも相俟って商品価値を向上することができる。他方、
樹脂モールド金型の製造コストについても、成形室表面
の必要な一部分のみを平）け面とづ゛ればよいから、必
要以上に製造コスストが増大することを回避することが
できる。In the resin-sealed semiconductor device of the above embodiment, since laser marking is applied to the smooth top surface of the envelope 1, the mark 4 is much clearer and easier to identify than when it is marked on a matte surface. is easy. Therefore, together with the high mark strength, the commercial value can be improved. On the other hand,
As for the manufacturing cost of the resin mold, since only a necessary part of the surface of the molding chamber needs to be flattened, it is possible to avoid an unnecessarily increased manufacturing cost.

なお、上記の実施例では外囲器１の頂面全体を平）ｎ面
としたが、頂面のうちのマーク付与部分のみを局部的に
平滑面としてもよい。In the above embodiment, the entire top surface of the envelope 1 is a flat (n) surface, but only the mark-applied portion of the top surface may be locally made into a smooth surface.

また、頂面以外の外囲器表面、例えば側面にマーク４を
付する場合には、当該側面のみを平滑面とすることも可
能である。Further, when marking the mark 4 on a surface of the envelope other than the top surface, for example, a side surface, it is also possible to make only the side surface a smooth surface.

〔発明の効果〕〔Effect of the invention〕

以上詳述したように、本発明によれば梨地タイプの外囲
器表面にレーザーマーキングによる鮮明なマークを付し
、しかも樹脂モールド金型の製造コストの著しい増大も
回避できる樹脂封止型半導体装置を提供できるものであ
る。As described in detail above, according to the present invention, a resin-sealed semiconductor device can make a clear mark by laser marking on the surface of a matte-finish type envelope, and can also avoid a significant increase in the manufacturing cost of a resin mold. It is possible to provide

【図面の簡単な説明】[Brief explanation of drawings]

第１図は梨地タイプの外囲器表面をもった樹脂封止型半
導体装置の外観を示す斜視図、第２図は本発明の一実施
例になる樹脂封止型半導体装置を示す斜視図である。 １・・・樹脂モールド層（外囲器）、２・・・リード、
３・・・１ピン表示穴、４・・・マーク。 出願人代理人　弁理士　鈴江武彦FIG. 1 is a perspective view showing the external appearance of a resin-sealed semiconductor device having a matte-finished envelope surface, and FIG. 2 is a perspective view showing a resin-sealed semiconductor device according to an embodiment of the present invention. be. 1... Resin mold layer (envelope), 2... Lead,
3...1 pin display hole, 4...mark. Applicant's agent Patent attorney Takehiko Suzue

Claims (1)

【特許請求の範囲】[Claims] 樹脂モールド層の中に封止された半導体チップと、前記
樹脂モールド層の内部でこの半導体チップに接続される
と共に、前記樹脂モールド層の側壁から外部に延出され
た金属製のリードとを具備した樹脂封止型半導体装置に
おいて、前記樹脂モールド層表面の少なくとも一部を平
滑面とすると共に残部を粗面とし、前記平滑面にレーザ
ー照射によるマークを付したことを特徴とする樹脂封止
型半導体装置。A semiconductor chip sealed in a resin mold layer, and a metal lead connected to the semiconductor chip inside the resin mold layer and extending outside from a side wall of the resin mold layer. A resin-sealed semiconductor device characterized in that at least a part of the surface of the resin mold layer is a smooth surface, the rest is a rough surface, and a mark is attached to the smooth surface by laser irradiation. Semiconductor equipment.
JP59012921A 1984-01-27 1984-01-27 Resin-sealed semiconductor device Pending JPS60158648A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59012921A JPS60158648A (en) 1984-01-27 1984-01-27 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59012921A JPS60158648A (en) 1984-01-27 1984-01-27 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPS60158648A true JPS60158648A (en) 1985-08-20

Family

ID=11818794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59012921A Pending JPS60158648A (en) 1984-01-27 1984-01-27 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPS60158648A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5834850A (en) * 1994-07-12 1998-11-10 Nitto Denko Corporation Encapsulated semiconductor device having metal foil covering, and metal foil
JP2015201608A (en) * 2014-04-10 2015-11-12 大日本印刷株式会社 Lead frame with resin and manufacturing method of lead frame with resin and led package and manufacturing method of led package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5834850A (en) * 1994-07-12 1998-11-10 Nitto Denko Corporation Encapsulated semiconductor device having metal foil covering, and metal foil
JP2015201608A (en) * 2014-04-10 2015-11-12 大日本印刷株式会社 Lead frame with resin and manufacturing method of lead frame with resin and led package and manufacturing method of led package

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