JPS5928350A - Metal mold for resin sealed type semiconductor device - Google Patents
Metal mold for resin sealed type semiconductor deviceInfo
- Publication number
- JPS5928350A JPS5928350A JP13831482A JP13831482A JPS5928350A JP S5928350 A JPS5928350 A JP S5928350A JP 13831482 A JP13831482 A JP 13831482A JP 13831482 A JP13831482 A JP 13831482A JP S5928350 A JPS5928350 A JP S5928350A
- Authority
- JP
- Japan
- Prior art keywords
- metal mold
- mold
- stamp
- marking
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 239000011347 resin Substances 0.000 title abstract description 8
- 229920005989 resin Polymers 0.000 title abstract description 8
- 239000002184 metal Substances 0.000 title abstract 8
- 238000004519 manufacturing process Methods 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 abstract description 6
- 238000007789 sealing Methods 0.000 abstract description 5
- 230000003247 decreasing effect Effects 0.000 abstract 2
- 230000007547 defect Effects 0.000 description 2
- 206010011224 Cough Diseases 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/17—Component parts, details or accessories; Auxiliary operations
- B29C45/26—Moulds
- B29C45/37—Mould cavity walls, i.e. the inner surface forming the mould cavity, e.g. linings
- B29C45/372—Mould cavity walls, i.e. the inner surface forming the mould cavity, e.g. linings provided with means for marking or patterning, e.g. numbering articles
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は樹脂封止型半導体装置用金型の改良に関する。[Detailed description of the invention] The present invention relates to improvements in molds for resin-sealed semiconductor devices.
従来、樹脂封止型半導体装置は異なった品種であっても
同じ外形寸法ｔもつものは同一金型で樹脂封止され１品
名や製造口νトの区別は樹脂封止後にインクで捺印する
ことによって区別されていた。しかし、このような方法
では捺印とインクの乾燥に多大な工数を必要とする欠点
があった。また、取り扱い中に捺印面が他の物と接触す
ると捺印が不鮮明になったシ判読できなくなったジする
欠点があった。また、捺印時に封止樹脂の表面が帯電し
、累子が静電破壊を起こして歩留が低下する欠点があっ
た。このような欠点奮解決するためには金型のキャビテ
イ面に直接商標１品名、製造ロット番号を刻めば樹脂封
止と同時に形成された封止樹脂面の凹凸によってこれら
商標９品名、製造ロット番号が識別されるので上述した
捺印に起因する欠点は全て解決されるが、逆に品名毎に
あるいけ製造ロフト番号毎に金型を作製しなければなら
ず製造原価が非常に高くなるのでこのような方法は実用
的ではなかった。Conventionally, even if resin-sealed semiconductor devices are of different types, those with the same external dimensions are sealed with resin in the same mold, and the product name and manufacturing number are distinguished by marking with ink after resin sealing. was distinguished by. However, this method has the disadvantage that it requires a large number of steps for stamping and drying the ink. Additionally, if the stamped surface comes into contact with another object during handling, the stamp becomes unclear or illegible. Further, there is a drawback that the surface of the sealing resin becomes electrically charged during stamping, causing electrostatic damage to the cursor, resulting in a decrease in yield. In order to overcome these shortcomings, it is possible to directly engrave the product name and manufacturing lot number on the cavity surface of the mold. This solves all of the drawbacks caused by the stamps mentioned above, but conversely, molds must be made for each product name or manufacturing loft number, which increases manufacturing costs. method was not practical.
本発明の目的は異なった商標１品名、！！！造ロシト番
号であっても同じ外形寸法をもつものは同一金型で樹脂
封止でき、かつ、これら商標９品名。The purpose of the present invention is to provide different trademarks for one product name,! ! ! Items with the same external dimensions can be resin-sealed using the same mold, even if they have the same external dimensions, and these nine trademarked product names.
製造ロット番号？樹脂封止と同時に形成して従来の捺印
工程？全て無くすことによって捺印に起因する欠点全会
て解決した半導体装置？製造できる金型を提供すること
？目的とする。Production lot number? Can it be formed at the same time as resin sealing and used in the conventional stamping process? A semiconductor device that solves all the defects caused by stamping by eliminating all of them? Providing molds that can be manufactured? purpose.
上記目的を達成するため本発明は、キャビティの主面（
従来の捺印される面〕の全面又は一部に金Ｗ衣面の側か
ら取ｐ付けおよび取りはずしが可能な刻印？１個又は複
数個設けたこと？第一の特徴とする。第二に、該刻印に
は商標１品名、製造ロッ）ｆ表わす番号や記号が咳刻印
表面の凸部又は凹部によって刻まれていることを特徴と
する。In order to achieve the above object, the present invention provides a main surface (
Is there a stamp that can be attached and removed from the Gold W cloth side on the entire surface or a part of the traditional stamped surface? Have you installed one or more? This is the first characteristic. Second, the stamp is characterized in that a number or symbol representing the trademark, product name, manufacturing lot, etc. is engraved on the surface of the cough stamp by a convex or concave portion.
第三に、刻印の熱膨張率は金型の熱膨張率よりも犬キ＜
、刻印は室温から金型の使用温度に達するまでの熱膨張
によりて金型に取り付けられること葡特徴とする。Third, the thermal expansion coefficient of the stamp is smaller than that of the mold.
The stamp is attached to the mold by thermal expansion from room temperature to the mold's operating temperature.
以下５本発明？図面を用いて詳細に説明する。The following 5 inventions? This will be explained in detail using drawings.
第１図は本発明の実施例ケ示す金型の断面図である。キ
ャビティ１３の主面に凹部１２’（１１−設け。FIG. 1 is a sectional view of a mold showing an embodiment of the present invention. A recess 12' (11-) is provided on the main surface of the cavity 13.
その凹部１２に刻印］ｌが取ν付けられている。A stamp]l is attached to the recess 12.
第２図は第１図の刻印１１の平面図であシ、商標２５、
品名２６およびロット番号２７が刻まれている。この刻
印１１の金型１４への取ジ伺は方法は刻印１１が室温か
ら金をの使用温度（約１６０〜１７０°Ｃ）に達するま
での熱膨張奮利用して取り付ける方法が最も良い。丁な
わ、ぢ、まず刻印１１の熱膨張重金金型１４の熱膨張率
よりも大きくする。次に刻印１１の室温での太きさは金
型の凹部１２の金型使用温度での太キ式よりも小さくし
、刻印１１の金型使用温度での大きさくすなわち熱膨張
後の大きさ）は金型の凹部１２の金型使用温度での大き
さよりも大きくなるように刻印１１と金型の凹部１２と
の大きさの関係ケ定める。Figure 2 is a plan view of the stamp 11 in Figure 1, trademark 25,
Product name 26 and lot number 27 are engraved. The best way to attach the stamp 11 to the mold 14 is to take advantage of the thermal expansion of the stamp 11 from room temperature until it reaches the working temperature of gold (approximately 160 to 170° C.). First, make the thermal expansion coefficient of the stamp 11 larger than the thermal expansion coefficient of the heavy metal mold 14. Next, the thickness of the stamp 11 at room temperature is smaller than the thickness of the recess 12 of the mold at the mold usage temperature, and the size of the stamp 11 at the mold usage temperature, that is, the size after thermal expansion. ) determines the relationship between the size of the stamp 11 and the recess 12 of the mold so that the size is larger than the size of the recess 12 of the mold at the temperature at which the mold is used.
このようにすると刻印１１荀凹部１２に収納する時点で
は刻印１１の方が小さいから容易に収納で＠、その後直
ちに刻印１１は金型使用温度に達するから熱膨張によっ
て凹部１２に固定される。取りはずしは冷たい空気上刻
印１１に吹きつけると瞬間的に刻印１１の温度が下がる
ので容易に取りはずしかできる。このような構造にすれ
ば商標。In this way, when the stamp 11 is stored in the recess 12, the stamp 11 is smaller, so it can be easily stored.Then, the stamp 11 immediately reaches the mold operating temperature and is fixed in the recess 12 by thermal expansion. For removal, blowing cold air onto the stamp 11 instantly lowers the temperature of the stamp 11, making it easy to remove. If it is structured like this, it is a trademark.
品名、製造ロット番号が変わるたびに刻印１１’に取り
換えるだけで捺印工程の不必要な半導体装置を同一金型
で容易に製造でき、従来の捺印に起因する欠点全会て無
くすことができる。刻印１１は熱膨張によって凹部１２
に十分に固定されているので樹脂封止後半導体装置を金
型から取りはずす際に刻印１１がはずれることはなかっ
た。また刻印１１と凹部１２との接触する側面の平面度
ヲ十分に上げることによりてこの接触面にレジンフラッ
シュが発生することはなかった。刻印１１は第３図に示
すように商標部分３５１品名部分３６゜製造ロット番号
部分３７に分割し、更に製造ロット番号も各々分割する
ことによって必要な部分のみケ取り換えることができる
。ｔた１分割された刻印はｉ４図に示すように更に外側
を枠４８で囲むことによって容易に金型に取り付けるこ
とができる。この場合、金型１４と枠４８と分割された
刻印４１との熱膨張率の関係はこの頴番に太きくし、ま
ず室温と金型使用温度との中間温度で枠４８と分割され
た刻印４１とｉｌつに固足し２次にその全体の刻印４０
を金型の凹部１２に取り付ける方法が良い。By simply replacing the stamp 11' with a stamp 11' each time the product name or production lot number changes, semiconductor devices that do not require a stamping process can be easily manufactured using the same mold, and all defects caused by conventional stamps can be eliminated. The stamp 11 becomes a recess 12 due to thermal expansion.
Since the stamp 11 was sufficiently fixed, the stamp 11 did not come off when the semiconductor device was removed from the mold after resin sealing. Furthermore, by sufficiently increasing the flatness of the side surface where the stamp 11 and the recess 12 come into contact, no resin flash occurs on this contact surface. As shown in FIG. 3, the stamp 11 is divided into a trademark part 351, a product name part 36, and a manufacturing lot number part 37, and by further dividing the manufacturing lot number, only the necessary parts can be replaced. The 1-divided stamp can be easily attached to the mold by surrounding the outside with a frame 48 as shown in Figure i4. In this case, the relationship between the thermal expansion coefficients of the mold 14, the frame 48, and the divided stamp 41 is set to this number, and first, the frame 48 and the divided stamp 41 are set at an intermediate temperature between room temperature and the mold operating temperature. And secondly, the entire imprint 40
A good method is to attach it to the recess 12 of the mold.
本発明の金型は必ずしも商標１品名、製造ロフト番号の
全て？取り換え可能な刻印にする必要はなく１例えば商
標は金型のキャビテイ面に直接刻んでもよい。また、刻
印１１ｉ取シ付けた後のキャビテイ面は必ずしも同一平
面でなくても良く。Does the mold of the present invention necessarily have one trademark, product name, and manufacturing loft number? There is no need for the marking to be replaceable; for example, the trademark may be engraved directly on the cavity surface of the mold. Moreover, the cavity surfaces after the stamp 11i are attached do not necessarily have to be on the same plane.
例えば刻印１１が多少用ていても良い。また、商標９品
名、製造ロット番号は刻印の凹部で形成しても凸部で形
成しても良い。For example, some markings 11 may be used. Further, the trademark 9 product name and production lot number may be formed by a concave portion or a convex portion of the stamp.
【図面の簡単な説明】
第１図は本発明の実施例を示す刻印が取り付けられた金
型を示す断面図である。第２図は刻印の平面図、第３図
は分割された刻印の平面図、第４図は分割された刻印が
枠によって囲まれて全体として１つの刻印を形成してい
る平面図である。
尚、図において、１１，３１．４１・・・・・・刻印、
１２・・・・・・金型の凹部、１３・・・・・・キャビ
ティ、１４・・・・・・金型、２５・・・・・・商標％
２６・・・・・・品名、２７・・・・・・製造ロフト
番号、３５．３６．３７．４５．４６゜４７・・・・・
・分割された刻印、４８・・・・・・枠、４０・・・・
・・枠と分割され之刻印が１つに合わさった刻印である
も
茅 １ 図
半２侶BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sectional view showing a mold to which a stamp is attached, showing an embodiment of the present invention. FIG. 2 is a plan view of the stamp, FIG. 3 is a plan view of the divided stamp, and FIG. 4 is a plan view of the divided stamp surrounded by a frame to form one stamp as a whole. In addition, in the figure, 11, 31. 41... stamped,
12...Mold recess, 13...Cavity, 14...Mold, 25...Trademark%
26...Product name, 27...Manufacturing loft number, 35.36.37.45.46゜47...
・Divided stamp, 48... Frame, 40...
...It is a stamp that is divided into a frame and is combined into one.
Claims (1)
ビティの主面の全面又は一部に金型表面の側から取り付
けおよび取シはすしが可能な刻印に１個又は複数個設け
たことｔ特徴とする樹脂封止型半導体装置用金型。 （２）該刻印には商標、又は品名、又は製造ロフトを表
わす番号又は記号が該刻印表面の凸部又は凹部によって
刻まれていることを特徴とする特許請求の範囲第（１）
項記載の樹脂封止型半導体装置用金型。 （３）被刻印の熱膨張率は該金型の熱膨張率よりも大き
く、該刻印は熱膨張によって該金型に取り付けられる構
造であることｔ特徴とする特許請求の範囲第（１）項又
は第（２）項記載の樹脂封止型半導体装置用金型。[Scope of Claims] <1) In a mold for a resin-sealed semiconductor device, one or more stamps are attached to the entire or part of the main surface of the cavity from the mold surface side, and a removable marking is provided. A mold for a resin-sealed semiconductor device characterized by having a plurality of molds. (2) Claim (1) characterized in that the stamp is engraved with a trademark, a product name, or a number or symbol representing the manufacturing loft by a convex portion or a concave portion on the surface of the stamp.
A mold for a resin-sealed semiconductor device as described in 2. (3) Claim (1) characterized in that the coefficient of thermal expansion of the stamped object is larger than the coefficient of thermal expansion of the mold, and the stamp is attached to the mold by thermal expansion. Or the mold for a resin-sealed semiconductor device according to item (2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13831482A JPS5928350A (en) | 1982-08-09 | 1982-08-09 | Metal mold for resin sealed type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13831482A JPS5928350A (en) | 1982-08-09 | 1982-08-09 | Metal mold for resin sealed type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5928350A true JPS5928350A (en) | 1984-02-15 |
Family
ID=15218991
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13831482A Pending JPS5928350A (en) | 1982-08-09 | 1982-08-09 | Metal mold for resin sealed type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5928350A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02205042A (en) * | 1989-02-02 | 1990-08-14 | Nec Kyushu Ltd | Resin sealing mold for semiconductor device |
| US5153052A (en) * | 1987-11-27 | 1992-10-06 | Nifco, Inc. | Double-shot molded resin article |
| EP0756925A1 (en) * | 1995-08-04 | 1997-02-05 | Matsushita Electronics Corporation | Resin sealing die, resin-sealed-type semiconductor device and method of manufacturing the device |
| WO1997031394A1 (en) * | 1996-02-22 | 1997-08-28 | Nitto Denko Corporation | Semiconductor device and method for manufacturing the same |
| EP0935287A3 (en) * | 1998-02-09 | 2000-05-03 | Sharp Kabushiki Kaisha | Molding die and marking method for semiconductor devices |
-
1982
- 1982-08-09 JP JP13831482A patent/JPS5928350A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5153052A (en) * | 1987-11-27 | 1992-10-06 | Nifco, Inc. | Double-shot molded resin article |
| JPH02205042A (en) * | 1989-02-02 | 1990-08-14 | Nec Kyushu Ltd | Resin sealing mold for semiconductor device |
| EP0756925A1 (en) * | 1995-08-04 | 1997-02-05 | Matsushita Electronics Corporation | Resin sealing die, resin-sealed-type semiconductor device and method of manufacturing the device |
| US5817208A (en) * | 1995-08-04 | 1998-10-06 | Matsushita Electronics Corporation | Resin sealing die, resin-sealed-type semiconductor device and method of manufacturing the device |
| WO1997031394A1 (en) * | 1996-02-22 | 1997-08-28 | Nitto Denko Corporation | Semiconductor device and method for manufacturing the same |
| US6144108A (en) * | 1996-02-22 | 2000-11-07 | Nitto Denko Corporation | Semiconductor device and method of fabricating the same |
| EP0935287A3 (en) * | 1998-02-09 | 2000-05-03 | Sharp Kabushiki Kaisha | Molding die and marking method for semiconductor devices |
| US6270712B1 (en) | 1998-02-09 | 2001-08-07 | Sharp Kabushiki Kaisha | Molding die and marking method for semiconductor devices |
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