JPH0513607A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0513607A JPH0513607A JP16798191A JP16798191A JPH0513607A JP H0513607 A JPH0513607 A JP H0513607A JP 16798191 A JP16798191 A JP 16798191A JP 16798191 A JP16798191 A JP 16798191A JP H0513607 A JPH0513607 A JP H0513607A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- substrate
- device body
- back surface
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、パッケージの裏面と
基板が対面するように実装される半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mounted so that a back surface of a package and a substrate face each other.
【０００２】[0002]
【従来の技術】図５および図６は従来の半導体装置を示
す図であり、図５は半導体装置本体の裏面図、図６は図
５に示した半導体装置を基板に実装した際の側面図であ
る。これらの図において、１０はＳＯＰ（Small Outlin
ePackage ）型の半導体装置本体、１は半導体装置本体
１０のモールド樹脂の外部をコーティングしているプラ
スチックパッケージ、２は外部リードフレーム、４は基
板、６は半導体装置本体１０と基板４の間に存在するフ
ラックスや半田くずなどの異物である。5 and 6 are views showing a conventional semiconductor device, FIG. 5 is a rear view of a semiconductor device body, and FIG. 6 is a side view when the semiconductor device shown in FIG. 5 is mounted on a substrate. Is. In these figures, 10 is SOP (Small Outlin
ePackage) type semiconductor device body, 1 is a plastic package coating the outside of the molding resin of the semiconductor device body 10, 2 is an external lead frame, 4 is a substrate, and 6 is between the semiconductor device body 10 and the substrate 4. Foreign substances such as flux and solder scrap.
【０００３】図７および図８はさらに他の半導体装置を
示す図であり、図７は該半導体装置本体１０の裏面図、
図８は図７に示した半導体装置本体１０を基板に実装し
た際の側面図であり、リードフレーム２を整形し、図
５，図６に示した半導体装置本体１０と基板４との間隔
が大きくなるようにしている。7 and 8 are views showing still another semiconductor device. FIG. 7 is a rear view of the semiconductor device main body 10,
FIG. 8 is a side view when the semiconductor device body 10 shown in FIG. 7 is mounted on a substrate. The lead frame 2 is shaped so that the gap between the semiconductor device body 10 and the substrate 4 shown in FIGS. I am trying to grow.
【０００４】図５に示した従来の半導体装置において
は、図６に示すように半導体装置本体１０を基板４に実
装した場合、基板４と半導体装置本体１０の裏面との間
隔は０．１ｍｍ程度になる。この場合、基板４と半導体
装置本体１０の裏面との僅かの隙間に図６に示すように
フラックスや半田くずなどの異物が入り込むと、ファン
で送風しても異物が除去されにくい。また、基板４と半
導体装置本体１０の裏面との隙間が僅かであるため、半
導体装置本体１０の裏面からの放熱が少なくなり半導体
装置の熱抵抗が大きくなるという問題がある。In the conventional semiconductor device shown in FIG. 5, when the semiconductor device body 10 is mounted on the substrate 4 as shown in FIG. 6, the distance between the substrate 4 and the back surface of the semiconductor device body 10 is about 0.1 mm. become. In this case, if foreign matter such as flux or solder scraps enters the slight gap between the substrate 4 and the back surface of the semiconductor device body 10 as shown in FIG. 6, the foreign matter is not easily removed even if blown by a fan. Further, since the gap between the substrate 4 and the back surface of the semiconductor device body 10 is small, there is a problem that heat radiation from the back surface of the semiconductor device body 10 is reduced and the thermal resistance of the semiconductor device is increased.
【０００５】これらの問題を解決するために、リードフ
レーム２を長く形成して図８に示すように基板４と半導
体装置本体１０との間隔を大きくすることが従来から行
われている。このようにすると基板４と半導体装置本体
１０の裏面との間隔が大きくなり、基板４と半導体装置
本体１０との間にフラックスや半田くずなどの異物がた
まった場合取り出しやすくなる。In order to solve these problems, it has been conventionally practiced to lengthen the lead frame 2 to increase the distance between the substrate 4 and the semiconductor device body 10 as shown in FIG. In this way, the distance between the substrate 4 and the back surface of the semiconductor device body 10 becomes large, and if foreign matter such as flux or solder debris accumulates between the substrate 4 and the semiconductor device body 10, it is easy to remove.
【０００６】[0006]
【発明が解決しようとする課題】従来の半導体装置は以
上のように構成されており、基板４上に実装した場合、
基板４と半導体装置本体１０の裏面との間に異物が入り
込む。この場合、図６に示した構成の半導体装置だと基
板４と半導体装置本体１０のの裏面との間隔が小さいた
め、異物を取り出しにくくなる。また、これを防止する
ために、リードフレーム２を長くすると、異物は取り出
しやすくなるが、半導体装置本体１０からの応力がリー
ドフレーム２だけにかかり、リードフレーム２が変形す
るなどの問題点があった。The conventional semiconductor device is configured as described above, and when mounted on the substrate 4,
Foreign matter enters between the substrate 4 and the back surface of the semiconductor device body 10. In this case, in the case of the semiconductor device having the configuration shown in FIG. 6, the distance between the substrate 4 and the back surface of the semiconductor device body 10 is small, so that it is difficult to take out foreign matter. In order to prevent this, if the lead frame 2 is elongated, foreign matter can be easily taken out, but there is a problem that the stress from the semiconductor device body 10 is applied only to the lead frame 2 and the lead frame 2 is deformed. It was
【０００７】この発明は上記のような問題点を解決する
ためになされたもので、リードフレームが変形しない半
導体装置を得ることを目的とする。The present invention has been made to solve the above problems, and an object thereof is to obtain a semiconductor device in which a lead frame is not deformed.
【０００８】[0008]
【課題を解決するための手段】この発明に係る半導体装
置は、パッケージの裏面と基板が相向かい合うように実
装される半導体装置において、前記パッケージの裏面に
凸部を設け、基板上に実装した場合に前記凸部により前
記パッケージを支えるようにしたことを特徴とする。According to another aspect of the present invention, there is provided a semiconductor device in which a back surface of a package is mounted on a substrate such that a back surface of the package and a substrate face each other. In addition, the convex portion supports the package.
【０００９】[0009]
【作用】この発明においては、パッケージの裏面に凸部
を設け、基板上に実装した場合に凸部によりパッケージ
を支えるようにしたので、リードフレームへの加重が軽
減される。In the present invention, since the convex portion is provided on the back surface of the package and the convex portion supports the package when mounted on the substrate, the load on the lead frame is reduced.
【００１０】[0010]
【実施例】図１および図２はこの発明に係る半導体装置
の一実施例を示す図であり、図１は半導体装置本体の裏
面図、図２は該半導体装置を基板に実装した場合の側面
図である。これらの図において、図７，図８に示した従
来装置との相違点は半導体装置本体１０の裏面の四隅に
凸部３を新たに設けたことである。凸部３は、例えばプ
ラスチックパッケージ１を整形して突出部を設けること
により形成する。その他の構成は従来装置と同様であ
る。1 and 2 are views showing an embodiment of a semiconductor device according to the present invention. FIG. 1 is a rear view of a semiconductor device body, and FIG. 2 is a side view when the semiconductor device is mounted on a substrate. It is a figure. In these figures, the difference from the conventional device shown in FIGS. 7 and 8 is that convex portions 3 are newly provided at the four corners of the back surface of the semiconductor device body 10. The protrusion 3 is formed by shaping the plastic package 1 and providing a protrusion, for example. Other configurations are similar to those of the conventional device.
【００１１】このように構成された半導体装置本体１０
を基板４に実装すると図２に示すように半導体装置本体
１０は凸部３により支えられる。そのため、基板４と半
導体装置本体１０の裏面の間隔を大きくするためにリー
ドフレーム２を整形してもリードフレーム２が変形する
ことがない。なお、基板４と半導体装置本体１０の裏面
の間隔が大きいので、基板４と半導体装置本体１０との
間に溜まった異物はファンからの送風により容易に除去
できるとともに、半導体装置本体１０の裏面からの放熱
も多くなり熱抵抗が増加することがない。The semiconductor device main body 10 thus configured
2 is mounted on the substrate 4, the semiconductor device body 10 is supported by the convex portions 3 as shown in FIG. Therefore, even if the lead frame 2 is shaped in order to increase the distance between the substrate 4 and the back surface of the semiconductor device body 10, the lead frame 2 is not deformed. Since the distance between the substrate 4 and the back surface of the semiconductor device body 10 is large, foreign matter collected between the substrate 4 and the semiconductor device body 10 can be easily removed by blowing air from a fan, and the back surface of the semiconductor device body 10 can be removed. The amount of heat released is also increased and the thermal resistance does not increase.
【００１２】図３および図４はこの発明の他の実施例を
示す図であり、図３は裏面図、図４は図３に示した半導
体装置を基板に実装した際の側面図である。この実施例
においては凸部３を半導体装置本体１０の裏面の四隅に
設けるのではなく、図３に示すようにリードフレーム２
が形成されていない辺に沿って形成している。凸部３を
このような形状にしても上記実施例と同様の効果があ
る。FIGS. 3 and 4 are views showing another embodiment of the present invention. FIG. 3 is a rear view and FIG. 4 is a side view when the semiconductor device shown in FIG. 3 is mounted on a substrate. In this embodiment, the protrusions 3 are not provided at the four corners of the back surface of the semiconductor device body 10, but as shown in FIG.
Are formed along the side where no is formed. Even if the convex portion 3 has such a shape, the same effect as that of the above embodiment can be obtained.
【００１３】なお、上記実施例ではＳＯＰパッケージに
ついて説明したが、パッケージの裏面と基板が対面する
ように実装される半導体装置、例えばＤＩＰ（Dual Inl
inePackage ）型、Shrink ＤＩＰ型、Ｔ（Thin）ＳＯ
Ｐ型、Shrink ＳＯＰ型、ＳＯＪ（Small Outline with
J-leads）型、ＱＦＰ（Quad Flat Packege ）型、ＰＬ
ＣＣ（Plastic Leaded Chip Carrier ）型の半導体装置
すべてにこの発明は適用できる。Although the SOP package has been described in the above embodiment, a semiconductor device, such as a DIP (Dual Inl), mounted so that the back surface of the package and the substrate face each other.
inePackage) type, Shrink DIP type, T (Thin) SO
P type, Shrink SOP type, SOJ (Small Outline with
J-leads) type, QFP (Quad Flat Packege) type, PL
The present invention can be applied to all CC (Plastic Leaded Chip Carrier) type semiconductor devices.
【００１４】[0014]
【発明の効果】以上のようにこの発明によれば、パッケ
ージの裏面に凸部を設け、基板上に実装した場合に凸部
によりパッケージを支えるようにしたので、リードフレ
ームへの加重が軽減される。その結果、リードフレーム
を整形して基板とパッケージの裏面との間隔を大きくし
てもリードフレームが加重により変形しなくなるという
効果がある。As described above, according to the present invention, since the convex portion is provided on the back surface of the package and the convex portion supports the package when mounted on the substrate, the load on the lead frame is reduced. It As a result, even if the lead frame is shaped to increase the distance between the substrate and the back surface of the package, the lead frame is prevented from being deformed by the weight.
【図１】この発明に係る半導体装置の一実施例の裏面図
である。FIG. 1 is a back view of an embodiment of a semiconductor device according to the present invention.
【図２】図１に示した装置を基板に実装した際の側面図
である。FIG. 2 is a side view when the device shown in FIG. 1 is mounted on a substrate.
【図３】この発明の他の実施例である半導体装置の裏面
図である。FIG. 3 is a rear view of a semiconductor device according to another embodiment of the present invention.
【図４】図３に示した装置を基板に実装した際の側面図
である。4 is a side view when the device shown in FIG. 3 is mounted on a substrate.
【図５】従来の半導体装置の裏面図である。FIG. 5 is a back view of a conventional semiconductor device.
【図６】図５に示した装置を基板に実装した際の側面図
である。6 is a side view of the device shown in FIG. 5 mounted on a substrate.
【図７】従来の他の半導体装置の裏面図である。FIG. 7 is a rear view of another conventional semiconductor device.
【図８】図７に示した装置を基板に実装した際の側面図
である。8 is a side view of the device shown in FIG. 7 mounted on a substrate.
３ 凸部 ４ 基板 １０ 半導体装置本体 3 convex part 4 substrate 10 semiconductor device main body
Claims (1)
に実装される半導体装置において、前記パッケージの裏
面に凸部を設け、基板上に実装した場合に前記凸部によ
り前記パッケージを支えるようにしたことを特徴とする
半導体装置。Claim: What is claimed is: 1. A semiconductor device which is mounted so that a back surface of a package and a substrate face each other. When a convex portion is provided on the back surface of the package and the convex portion is mounted on a substrate, A semiconductor device characterized by supporting a package.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16798191A JPH0513607A (en) | 1991-07-09 | 1991-07-09 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16798191A JPH0513607A (en) | 1991-07-09 | 1991-07-09 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0513607A true JPH0513607A (en) | 1993-01-22 |
Family
ID=15859601
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16798191A Pending JPH0513607A (en) | 1991-07-09 | 1991-07-09 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0513607A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010192848A (en) * | 2009-02-20 | 2010-09-02 | Yamaha Corp | Semiconductor package and method of manufacturing the same |
-
1991
- 1991-07-09 JP JP16798191A patent/JPH0513607A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010192848A (en) * | 2009-02-20 | 2010-09-02 | Yamaha Corp | Semiconductor package and method of manufacturing the same |
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