JPS60142623A - デイジタルｐｌｌ回路 - Google Patents

デイジタルｐｌｌ回路

Info

Publication number
JPS60142623A
JPS60142623A JP58250939A JP25093983A JPS60142623A JP S60142623 A JPS60142623 A JP S60142623A JP 58250939 A JP58250939 A JP 58250939A JP 25093983 A JP25093983 A JP 25093983A JP S60142623 A JPS60142623 A JP S60142623A
Authority
JP
Japan
Prior art keywords
clock
circuit
output
flip
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58250939A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0345935B2 (enrdf_load_html_response
Inventor
Kotaro Suzuki
孝太郎 鈴木
Nobuo Kamanaka
鎌仲　伸雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic System Solutions Japan Co Ltd
Original Assignee
Matsushita Graphic Communication Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Graphic Communication Systems Inc filed Critical Matsushita Graphic Communication Systems Inc
Priority to JP58250939A priority Critical patent/JPS60142623A/ja
Publication of JPS60142623A publication Critical patent/JPS60142623A/ja
Publication of JPH0345935B2 publication Critical patent/JPH0345935B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP58250939A 1983-12-28 1983-12-28 デイジタルｐｌｌ回路 Granted JPS60142623A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58250939A JPS60142623A (ja) 1983-12-28 1983-12-28 デイジタルｐｌｌ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58250939A JPS60142623A (ja) 1983-12-28 1983-12-28 デイジタルｐｌｌ回路

Publications (2)

Publication Number Publication Date
JPS60142623A true JPS60142623A (ja) 1985-07-27
JPH0345935B2 JPH0345935B2 (enrdf_load_html_response) 1991-07-12

Family

ID=17215257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58250939A Granted JPS60142623A (ja) 1983-12-28 1983-12-28 デイジタルｐｌｌ回路

Country Status (1)

Country Link
JP (1) JPS60142623A (enrdf_load_html_response)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT201700057049A1 (it) * 2017-05-25 2018-11-25 Fondazione St Italiano Tecnologia Circuito ad anello ad aggancio di fase per sistemi di trasmissione ad elevato bit rate e consumo ridotto

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5773545A (en) * 1980-10-24 1982-05-08 Fujitsu Ltd Phase synchronizing system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5773545A (en) * 1980-10-24 1982-05-08 Fujitsu Ltd Phase synchronizing system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT201700057049A1 (it) * 2017-05-25 2018-11-25 Fondazione St Italiano Tecnologia Circuito ad anello ad aggancio di fase per sistemi di trasmissione ad elevato bit rate e consumo ridotto
WO2018215991A1 (en) * 2017-05-25 2018-11-29 Fondazione Istituto Italiano Di Tecnologia A phase-locked loop circuit for high bit-rate and low consumption transmission systems
US10879909B2 (en) 2017-05-25 2020-12-29 Fondazione Istituto Italiano Di Tecnologia Phase-locked loop circuit for high bit-rate and low consumption transmission systems

Also Published As

Publication number Publication date
JPH0345935B2 (enrdf_load_html_response) 1991-07-12

Similar Documents

Publication Publication Date Title
US8315349B2 (en) Bang-bang phase detector with sub-rate clock
JPS60227541A (ja) ディジタルｐｌｌ回路
JP2970717B2 (ja) フレ−ム同期回路
JPH0744448B2 (ja) デジタル位相同期ル−プ回路
US4741004A (en) High-speed programmable divide-by-N counter
JP2660769B2 (ja) 同期デジタルクロック用スケーラ
JPS60142623A (ja) デイジタルｐｌｌ回路
JPS5957530A (ja) 位相同期回路
US7157953B1 (en) Circuit for and method of employing a clock signal
JP4434277B2 (ja) クロック生成回路およびその使用方法
JP2970617B2 (ja) フレーム同期回路
JPH0738427A (ja) 位相同期ループ用デジタルロック検出器及び方法
JPS60142622A (ja) デイジタルｐｌｌ回路
CN114337661B (zh) 基于pll电路的小数分频和动态移相系统
JP3132657B2 (ja) クロック切替回路
JP4518377B2 (ja) Ｄｌｌ回路
JP2891814B2 (ja) ディジタルｐｌｌ回路
JP2543514B2 (ja) タイミング信号発生器
CN120658252A (zh) 一种分频电路、芯片及电子设备
JPH02312419A (ja) 位相同期回路
JPH01174977A (ja) 動作検出装置
JPH0429409A (ja) クロック信号作成回路
JPS6144423B2 (enrdf_load_html_response)
JPH1093401A (ja) クロック周波数逓倍回路
JPS5814630A (ja) 位相同期回路