JPS60126970A - Modulator and demodulator for facsimile - Google Patents

Abstract

PURPOSE:To operate an automatic gain control circuit accurately by controlling the automatic gain control circuit with the output signal of a delay circuit which delays the control signal of the automatic gain control circuit inputted from the 2nd input terminal with the output of a delay amount detecting circuit. CONSTITUTION:An analog signal inputted from an input terminal 1 is inputted to an envelope detecting circuit 8 and the delay amount detecting circuit 7 detects the delay amount of the output of the envelope detecting circuit 8 and receive signal of the output of a demodulator 3; and the output of the delay amount detecting circuit 7 is inputted to the delay circuit 6, which delays and inputs an AGC control signal to AGC. The delay amount of the output of the envelope detecting circuit 8 and receive data is denoted as tau and the time interval of transmission of a facsimile control part between one AGC control signal and the next control signal is denoted as T. The facsimile control part generates the AGC control signal from the receive data outputted from the modulator and demodulator, so the signal shifts by tau from an original signal and is therefore delayed in the delay circuit 6 by (T-tau) to make the timing of the control signal coincident with the phase section of the analog signal.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a facsimile modem and, more particularly, to an automatic gain control circuit in a facsimile modem.

2. Description of the Prior Art In a facsimile modulation/demodulation device, the operation of an automatic gain control circuit (AGC) is performed in the phase signal section of an analog signal according to a control signal of the AGC, as shown in FIG. The facsimile control unit determines the timing of outputting the control signal based on the data received from the modulator/demodulator. However, there is a delay between when the modem inputs the analog signal, demodulates it, and outputs the received data, so when the timing of the control signal is set based on the received data, the timing actually shifts by the delay of the modem. As a result, AGc is no longer properly controlled.

FIG. 2 is a block diagram of a conventional facsimile modem of this type. Conventionally, the facsimile control unit generates an AGC control signal that takes into account the internal delay of the modem and inputs it to the modem. If the delay amount is fixed, control is possible, but if the delay amount is variable, the timing of the AGC control signal will shift, and the AGc
The disadvantage is that it becomes uncontrollable. In FIG. 2, %1%4 represents an input terminal, 2 represents an automatic gain control circuit, 3 represents a demodulator, and 5 represents an output terminal.

OBJECTS OF THE INVENTION The present invention has been made based on the above consideration, and therefore, an object of the present invention is to detect the amount of delay within a modulation/demodulation device and create the timing of an AGC control signal in order to eliminate the above drawbacks. , to ensure that AGCwJ works are performed correctly.

Structure of the Invention In order to achieve the above object, a facsimile modulation/demodulation device according to the present invention includes an envelope detection circuit for envelope detection of an analog signal input from a first input terminal, and an envelope detection circuit for envelope detection of an analog signal inputted from a first input terminal; a delay amount detection circuit that detects the amount of delay between received data and the output of the envelope detection circuit; and a control signal of the automatic gain control circuit inputted from a second input terminal is delayed by the output of the delay amount detection circuit. Detailed Description of the Invention Next, a preferred embodiment of the present invention will be described with reference to the drawings. Let me explain in detail with reference.

FIG. 3 is a block diagram showing one embodiment of the present invention. In FIG. 3, the same reference numbers as in FIG. 2 indicate the same elements as in FIG. Reference number 6 indicates a delay circuit, 7 indicates a delay amount detection circuit, and 8 indicates an envelope detection circuit.

The analog signal input from the input terminal 1 is input to the envelope detection circuit 8, and the delay amount detection circuit 7 detects the delay amount between the output of the envelope detection circuit 8 and the received data of the output of the demodulator 3, and the delay is detected. The output of the amount detection circuit 7 is input to the delay circuit 6,
C control signal is delayed and input to AGC.

Now, the delay amount between the output of the envelope detection circuit 8 and the received data is τ
, Since the time interval from when the facsimile control unit issues an AGC control signal to when it issues the next control signal is constant, let that time interval be T (see Figure 81).0 The facsimile control unit outputs the AGC control signal. Since it is generated from the received data output from the modulator/demodulator, there is a timing difference compared to the original analog signal. Since it is impossible to temporally advance the control signal by τ within the modulation/demodulation device, it is delayed by (T-τ) within the delay circuit 6 to match the timing of the control signal with the phase interval of the analog signal.

Effects of the Invention The present invention has the above-described configuration, so that even if the delay amount in the zD1 modulation/demodulation device is varied, the timing of the AGC control signal is followed without deviation, and positive AGO control is possible. Naru 0

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the automatic gain control operation of a conventional facsimile modem, FIG. 2 is a block diagram of the conventional facsimile modem, and FIG. 3 is a block diagram showing an embodiment of the present invention. 1.4...Input terminal, 2...Automatic gain control circuit (A
GC), 3... Demodulator, 5... Output terminal, 6...
Delay circuit, 7...Delay amount detection circuit, 8...Envelope detection circuit Patent applicant: NEC Co., Ltd. Representative: Patent attorney Yutabe Kumagai

Claims (1)

[Claims] An envelope detection circuit that performs envelope detection of an analog signal input from a first input terminal, and a delay amount detection circuit that detects the amount of delay between the received data output from an output terminal and the output of the envelope detection circuit. and a delay circuit that delays a control signal of the automatic gain control circuit inputted from a second input terminal by the output of the delay amount detection circuit, and controls the automatic gain control circuit with the output signal of the delay circuit. A facsimile modulator and demodulator whose sexual characteristic is