JPS6229266A - Automatic gain control circuit - Google Patents

Abstract

PURPOSE:To eliminate the need for an AGC-enable signal and a sample-and-hold circuit by storing a carrier signal power integrated value within a prescribed period and controlling the gain of an automatic gain control circuit based on the maximum value. CONSTITUTION:An input signal x(t) is fed to an A/D converter 2 via a variable gain amplifier 1 having prescribed gain characteristics and converted into a digital signal output y(t). The digital signal output y(t) is fed back to the carrier power integration arithmetic unit 3 as a digital quantity and outputted as a carrier signal power integrated value b(t). The power integrated value b(t) is stored in a storage circuit 4 for a prescribed period T3. When the storage in the storage circuit 4 is finished, the maximum value of the power integrated value b(t) is detected by a maximum value detection circuit 5. The maximum value is fed to an AGC output section 6 of the next stage, the variable gain amplifier 1 is controlled by an output signal c(t) of the output section 6 to decide the gain of the said AGC circuit. The output signal c(t) decides the gain of one frame at each prescrib periods T3, T3'.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an automatic gain control circuit (hereinafter referred to as an AGC circuit) used, for example, in a facsimile modem that employs an AM-PM-VSB transmission method as a modulation method. .

2. Description of the Related Art Conventionally, the input signal to this type of AGC circuit is generally the fourth one.
The frame format shown in the figure is adopted. In other words, the fourth
In the figure, the carrier wave of the synchronization signal (T1 interval) is always sent out in the T1 interval within a predetermined period T3, and the image information signal is modulated and sent out in the T2 interval (image information interval).

Incidentally, according to the provisions of CCITT Recommendation T.3, the predetermined period T3 is 176 seconds, and T1:T2 is 1:19.

When the entire image information of one frame is black pixels, there is no signal in the image information section T2, so the gain control of the AGC circuit needs to be performed based on the power of the T1 section (synchronizing signal section).

By the way, this type of conventional AGC circuit has an analog circuit configuration, as shown in FIG.

In the figure, 21 is a variable gain amplifier, 22 is a carrier wave power integration calculator, 23 is a subtracter, 24 is an integrator, and 25 is a sample and hold circuit. In addition, the signal waveform of each part is
As shown in the figure.

As is clear from FIGS. 5 and 6, the input signal to the variable gain amplifier 21! (t) becomes an output signal y (t) after being input to the amplifier 21 . In this case, the variable gain amplifier 21 determines the amplitude of the output signal y (t).

That is, the carrier wave signal power integral value is determined from the output signal y (t) by the carrier wave power integral calculator 22, and the difference signal b between the determined carrier wave signal power integral value and the target value G is
(t) is obtained by the subtracter 23.

However, the difference signal b (g) is integrated by an integrator 24, and the gain of the variable gain amplifier 21 is determined by this integrated value.

However, since the input signal x (t) is AM modulated, the output signal of the integrator 24 cannot be directly applied to the variable gain amplifier 21 .

As a countermeasure against this, conventionally, an AGC enable signal k(1) which instructs on/off control of the AGC circuit has been used, which responds only to the carrier wave of the synchronization signal in the T1 interval.

This AGC enable signal k (t) functions as a strobe signal for the sample and hold circuit 26 . Moreover, this signal k(t) itself is a synchronization signal analogous to the output signal y(t) of the AGC circuit, and is
It is applied from outside the circuit.

The output signal 9(t) of the sample hold circuit 25 controlled by this AGC enable signal k(t) is the AGC enable signal k(t).
The gain of the circuit is determined so that the image information signal in the image information section T2 is kept constant.

Problems to be Solved by the Invention By the way, if the synchronization signal of the input signal The output signal c (t) of No. 25 becomes a signal containing an error component based on the timing shift, and this causes the gain of the AGC circuit to fluctuate, resulting in distortion in the image information signal.

Also, due to some reason, the timing of both signals may be
If there is a significant deviation, the AGC circuit will operate with no signal and its output will be in a saturated state.

Therefore, it is difficult to determine which signal is a synchronization signal, and it is difficult to generate a correct AGC enable signal k (t).

Furthermore, the conventional AGC circuit of this type includes the sample and hold circuit (mainly composed of a capacitor and a switch).

)26, it becomes difficult to maintain a constant charge due to charge escaping from the capacitor or switch or leaking from the circuit board, and this change in charge causes the gain of the AGC circuit to fluctuate. There is also the problem of causing distortion of the image information signal.

The present invention was made in view of the above-mentioned circumstances, and
The maximum value is determined from the carrier signal power integral value during a predetermined period, and the gain of the AGC circuit is controlled using this maximum value, without using a conventional sample-hold circuit or AGC enable signal. The purpose is to provide an AGC circuit.

Means for Solving the Problems In order to achieve the above object, the automatic gain control circuit of the present invention includes a storage means for storing the carrier signal power integral value of the synchronization signal during a predetermined period, A detection means for detecting the maximum value among the values is provided, and the gain of the AGC circuit is controlled based on the maximum value.

Function: Stores the carrier wave signal power integral value (output of the carrier wave power integral calculator) of the synchronization signal during a predetermined period, detects the maximum value from among the stored carrier wave signal power integral values, and calculates the value based on the maximum value. Since the gain of the AGC circuit is determined, all the inconveniences that occurred when using the conventional AGC enable signal and sample-and-hold circuit (capacitive element) are eliminated, and a stable constant gain can always be maintained. becomes.

Embodiment FIG. 1 is a block diagram of a schematic configuration showing one embodiment of an AGC circuit according to the present invention, and FIG. 2 is a signal waveform diagram at each part of FIG. 1.

In FIG. 1, 1 is a digitally controlled variable gain amplifier;
2 is an A/D converter, 3 is a carrier wave power integration calculator that integrates the carrier wave power from the A/D converter 2, and 4 is a carrier wave signal power integral value for a predetermined cycle period T3, which is the output of the calculator 3. b (t), and 5 is a maximum value detection circuit (5) for detecting the maximum value of carrier wave signal power integral values b (t) stored in the storage circuit 5. (detection means), 6 is an AGC output section for outputting the maximum value detected by the detection circuit 5 to the variable gain amplifier 1;

The circuit configuration shown in FIG. 1 is a digital system except for the A/D converter 2.

An input signal x (t) is first supplied to an A/D converter 2 via a variable gain amplifier 1 having predetermined gain characteristics, and is converted into a digital signal output y (t).

The Δ digital signal output y (t) is fed back as a digital value to the carrier wave power integral calculator 3, and Δ is outputted from the carrier wave power integral calculator 3 as the carrier wave signal power integral value b (t). This power integral value b (t) has a predetermined period T
The data is stored and stored in the memory circuit 4 for 3 hours. For this storage, for example, an appropriate number (n) of the power integral values b(t) may be sampled at every sampling period Δ during a predetermined period T3, and these may be stored in the memory.

When the storage in the storage circuit 4 is completed, the maximum value detection circuit 5 then detects the maximum value of the power integral value b (t). This maximum value is supplied to the next stage AGC output section 6, and the output signal c(t) of the output section 6 controls the variable gain amplifier 1 to determine the gain of the AGC circuit. Note that the output signal c (t) has a predetermined period T3. The gain for one frame is determined every T3'.

The input signal x (t) is output from the variable gain amplifier 1 with a gain determined by the maximum value, and this is A
The signal is outputted via the /D converter 2 as a digital signal ratio Δy (see FIG. 2). In this way, a stable constant gain is always maintained, and an undistorted image information signal can be extracted from the T2 period.

FIG. 3 shows another embodiment of the present invention, in which the same parts as in FIG. 1 are denoted by the same symbols. In this embodiment, the output signal from the variable gain amplifier 1
The signal is fed back to an analog carrier power integral calculator 3a, and the output signal (carrier signal power integral value) of the calculator 3a is stored and stored in a storage circuit 4 via an A/D converter 2.

Even in such a configuration, the same operation and effect as the embodiment shown in FIG. 1 can be achieved.

Effects of the Invention As is clear from the detailed description above, the automatic gain control circuit of the present invention stores the carrier signal power integral value within a predetermined cycle period, and adjusts the gain of the automatic gain control circuit based on the maximum value. Since it is designed to control the voltage, it is not necessary to apply it from the outside like in the past.

This not only eliminates the need for AGC enable signals and sample/hold circuits, but also has the outstanding effect of making it possible to obtain stable received signals.

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram of an automatic gain control circuit according to one embodiment of the present invention, FIG. 2 is a signal waveform diagram of the same main part, FIG. 3 is a schematic block diagram of another embodiment of the present invention, and FIG. FIG. 5 is a waveform diagram for explaining input signals, FIG. 5 is a schematic block diagram of a conventional automatic gain control circuit, and FIG. 6 is a signal waveform diagram at each part thereof. 1...Variable gain amplifier, 2...A/D
Converter, 3.3a... Carrier wave power integral calculator,
4... Memory circuit (memory means), 6...
Maximum value detection circuit (detection means), 6...AGC output section. Name of agent: Patent attorney Toshio Nakao and one other person <Go de? ＜−1≧
((Go Figure 3 1 lJ 1 Figure 5 2)

Claims (1)

[Claims] A control circuit that receives an amplitude modulation signal including a synchronization signal and an image information signal within a predetermined period, and performs automatic gain control based on a carrier signal power integral value of the synchronization signal during the predetermined period, the control circuit comprising: A storage means for storing carrier wave signal power integral values between periods, and a detection means for detecting the maximum value of the stored carrier wave signal power integral values, and the automatic transmission is performed based on the maximum value detected by the detection means. An automatic gain control circuit characterized by controlling the gain of the gain control circuit.