JP2547215B2 - Auto white balance device - Google Patents

Description

The present invention relates to an auto white balance device, and more particularly to an auto white balance device for automatically controlling a gain of a color signal in a video signal transmission system.

[Prior Art] In a conventional auto white balance device, for example, as shown in FIG. 6, an input line 1 of a color video signal of three primary colors of R, G, B transmitted from an image sensor (not shown). Gain control amplifiers (hereinafter abbreviated as GCA) 4,5 are respectively inserted in the input lines 1 and 3 of the R signal and the B signal out of the output lines 6 and 7 of the GCA 4,5. R, B
The signal and the G signal of line 2 are sent to the circuit of the next stage as a video signal, and at the same time, the R and B signals of the output lines 6 and 7 are used as the control information for white balance adjustment of the gain control of GCA4,5. Used for. The signals of the output lines 6 and 7 that have passed through the GCA4 and 5 are averaged by a low pass filter (hereinafter abbreviated as LPF) 61 and 62 and then fed back, and the outputs of the LPFs 61 and 62 are respectively inverted amplifier circuits 63 and 62. 64
The G signal of line 2 input to the inverting amplifier circuits 63 and 64 is compared with the output of LPF60 averaged by LPF60, and the error output is supplied to the control terminals of GCA4, 5 GCA4 and 5 are controlled in the direction of decreasing. Therefore, in the auto white balance device having the feedback loop as described above,
Even if the input signal level changes, or due to temperature changes, etc.
Even if the characteristics of GCA4, 5 are changed slightly, they are not affected and it is possible to take out a color output signal with proper white balance.

[Problems to be Solved by the Invention] By the way, the LPFs 60, 61, 62 are used in the above-mentioned conventional device in order to obtain the average level of the signal of line 2 and the output signals of GCA4,5, and in the feedback loop. This is to stabilize the. However, inserting the LPF61, 62, which is a delay transmission system, in the feedback loop causes the control signal supplied to the control terminals of the GCA4,5 to be significantly delayed with respect to the controlled signal supplied to the GCA4,5. Therefore, the responsiveness of the gain control is poor and it cannot follow the high speed.

Generally, in a video camera or the like that obtains continuous images, a high-speed response is not required for white balance adjustment, so the above-described conventional device can sufficiently achieve the purpose of use, but in an electronic still camera, Requires a high-speed response because it obtains one image in a short time, and the conventional device cannot be applied to an electronic still camera or the like which requires such a high-speed response.

In view of such problems, it is an object of the present invention to provide an auto white balance device that is excellent in high-speed response and that is stable with respect to temperature changes and the like.

[Means for Solving Problems] An auto white balance device according to the present invention includes a gain control transfer element that transfers a color signal with a gain corresponding to a given gain control signal, and an input side of the gain control transfer element. Gain control for obtaining the level of the gain control signal by comparing the output level of the gain control transfer element with the time integral value of the color signal preliminarily assumed as the reference in the first time section It comprises a signal forming means and a gain holding means for supplying the gain control signal of the required level to the gain control transfer element while keeping the gain control signal steady.

[Operation] The integrating means integrates the input color signal of the gain control transfer element in the first time interval, and in the second time interval after the time interval, the gain control signal forming means operates in the first time interval. A gain control signal corresponding to the output level of the gain control transfer element when the output level of the integrating means at the end of the time interval is set to the input level is obtained. Then, in the third time section after the second time section, the gain holding means maintains the gain control signal of the level obtained in the second time section and supplies it to the gain control transfer element.

[Example] FIG. 1 shows an example of the device of the present invention. This auto white balance device is, for example, an electronic still camera or the like, which is inserted in the transmission path of an image signal, and R, G, B color image signals from an image pickup device (not shown) are line 1, 2, Transmitted by 3. Of these lines, lines 1 and 3 relating to R and B signals are connected to one input contact terminal a of the analog switches 8 and 9, respectively, and
The output terminals of 9 are connected to the input terminals of GCA4,5. Output of GCA4,5, R and B signals of lines 6 and 7 and G of line 2
The signal is sent as a video signal to the circuit in the next stage. Then, the R, G, B signals of the input lines 1, 2, 3 and the R, B signals of the output lines 6, 7 are used as control information for white balance adjustment.

The input terminals of the integration holding circuits 11, 12, and 13 are connected to the input lines 1, 2, and 3 via a high-level cut circuit 10, respectively. Of the integration holding circuits 11, 12, 13 the output terminals of the integration holding circuits 11, 13 for the R and B signals are connected to the other input contact terminals b of the analog switches 8, 9 respectively to integrate the G signals. The holding circuit 12 is connected to one of the input terminals of the error detection holding circuits 14 and 15. The other input terminals of the error detection holding circuits 14 and 15 are connected to the output lines 6 and 7, respectively, and the output terminals of the error detection holding circuits 14 and 15 are connected to the control terminals of the GCAs 4 and 5, respectively. That is, the error detection holding circuits 14 and 15 are
The R and B signals of the output lines 6 and 7 of the are fed back, and the G signal is controlled by comparison control with the output of the integral holding circuit 12
It controls the gain of A4,5.

The above GCA4 and 5 are VCA (voltage control amplifier) having a characteristic that the gain increases as the voltage of the control terminal rises, and those with sufficiently fast response are used.

Further, a timing signal St for switching the two input contact terminals a and b of the analog switches 8 and 9 and the integral holding circuits 11, 12, and 13 by a system controller (not shown).
The reset signal Sr for starting integration, the hold signal Sh for holding the integrated output, and the sampling signal Ss of the error detection holding circuits 14 and 15 are given.

As shown in FIG. 2, the integration holding circuits 11, 12, 13 are
The hold switch 21, the resistors 22 and 23, the operational amplifier 24, the integrating capacitor 25, and the reset switch 26 are included, and all have the same circuit characteristics. The hold switch 21 is controlled by the hold signal Sh from the system controller, and the reset switch 26 is controlled by the reset signal Sr.

In the integration holding circuit 11 (12, 13) shown in FIG. 2, when the hold switch 21 connected between the input terminal and the ground is open, the signal at the input terminal is an operational amplifier.
It is inputted to the inverting input terminal of 24 through the resistor 22. When the hold signal Sh is applied and the hold switch 21 is closed, the signal at the input terminal is not input to the operational amplifier 24. Since the parallel circuit of the integrating capacitor 25 and the reset switch 26 is connected between the inverting input terminal and the output terminal of the operational amplifier 24, integration is not performed when the reset switch 26 is closed, but the reset switch 26 does not operate. When opened by the reset signal Sr, at this point, the signal charge input to the inverting input terminal of the operational amplifier 24 starts to be accumulated in the integrating capacitor 25, and the integrated voltage starts to be output to the output terminal of the operational amplifier 24.

Further, the error detection holding circuits 14 and 15 are, as shown in FIG. 3, an operational amplifier 31 and gain setting resistors 32, 33, 34 and 34 '.
And a differential amplifier 30 including a phase compensation capacitor 35
And a sampling hold circuit 39 composed of a sampling switch 36, a hold capacitor 37, and a voltage follower operational amplifier 38, and have the same circuit characteristics. The sampling switch 36 is controlled by the sampling signal Ss from the system controller.

In the error detection holding circuit 14 (15) shown in FIG. 3, the output of the integration holding circuit 12 is input to the non-inverting input terminal of the operational amplifier 31 through the resistor 32, and the inverting input terminal of the operational amplifier 31 is input to the GCA4 via the resistor 33. Since the output of (5) is input, the difference between the output of the integration holding circuit 12 and the output of GCA4 (5) is amplified and output from the operational amplifier 31. The output amplified by this difference is output from the operational amplifier 38 as it is when the sampling switch 36 is closed because the sampling signal Ss is at the high level, but the sampling switch 36 switches the sampling signal Ss to the low level. When opened, the output of the operational amplifier 31 immediately before the sampling switch 36 is opened is held in the hold capacitor 37 at this time, and the held signal is output through the operational amplifier 38.

Next, the operation of the automatic white balance device of the above embodiment will be described. The input lines 1, 2, and 3 are supplied with R, G, and B signals of image signals to be gain-controlled for the electronic still camera. This image signal is, as shown in FIG. 4, a vertical blanking period B1, between signals of field periods f1, f2, f3, ....
B2, B3 ... Are formed, and for example, an image of one frame is formed by signals of two consecutive field periods. First, the analog switches 8 and 9 close the reset switch 26 of the integration holding circuits 11, 12, and 13 for a short time immediately before the end of the vertical blanking period B1, that is, immediately before the start of the first field period f1. Reset the integrating capacitor 25. Then, at the start of the field period f1,
One of the input contact terminals a of the analog switches 8 and 9 is connected, and the hold switch 21 and the reset switch 26 are opened. This state is the first field period f1
Maintained. Therefore, the signal of this field period f1 is input to GCA4,5 through the analog switches 8 and 9, and the R, G, B signals of this field period f1 are saturated level of the dynamic range of the image sensor by the high level cut circuit 10. After being cut off, signals that exceed the value are input to the integration holding circuits 11, 12, and 13, respectively, and the integration is started at the start point of the first field period f1.

Further, the signal of the field period f1 that has passed through the GCA4 and 5 is input to the error detection holding circuits 14 and 15. In the error detection holding circuits 14 and 15, the integration holding circuit 1 for the G signal is
Although the error voltage is detected by the operational amplifier 31 by comparison with the output voltage of 2, the above error voltage is GCA4,5, because the sampling switch 36 is open during this field period f1.
Is not sent to the control terminal of. That is, for the signals in the first field period f1, the R and B signals input to GCA4,5 are subjected to gain control determined by the initial output values of the error detection holding circuits 14 and 15, and output from GCA4,5. Taken out from lines 6 and 7.

Then, when the first field period f1 ends and the vertical blanking period B2 is entered, at this point, the analog switches 8 and 9 are switched to the state in which the other input contact terminal b is connected by the timing signal St. Further, at this point, the integration holding circuits 11, 12, 13 are supplied with the hold signal Sh and the hold switch 21 is closed, so that the first holding circuit 21 is closed.
The signal integrated over the field period f1 of 1 is sampled and held. Therefore, in the vertical blanking period B2, the integrated outputs of the integration holding circuits 11 and 13 for the R and B signals are input to the GCA4 and 5 through the analog switches 8 and 9, respectively, and the integration output of the integration holding circuit 12 for the G signal is It is input to the error detection holding circuits 14 and 15. Further, in the error detection holding circuits 14 and 15, since the sampling switch 36 is closed by the sampling signal Ss issued in synchronization with the timing signal St, the error output between the output of GCA4,5 and the integrated output of the integration holding circuit 12 is generated. When output from the operational amplifier 31 of the differential amplifier 30, this error output is output to the sampling switch 36.
Stored in the hold capacitor 25 through
Output from 38. The error outputs of the error detection holding circuits 14 and 15 are input to the control terminals of GCA4 and GCA4, respectively. Here, the output of GCA4,5 → error detection holding circuit 14,15 → G
Since a negative feedback loop called the control terminal of CA4,5 is formed, the gain setting resistors 32 to 34
When the value of is adjusted to set the gain of the differential amplifier 30 to be sufficiently large, the outputs of the GCAs 4 and 5 are controlled so as to have substantially the same level as the output of the integral holding circuit 12. That is, in the vertical blanking period B2, when the integrated output value of the R and B signals in the first field period f1 passes through GCA4,5, feedback control is performed so as to match this value with the integrated output value of the G signal. The gain of GCA4, 5 is controlled. And GCA at this time
The value of the gain control signal to the control terminals of 4 and 5 is charged in the hold capacitor 37. Although the phase compensation capacitor 35 is used to prevent oscillation of the system, it may not be necessary depending on the characteristics of the system, and even if it is necessary, a sufficiently small value can be used, so the control operation is performed at high speed. Thus, in the vertical blanking period B2, the gain control appropriate for the average signal in the field period f1 can be obtained by the feedback control of GCA4, 5.

When the vertical blanking period B2 ends and the second field period f2 is reached, the timing signal St is issued at the rising edge of the signal in the second field period f2, and the analog switches 8 and 9 are again connected to one of the input contact terminals a. Are connected. Then, the signals of the second field period f2 are input to the GCAs 4 and 5 through the analog switches 8 and 9, respectively. Further, at the start of the field period f2, the sampling switch 36 is opened by receiving the sampling signal Ss, so that the sampling switch 36 samples and holds the error output charged in the hold capacitor 37. This held error output is f2
It is given to the control terminal of GCA4,5 during the period. Therefore, assuming that there is no abrupt color balance change of the input signal in the second field period f2 following the first field period f1, the output signal of the GCA4,5 in the second field period f2 is the G signal. The gain is controlled so that the level is almost the same as the output of line 2.

While the R, G, B signals of the second field period f2 are gain-controlled and output from the lines 6, 2, 7, the input signal of the second field period f2 is the signal of the third field period f3. Integral holding circuits 11, 12, and 13 are used to control the gain control of. Then, when the second field period f2 ends and the vertical blanking period B3 enters, the analog switches 8 and 9 are in a state in which one input contact terminal a is connected, and integration is performed over the second field period f2. The signals integrated and held in the holding circuits 11 and 13 pass through GCA4 and
A signal based on the error output between the outputs of 4,5 and the output of the integration holding circuit 12 is input to the control terminals of the GCA4,5, and the error between the output of the integration holding circuit 12 and the outputs of the GCA4,5 becomes zero. Is feedback controlled. Therefore, after that, when the vertical blanking period B3 ends and the third field period f3 starts, the one input contact terminal a of the analog switches 8 and 9 is connected at the rising edge of the signal of the third field period f3. In addition, since the error output is sampled and held, the signal in the third field period f3 is GC
It is input to A4,5, and the output of the integration hold circuit 12 and GC based on the signal of the field period f2 in the vertical blanking period B3.
The gain control signal from the hold capacitor 37, which samples and holds the error output from the outputs of A4,5, controls the gain of GCA4,5. Therefore, even in the third field period f3, the output signals of the GCA4,5 are the second field period f2.
In the third field period f3 subsequent to the above, assuming that there is not a drastic change in the color balance of the input signal, the line 2
The gain is controlled so that the level becomes substantially the same as that of the G signal.

Next, another embodiment of the device of the present invention is shown in FIG. The device of the embodiment shown in FIG.
It uses a D / A converter instead of. As can be seen from the above embodiment, since the R signal system and the B signal system have the same configuration, FIG. 5 shows the configuration of one R signal system (B signal system). In reality, it is assumed that the R and B signal systems are configured independently of each other. The D / A converter 40 is of the current addition type and has a resistor R
R-2R ladder module consisting of 0 to R10, multi-bit (5-bit in the figure) switching contacts S1 to S5, and operational amplifier
41 and a current-voltage converter 44 composed of resistors 42 and 43. The input side of the R-2R ladder module is connected to the output terminal of the analog switch 8 (9). The output terminal of the current-voltage converter 44 is connected to the output terminal of this auto white balance device, and is also connected to one input terminal of the comparator 45. This comparator 45
The other input terminal of is connected to the output terminal of the integration holding circuit 12 for the G signal. The output terminal of the comparator 45 is connected to the S input terminal of an RS flip-flop (hereinafter abbreviated as FF) 48 connected to the pull-up resistor 47. The reset signal Rs is given to the R input terminal of the FF 48. The reset signal Rs is also given to the self-propelled counter 49, and when the counter 49 is given the reset signal Rs, the counter 49 resets the count value and starts counting. FF
The Q output terminal of 48 is connected to the digital interface 50 with a latch for controlling the switching contacts S1 to S5 of the D / A converter 40 by the output of the counter 49. The digital interface with latch 50 is
The switching contacts S1 to S5 of the D / A converter 40 are switched, and when the Q output of the FF 48 is given, the switching state of the switching contacts S1 to S5 at that time is latched (held).

Regarding the operation of the apparatus of this embodiment, the field period f1
At the start point of, the reset signal Rs is issued, the FF 48 and the counter 49 are reset, and the counter 49 starts counting. Then, according to the count value of the counter 49, the switching contacts S1 to S5 are switched by the digital interface with latch 50.
Can be switched. After this, the vertical blanking period B2
Then, when the averaged signal of the signal of the field period f1 is input to the comparator 45 through the D / A converter 40 by the analog switch 8 (9), the output of the D / A converter 40 and the integration holding circuit 12 are output by the comparator 45. When the output of the D / A converter 40 matches the output of the integration holding circuit 12, the digital output with latch 50 latches the output of the counter 49 by the Q output of FF48 and responds to the same count value. Set the switching contacts S1 to S5 in the switching state. Therefore, in the field period f2 after the vertical blanking period B2, the input signal is D / A converted according to the set switching state of the switching contact, and as a result, the gain control is performed in the field period f2, and the field period f2 is changed. An appropriate white balance based on the color signal of f1 can be obtained. As for the image signal after the field period f2, white balance control is performed based on the color signal of the immediately preceding field period, as in the above-described embodiment.

Although not specifically shown in the image signal shown in FIG. 4, each field period (f1, f2, f3 ...) Of course includes a plurality of horizontal blanking periods. Therefore, the integration holding circuits 11, 12 and 13 have a circuit configuration that integrates only in the effective signal section of the one field period, excluding the horizontal blanking period.

The main components of the above-described auto white balance device can be summarized as a gain control transfer element (GC) that transfers a color signal with a gain according to a given gain control signal.
A4,5, D / A converter 40), integrating means (integral holding circuits 11, 12, 13) for integrating the color signal on the input side of the gain control transfer element in the first time section, and the first time In the second time section after the section, the output level of the gain control transfer element when the output level of the integrating means at the end of the first time section is set to the input level and is assumed as a reference in advance. Gain control signal forming means for obtaining the level of the gain control signal by comparison with the time integral value of the color signal in the first time section (error detection holding circuit 1
4, 15 differential amplifiers 30 and comparators 45) and the second time period after the second time period.
And a gain holding means (sampling hold circuit 39, FF48 of the error detection holding circuits 14, 15) for supplying the gain control transfer element with the gain control signal of the level obtained in the time section of It is configured.

[Effects of the Invention] As described above, according to the present invention, since the feedback loop does not include a delay element while adopting the feedback control, the response is remarkably higher than that of the conventional feedback type automatic white balance control. Is fast and has excellent stability.

[Brief description of drawings]

FIG. 1 is a block diagram of an automatic white balance device showing an embodiment of the present invention, FIG. 2 is a specific electric circuit diagram of the integral holding circuit in FIG. 1, and FIG. 1 is a specific electric circuit diagram of the error detection holding circuit in FIG. 1, FIG. 4 is a signal waveform diagram of an example of a color image signal supplied to the apparatus shown in FIG. 1, and FIG. FIG. 6 is a block diagram of an example of a conventional automatic white balance device, which is an electric circuit diagram of an automatic white balance device showing another embodiment. 4,5 …… GCA (gain control transfer element) 8,9 …… Analog switch 11,12,13 …… Integral holding circuit (integrating means) 14,15 …… Error detection holding circuit (gain control signal forming means,
Gain holding means) 25 …… Integration capacitor (integration means) 30 …… Differential amplifier (gain control signal forming means) 37 …… Hold capacitor (gain holding means) 39 …… Sampling hold circuit (gain holding means) 45 …… Comparator (gain control signal forming means) 48 ... FF (gain holding means) 49 ... Counter (gain holding means) 50 ... Digital interface with latch (gain holding means)

Claims (1)

(57) [Claims] 1. A gain control transfer element for transferring a color signal with a gain according to a given gain control signal, and an integrating means for integrating a color signal on the input side of the gain control transfer element in a first time period. In the second time section after the first time section, the output level of the gain control transfer element when the output level of the integrating means at the end of the first time section is set to the input level and the output level of the gain control transfer element in advance. Gain control signal forming means for obtaining the level of the gain control signal by comparing with the time integral value of the color signal assumed as a reference in the first time period, and a third time period after the second time period. In the section, there is provided a gain holding means for supplying the gain control transmission element while maintaining the gain control signal of the level obtained in the second time section in a steady state. Characteristic auto white balance device.