JPS62207039A - Data transmission system - Google Patents

Abstract

PURPOSE:To obtain a system which does not produce a burst error in a synchronizing pattern by applying interleaving to a synchronizing pattern of a digital data and sending the result from the sending side to the receiving side. CONSTITUTION:A T data from an interleaving section 3 is sent to a decoder 6 through a transmission line 5 having a possibility of burst error and an R data with an error in the T data is outputted from the line 5. The decoder 6 consists of a de-interleaving section 7 forming an FR data, a de-formatter section 8 extracting a synchronizing pattern from the FR data, expanding the result in the unit of one frame and forming (recovering) the reception data, a synchronizing detection section 9 detecting a synchronizing pattern from the R data and outputting a synchronizing detection pulse SF, a synchronizing protection section using the pulse SF to initialize the timing control section 11 and the timing control section 11 controlling the initialized de-interleaving section 7 and the de-formatter section 8.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a data transmission system, and particularly to a data transmission system in which a synchronization pattern is not easily affected by burst errors.

(Prior Art) In data transmission systems, there are roughly two types of methods for detecting synchronization patterns on the data receiving side.

One method is a detection method in which, assuming that the length of the synchronization pattern included in the received data is L bits, only when consecutive L bits in the received data completely match the synchronization pattern, the data is regarded as a synchronization pattern.

The other method is a detection method in which if L-Δ bits or more (approximately Δ-1 or 2) of consecutive L bits in the received data match the synchronization pattern, it is regarded as a synchronization pattern.

Of the above two types of synchronization pattern detection methods, the former method detects a complete match of patterns, so the probability of detecting a false synchronization pattern due to an error is extremely low. However, if there is even a single bit error in the synchronization pattern, synchronization cannot be detected, so if there are many errors, it becomes difficult to detect the synchronization pattern, and data following the synchronization pattern is discarded, resulting in a drop in data transmission efficiency.

In contrast, the latter method has the disadvantage that it has a high probability of detecting false synchronization patterns caused by errors, but at the same time it can detect even a small number of errors in the synchronization pattern, so The advantage is that it is easy to detect synchronization patterns even when there are many synchronization patterns, and data following the synchronization patterns is less likely to be discarded.

By the way, burst errors are continuous errors that occur in data. For example, in differential quadrature phase modulation, two bits are transmitted in one symbol while comparing the phase of the previous received symbol and the phase of the current received symbol, so if many burst errors occur, even if the bit error rate is At the very least, the probability that a large number of bits will be erroneous in the synchronization pattern increases, so the advantage of the latter detection method is not utilized.

(Problems to be Solved by the Invention) As mentioned above, in the conventional data transmission system, if many burst errors occur in the data, even if the bit error rate is low, if an error occurs in the synchronization pattern, many bits will be transmitted. This results in an error, so the advantage of the synchronization pattern detection method described above cannot be utilized.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to eliminate the above-mentioned drawbacks and to provide a data transmission system that does not cause burst errors during synchronization patterns.

[Structure of the Invention] (Means and Effects for Solving the Problems) In the data transmission system of the present invention, when transmitting digital data from the transmitting side to the receiving side through a transmission path with burst errors,
The synchronization pattern in the data is interleaved before being transmitted. On the receiving side, an interleaved synchronization pattern is detected using a synchronization detection section consisting of a delay section and a detection section, for example.

(Example) Hereinafter, the present invention will be described in detail based on the example shown in the drawings.

FIG. 1 is a block diagram showing an embodiment of an encoder and decoder used in the data transmission system of the present invention. In this figure, an encoder 1 includes a formatter unit 2 that receives transmission data such as images and audio, compresses this data frame by frame, and creates F data with a synchronization pattern added, the data length of which is, for example, 16 bits. , an interleave section 3 that interleaves synchronization patterns in the F data obtained by the formatter section 2 to create T data, and a timing control section 4 that controls the formatter section 2 and interleave section 3. The T data from the interleaving unit 3 is sent to the decoder 6 through a transmission path 5 which has the possibility of causing burst errors. This transmission line 5 outputs R data in which errors are added to T data.

The decoder 6 includes a dinterleaving unit 7 which inputs R data and dinterleaves it to create FR data, and a dinterleave unit 7 which removes the synchronization pattern from the FR data from the dinterleave unit 7 and processes it in units of one frame. A defomatsuter section 8 that expands and creates (regenerates) received data, a synchronization detection section 9 that inputs R data, detects a synchronization pattern from the R data, and outputs a synchronization detection pulse SF; Timing control unit 1 by synchronization detection pulse SF of
a synchronization protection unit 10 that initializes the synchronization protection unit 1;
The timing control section 11 is initialized by 0 and controls the dinterleave section 7 and the defomatsuter section 8.

Next, the operation of the above-mentioned apparatus will be explained with reference to FIG. Figure 2 (a) shows digital transmission data such as images and audio in a band shape as a data string, and Figure 2 (b)
) shows F data created by compressing the transmission data in (a) frame by frame and adding, for example, a 16-bit synchronization pattern to this compressed data. This shows a state where the data are interleaved at 4-bit intervals. Figure 2 (d) shows the R data after the F data has passed through the transmission line. For example, even if an error occurs in three consecutive bits in the transmission line, an error will occur in the synchronization pattern in the transmitted data. is 1 bit. Figure 2(e) shows the FR data after dinterleaving the R data, and even if there are errors in three consecutive bits as described above, there is only a one-bit error in the rearranged synchronization pattern data string. will occur. Figure 2(f)
shows a data string of received data expanded by removing the synchronization pattern from the FR data in the form of a band.

FIG. 3 is a block diagram that does not show an example of the configuration of the synchronization detection section 9 in FIG. It is composed of a detection section 22 that compares with the pattern. Delay section 21
Inputs a clock synchronized with the data bits to the clock input terminal 56, inputs the R data from the data input terminal 23, and outputs 4 clocks from the 15 output terminals 24 to 38.
4x1d data, 4x2d data, 4x3d data, 4x15d data delayed by 8 clocks, 12 clocks, . . . , 60 clocks are output.

To the detection section, the above R7-'l and 1 extension section. 1 Ka15. ) Each data is input to 16 input terminals 39 to 54, and each input data is compared with the data of the synchronization pattern (original synchronization pattern before interleaving) at the timing of the 16th bit of the R data. As a result, if 15 bits or more match, a synchronization detection pulse SF is output from the output terminal 55.

Next, the operation of the synchronization detector shown in FIG. 3 will be explained with reference to FIGS. 4 and 5. In Figure 4(a), the data length is 16
The bit synchronization pattern shows R data interleaved with 4 bits, the diagonally shaded bits 81 to 31G indicate the 1st to 16th bits of the synchronization pattern, and the parts without diagonal lines indicate other data bits. FIG. 4(b) shows a clock input, and this clock is synchronized with each bit of R data. In the delay section 21, the R data is
2,..., with a delay of 60 clocks,
) as shown in 4X1d, 4X2d, 4X3d,...
, 4X15d data are output from each output terminal 24 to 38 and applied to input terminals 40 to 54 of the detection section 22. at the same time,
The R data is applied to the input terminal 39 of the detection section 22. The detection unit 22 compares the bits of the data applied to the input terminals 39 to 54 with the original synchronization pattern data as shown in FIG. 5 at the 60th (=4×15) clock.
If the bits or more match, a synchronization detection pulse SF as shown in FIG. 4 (W>) is output.

According to the embodiment described above, since a synchronization pattern with a data length of 16 bits is transmitted with 4 bits interleaved, even if a burst error occurs in consecutive 4 bits during transmission, the FR data is dinterleaved. Since only one bit error occurs in the synchronization pattern, it is easy to detect the synchronization pattern even if there are many errors in the transmitted data.

In the above embodiment, a case is described in which a 16-bit synchronization pattern is interleaved with 4 bits, but the present invention is not limited to this, and the present invention is not limited to this. It is possible to interleave at bit intervals.

[Effects of the Invention] As described above, according to the method of the present invention, when transmitting data using a transmission path with burst errors, burst errors do not occur in the synchronization pattern and can be treated as random errors. As a result, a synchronization pattern detection method that allows a small number of errors in the synchronization pattern can be used.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of an encoder and decoder using the data transmission system of the present invention, FIG. 2 is a timing chart explaining the operation of FIG. 1, and FIG. 3 is the synchronization detection of FIG. 1. Block diagram showing an example of the configuration of the fourth section.
The figure is a timing chart explaining the operation of figure 3, and figure 5.
The figure is an explanatory diagram showing a comparison synchronization pattern used in the detection section of FIG. 3. 1... Encoder, 2... Format section,
3... Interleave section, 4.11... Timing control section, 5... Transmission line, 6... Decoder, 7...
Dinterleave section, 8... Default mater section, 9... Synchronization detection section, 10... Synchronization protection section.

Claims (1)

[Scope of claims] In a data transmission method in which digital data including a synchronization pattern is transmitted from a transmitting side to a receiving side through a transmission path, the digital data is transmitted from the transmitting side to the receiving side after being interleaved with the synchronizing pattern. A data transmission method characterized by: