JPS60125021A - 位相制御ル−プの疑似同期検出装置 - Google Patents

位相制御ル−プの疑似同期検出装置

Info

Publication number
JPS60125021A
JPS60125021A JP58233860A JP23386083A JPS60125021A JP S60125021 A JPS60125021 A JP S60125021A JP 58233860 A JP58233860 A JP 58233860A JP 23386083 A JP23386083 A JP 23386083A JP S60125021 A JPS60125021 A JP S60125021A
Authority
JP
Japan
Prior art keywords
frequency
voltage
output
circuit
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58233860A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0557774B2 (en:Method
Inventor
Makoto Akiyama
良 秋山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58233860A priority Critical patent/JPS60125021A/ja
Publication of JPS60125021A publication Critical patent/JPS60125021A/ja
Publication of JPH0557774B2 publication Critical patent/JPH0557774B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP58233860A 1983-12-12 1983-12-12 位相制御ル−プの疑似同期検出装置 Granted JPS60125021A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58233860A JPS60125021A (ja) 1983-12-12 1983-12-12 位相制御ル−プの疑似同期検出装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58233860A JPS60125021A (ja) 1983-12-12 1983-12-12 位相制御ル−プの疑似同期検出装置

Publications (2)

Publication Number Publication Date
JPS60125021A true JPS60125021A (ja) 1985-07-04
JPH0557774B2 JPH0557774B2 (en:Method) 1993-08-24

Family

ID=16961702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58233860A Granted JPS60125021A (ja) 1983-12-12 1983-12-12 位相制御ル−プの疑似同期検出装置

Country Status (1)

Country Link
JP (1) JPS60125021A (en:Method)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63199537A (ja) * 1986-12-15 1988-08-18 マイテル・コーポレーション クロック信号同期装置
US6332007B1 (en) * 1997-12-12 2001-12-18 Nec Corporation Automatic frequency control in FSK receiver using voltage window deviation
WO2005060103A3 (en) * 2003-12-12 2005-12-29 Qualcomm Inc A phase locked loop that sets gain automatically
US7825706B2 (en) 2002-06-28 2010-11-02 Qualcomm Incorporated Phase locked loop that sets gain automatically
CN104584436A (zh) * 2012-08-21 2015-04-29 阿尔卡特朗讯 用于产生系统时钟的系统及温度梯度检测系统

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5839122A (ja) * 1981-08-31 1983-03-07 Fujitsu Ltd 同期はずれ検出回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5839122A (ja) * 1981-08-31 1983-03-07 Fujitsu Ltd 同期はずれ検出回路

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63199537A (ja) * 1986-12-15 1988-08-18 マイテル・コーポレーション クロック信号同期装置
US6332007B1 (en) * 1997-12-12 2001-12-18 Nec Corporation Automatic frequency control in FSK receiver using voltage window deviation
US7825706B2 (en) 2002-06-28 2010-11-02 Qualcomm Incorporated Phase locked loop that sets gain automatically
WO2005060103A3 (en) * 2003-12-12 2005-12-29 Qualcomm Inc A phase locked loop that sets gain automatically
EP1912333A1 (en) * 2003-12-12 2008-04-16 QUALCOMM Incorporated A phase locked loop that sets gain automatically
CN104584436A (zh) * 2012-08-21 2015-04-29 阿尔卡特朗讯 用于产生系统时钟的系统及温度梯度检测系统

Also Published As

Publication number Publication date
JPH0557774B2 (en:Method) 1993-08-24

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