JPS60121337U - Frequency divider circuit - Google Patents
Frequency divider circuitInfo
- Publication number
- JPS60121337U JPS60121337U JP828184U JP828184U JPS60121337U JP S60121337 U JPS60121337 U JP S60121337U JP 828184 U JP828184 U JP 828184U JP 828184 U JP828184 U JP 828184U JP S60121337 U JPS60121337 U JP S60121337U
- Authority
- JP
- Japan
- Prior art keywords
- frequency divider
- divider circuit
- circuit
- masking
- inverting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Image Processing (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1゛図はこの考案の一実施例を示すブロック図、第2
図はn=2の場合のタイミングチャニド2 図である。
1:カウンタ、2:設定部、3:フリップフロップ、4
,11:インバータ、5,5 :NANDゲート、7:
NORゲート、8:モノマルチバイブレータ、9.IQ
:ANDゲート。
■ ΣU七1肝〕−
カウンタのテ′り出カイ直二=二]=α■![j[]全
周毎号出力 O
12,5クロ、2 :
!
→仁J]−]]−」−L
−[−1−「−]−丁−]−」−−゛
ffl工匝テH■口】■ −
−l′Figure 1 is a block diagram showing an embodiment of this invention, Figure 2 is a block diagram showing an embodiment of this invention.
The figure is a timing diagram for n=2. 1: Counter, 2: Setting section, 3: Flip-flop, 4
, 11: Inverter, 5, 5: NAND gate, 7:
NOR gate, 8: Mono multivibrator, 9. IQ
:AND gate. ■ ΣU71 liver〕- Counter output Kai Naoji = 2〕 = α■! [j[] Output for every round O 12.5 cro, 2: ! →J]-]]-"-L-[-1-"-]-Ding-]-"--゛ffl 工匝TEH■口】■--l'
Claims (1)
回路の出力信号を1クロック分マスクする回路とを具え
てなる分周回路。A frequency dividing circuit comprising a circuit for inverting a reference clock signal, and a circuit for masking the output signal of the aforementioned C inversion circuit by one clock.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP828184U JPS60121337U (en) | 1984-01-26 | 1984-01-26 | Frequency divider circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP828184U JPS60121337U (en) | 1984-01-26 | 1984-01-26 | Frequency divider circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60121337U true JPS60121337U (en) | 1985-08-16 |
Family
ID=30487413
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP828184U Pending JPS60121337U (en) | 1984-01-26 | 1984-01-26 | Frequency divider circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60121337U (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5429955A (en) * | 1977-08-10 | 1979-03-06 | Seiko Epson Corp | Frequency devider circuit |
JPS5469371A (en) * | 1977-11-15 | 1979-06-04 | Toshiba Corp | Variable division circuit |
JPS56153842A (en) * | 1980-04-28 | 1981-11-28 | Sanyo Electric Co Ltd | (n-1/2) frequency dividing circuit |
JPS5718128A (en) * | 1980-07-08 | 1982-01-29 | Yamatake Honeywell Co Ltd | Frequency dividing circuit |
-
1984
- 1984-01-26 JP JP828184U patent/JPS60121337U/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5429955A (en) * | 1977-08-10 | 1979-03-06 | Seiko Epson Corp | Frequency devider circuit |
JPS5469371A (en) * | 1977-11-15 | 1979-06-04 | Toshiba Corp | Variable division circuit |
JPS56153842A (en) * | 1980-04-28 | 1981-11-28 | Sanyo Electric Co Ltd | (n-1/2) frequency dividing circuit |
JPS5718128A (en) * | 1980-07-08 | 1982-01-29 | Yamatake Honeywell Co Ltd | Frequency dividing circuit |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS60121337U (en) | Frequency divider circuit | |
JPS5999298U (en) | Dynamic memory access timing circuit | |
JPS59100351U (en) | Processor synchronous control circuit | |
JPS601037U (en) | binary circuit | |
JPS59175193U (en) | timing circuit | |
JPS6064297U (en) | electronic clock | |
JPS5978595U (en) | Memory stop circuit | |
JPS5953441U (en) | microprocessor | |
JPS5978737U (en) | Data selection circuit | |
JPS60127033U (en) | Logic circuit output circuit | |
JPS5837249U (en) | Momentary input transmission circuit | |
JPS6025278U (en) | horizontal oscillation circuit | |
JPS60139342U (en) | odd number divider circuit | |
JPS6078099U (en) | Control device | |
JPS5884589U (en) | Integrated circuit for all-electronic watches | |
JPS58124837U (en) | Integrated circuit with built-in memory | |
JPS59187849U (en) | Ready lamp lighting circuit | |
JPS60132033U (en) | pulse generator | |
JPS61653U (en) | DMA transfer circuit | |
JPS6034435U (en) | rustproof paper | |
JPS6020087U (en) | magnetic tape quantity meter | |
JPS6014987U (en) | line drawing ruler | |
JPS5887143U (en) | magnetic tape | |
JPS59165043U (en) | Malfunction prevention circuit | |
JPS6074338U (en) | Clock generation circuit |