JPS5978737U - Data selection circuit - Google Patents
Data selection circuitInfo
- Publication number
- JPS5978737U JPS5978737U JP17446082U JP17446082U JPS5978737U JP S5978737 U JPS5978737 U JP S5978737U JP 17446082 U JP17446082 U JP 17446082U JP 17446082 U JP17446082 U JP 17446082U JP S5978737 U JPS5978737 U JP S5978737U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- data selection
- selection circuit
- data
- supplied
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のデータ選択回路を示す回路図、第２図は
第１図の動作を説明する為のタイミングチャート、第３
図はこの考案に係るデータ選択回路の一実施例を示す回
路図、第４図は第３図の動作を説明する為のタイミング
チャートである。
１６・・・データ選択回路、１６１，１６２゜１６６・
・・アンド回路、１６３・・・インバータ回路、１６７
・・・オア回路。
（ａ） ＰＩ ’、 −、」九ゴ
（ｄ） ａ” ＋ ＋−−−−−−（ｅ） Ｃ−
一二ｆ−乍存Ｖ−一
す２
ゴ ＋、 、−ロ
ａ ・ Ｉ・ １ ：
一ジゴ］−一二一
！ ｊ： ：！−
＝薩社μｍFigure 1 is a circuit diagram showing a conventional data selection circuit, Figure 2 is a timing chart for explaining the operation of Figure 1, and Figure 3 is a circuit diagram showing a conventional data selection circuit.
The figure is a circuit diagram showing one embodiment of the data selection circuit according to this invention, and FIG. 4 is a timing chart for explaining the operation of FIG. 3. 16...Data selection circuit, 161, 162°166.
...AND circuit, 163...Inverter circuit, 167
...OR circuit. (a) PI', -, ``9 (d) a'' + +------(e) C-
12f-乍existentV-1su2 go +, , -roa・I・1: 1jigo]-121! j: :! −=Satsusha μm
Claims (1)
ド回路と、前記ゲートパルスを反転するインバータ回路
と、このインバータ回路によって反転されたゲートパル
ス及び第２のデータが供給される第２のアンド回路と、
前記第１、第２のデータが供給される第３のアンド回路
と、前記第１、第２、第３のアンド回路の出力が供給さ
れるオア回路とを具備したデータ選択回路。a first AND circuit to which a gate pulse and first data are supplied; an inverter circuit for inverting the gate pulse; and a second AND circuit to which a gate pulse and second data inverted by the inverter circuit are supplied. circuit and
A data selection circuit comprising: a third AND circuit to which the first and second data are supplied; and an OR circuit to which outputs of the first, second and third AND circuits are supplied.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17446082U JPS5978737U (en) | 1982-11-18 | 1982-11-18 | Data selection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17446082U JPS5978737U (en) | 1982-11-18 | 1982-11-18 | Data selection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5978737U true JPS5978737U (en) | 1984-05-28 |
| JPH0221811Y2 JPH0221811Y2 (en) | 1990-06-12 |
Family
ID=30379798
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17446082U Granted JPS5978737U (en) | 1982-11-18 | 1982-11-18 | Data selection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5978737U (en) |
-
1982
- 1982-11-18 JP JP17446082U patent/JPS5978737U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0221811Y2 (en) | 1990-06-12 |
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