JPS60120583A - Semiconductor light emitting device - Google Patents
Semiconductor light emitting deviceInfo
- Publication number
- JPS60120583A JPS60120583A JP58228463A JP22846383A JPS60120583A JP S60120583 A JPS60120583 A JP S60120583A JP 58228463 A JP58228463 A JP 58228463A JP 22846383 A JP22846383 A JP 22846383A JP S60120583 A JPS60120583 A JP S60120583A
- Authority
- JP
- Japan
- Prior art keywords
- buried layer
- layer
- insulating film
- substrate
- grown
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 229910052714 tellurium Inorganic materials 0.000 claims abstract description 8
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 claims abstract description 8
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 abstract description 13
- 239000007791 liquid phase Substances 0.000 abstract description 6
- 239000010931 gold Substances 0.000 abstract description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052737 gold Inorganic materials 0.000 abstract description 4
- 238000000151 deposition Methods 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000013078 crystal Substances 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011669 selenium Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910052711 selenium Inorganic materials 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/3222—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIVBVI compounds, e.g. PbSSe-laser
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0091—Processes for devices with an active region comprising only IV-VI compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/227—Buried mesa structure ; Striped active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/227—Buried mesa structure ; Striped active layer
- H01S5/2275—Buried mesa structure ; Striped active layer mesa created by etching
Landscapes
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Semiconductor Lasers (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】
発明の技術分野
本発明は、遠赤外領域の波長で発振する鉛・錫・チル)
Lt (Pb−3n−Te) /P’b−Te系半導体
発光装置の改良に関する。[Detailed Description of the Invention] Technical Field of the Invention The present invention relates to lead, tin, and chil which oscillate at wavelengths in the far infrared region.
The present invention relates to improvements in Lt(Pb-3n-Te)/P'b-Te based semiconductor light emitting devices.
従来技術と問題点
一般に、Pb−3n−Teからなる化合物半導体は、遠
赤外領域で優れた光電変換機能がある為、赤外線カメラ
の盪像素子、ガス検知素子、そのた種々のセンサなど多
くの開発がなされ、半導体レーザもその一つである。Conventional technology and problems In general, compound semiconductors made of Pb-3n-Te have excellent photoelectric conversion functions in the far-infrared region, so they are used in many applications such as imaging elements of infrared cameras, gas detection elements, and various other sensors. Developments have been made, and semiconductor lasers are one of them.
ところで、従来、光の閉し込め或いは電流狭窄などを行
うのに好適な構造を持つ埋め込み型半導体レーザと呼ば
れる半導体発光装置が知られている。Incidentally, a semiconductor light emitting device called a buried semiconductor laser has been known to have a structure suitable for confining light or confining current.
前記Pb−5n−Teを用いた半導体レーザも埋め込み
型にすれば1通常の埋め込み型半導体レーザと同様な効
果を期待できることは云うまでもない。It goes without saying that if the semiconductor laser using Pb-5n-Te is made into a buried type, the same effects as those of a normal buried type semiconductor laser can be expected.
然しながら、Pb−3n−Teを用いた埋め込み型半導
体レーザを作製するには多くの困難が存在する。However, there are many difficulties in manufacturing a buried semiconductor laser using Pb-3n-Te.
その一つを第1図及び第2図を参照しつつ説明する。尚
、第1図及び第2図は工程要所に於ける半導体レーザの
要部切断正面図である。One of them will be explained with reference to FIGS. 1 and 2. 1 and 2 are cutaway front views of essential parts of the semiconductor laser at key points in the process.
第1図ては、P b −T’e基板1上にメサ状の■〕
b・5n−Te活性層2が形成され、その上にpb・S
n・セレン(Se)埋め込み層3が形成された状態を表
している。In Figure 1, there is a mesa-like shape on the P b -T'e substrate 1]
b・5n-Te active layer 2 is formed, and pb・S
This shows a state in which an n-selenium (Se) buried layer 3 is formed.
図から判るように、埋め込み層3を成長させた場合、基
板1上の全面に形成されず、所々で切れてしまい、下地
である基板1の表面が露出されることになる。As can be seen from the figure, when the buried layer 3 is grown, it is not formed over the entire surface of the substrate 1, but is cut off in places, and the surface of the substrate 1, which is the underlying layer, is exposed.
そこで、第2図に見られるように、電極4を形成すると
、その一部は基板1に直接コンタクトすることになるか
ら、正常な動作をすることはできない。Therefore, as shown in FIG. 2, when the electrode 4 is formed, a part of it comes into direct contact with the substrate 1, so that normal operation cannot be performed.
この種の化合物半導体は、各元素の比重が大きく異なる
為、通常の場合であっても、大型単結晶を得ることは困
難であるので、凹凸が顕著である実際の基板上には良質
の大型単結晶は成長し難いものと考えられる。In this type of compound semiconductor, since the specific gravity of each element differs greatly, it is difficult to obtain a large single crystal even in normal cases. Single crystals are considered difficult to grow.
発明の目的
本発明は、前記埋め込み層の切れに起因する短絡を現用
の技術で得られる構成で解消しようとするものである。OBJECTS OF THE INVENTION The present invention attempts to eliminate the short circuit caused by the breakage of the buried layer with a structure obtainable with current technology.
発明の構成
本発明の半導体発光装置では、少なくとも鉛・テルルか
らなる半導体基板、該半導体基板上に形成されたメサ状
の鉛・錫・テルルからなる活性層、その上に形成された
埋め込み層、その上に形成された絶縁膜、該絶縁膜に形
成された開口を介して前記埋め込み層にコンタクトする
電極を備えてなる構成になっているので、前記埋め込み
層に切れを生じたとしても、その切れは絶縁膜で覆われ
ているから、電極を形成しても、それに依る短絡が発生
ずる虞はない。Structure of the Invention The semiconductor light emitting device of the present invention includes at least a semiconductor substrate made of lead and tellurium, a mesa-shaped active layer made of lead, tin and tellurium formed on the semiconductor substrate, a buried layer formed thereon, Since the structure includes an insulating film formed thereon and an electrode that contacts the buried layer through an opening formed in the insulating film, even if a break occurs in the buried layer, the Since the cut is covered with an insulating film, there is no risk of a short circuit occurring even if an electrode is formed.
発明の実施例
第3図乃至第8図は本発明一実施例を製造する場合につ
いて解説する為の工程要所に於ける半導体発光装置の要
部切断正面図及び要部切断斜面図(第5図のみ)であり
、以下これ等の図を参照しつつ説明する。Embodiment of the Invention FIGS. 3 to 8 are a cutaway front view and a cutaway oblique view of the main part of a semiconductor light emitting device at key points in the process for explaining the case of manufacturing an embodiment of the present invention. Figures only), and will be described below with reference to these figures.
第3図参照
■ Pb−Te基板11上に例えば液相エピタキシャル
成長法を適用してp型Pb−Te−3e閉じ込め層12
を厚さ例えば10 〔μm〕程度に成長させる。Refer to FIG. 3 ■ A p-type Pb-Te-3e confinement layer 12 is formed on a Pb-Te substrate 11 by applying, for example, liquid phase epitaxial growth.
is grown to a thickness of, for example, about 10 [μm].
■ 同じく液相エピタキシャル成長法を適用してPb−
3n−Te活性層13を厚さ例えば1 〔μm〕゛程度
に成長させる。■ By applying the same liquid phase epitaxial growth method, Pb-
The 3n-Te active layer 13 is grown to a thickness of, for example, about 1 μm.
第4図及び第5図参照
■ 例えば、通常のフォト・リングラフィ技術を適用し
、活性層13及び閉じ込め層12のバターニングを行っ
てメサ状部分を形成する。See FIGS. 4 and 5. (2) For example, the active layer 13 and the confinement layer 12 are patterned to form a mesa-shaped portion by applying a normal photo-phosphorography technique.
第4図では半導体レーザの一素子分を表しであるが、実
際には第5図に見られるように1枚のウェハ上に複数案
子分のメサ状部分が形成されていて、後に個別に分離さ
れるものであることは云うまでもない。Although Fig. 4 shows one element of a semiconductor laser, in reality, as shown in Fig. 5, mesa-shaped portions for multiple screens are formed on one wafer, and are later separated individually. Needless to say, this is something that can be done.
第6図参照
■ 更に液相成長エピタキシャル成長法を適用してrl
型pb・5n−Te埋め込み層14を形成する。See Figure 6 ■ Furthermore, by applying liquid phase growth epitaxial growth method, rl
A pb-5n-Te buried layer 14 is formed.
この場合、埋め込み層14はメサ状部分の周囲には厚く
、その他の部分には薄く形成されているが、これは面方
位の関係でメサ状部分の周囲では埋め込み層を構成する
結晶の成長速度が速いがらである。In this case, the buried layer 14 is formed to be thick around the mesa-shaped part and thin in other parts, but this is due to the crystal growth rate of the buried layer around the mesa-shaped part due to the surface orientation. Although it is fast.
第7図参照
■ 例えば陽極酸化法を適用し、絶縁膜15を厚さ例え
ば1000 (人〕程度に成長させる。Refer to FIG. 7. For example, by applying an anodic oxidation method, the insulating film 15 is grown to a thickness of, for example, about 1000 (people).
■ 例えば通常のフォトリングラフィ技術を通用して絶
縁膜15のパターニングを行うことに依り開口15Aを
形成し、埋め込み層14に於ける表面の一部を露出させ
る。(2) For example, by patterning the insulating film 15 using a normal photolithography technique, an opening 15A is formed and a part of the surface of the buried layer 14 is exposed.
第8図参照
■ 例えば蒸着法を適用して金(Au)からなる電極1
6を厚さ例えば1000 (人〕程度に形成する。See Figure 8 ■ Electrode 1 made of gold (Au), for example by applying the vapor deposition method.
6 to a thickness of, for example, about 1000 (people).
■ 同様にして基板11の裏面にも例えば金からなる電
極17を厚さ例えば1ooo 〔人〕程度に形成する。(2) Similarly, an electrode 17 made of, for example, gold is formed on the back surface of the substrate 11 to a thickness of, for example, about 100 mm.
■ この後、個別の半導体レーザに分離して完成する。■ After this, it is separated into individual semiconductor lasers and completed.
前記したところから明らかなように、埋め込み層14に
切れが生じても、その切れは絶縁膜15で覆われている
から、電極工6を形成しても、その電極16が基板11
に直接的にコンタクトする虞はない。As is clear from the foregoing, even if a break occurs in the buried layer 14, the break is covered with the insulating film 15, so even if the electrode work 6 is formed, the electrode 16 will not touch the substrate 11.
There is no possibility of contacting directly.
発明の効果
本発明の半導体発光装置に於いては、少なくとも鉛・テ
ルルからなる半導体基板、該半導体基板上に形成された
メサ状の鉛・錫・テルルからなる活性層、その上に形成
された埋め込み層、その上に形成された絶縁膜、該絶縁
膜に形成された開口を介して前記埋め込み層にコンタク
トする電極を備えてなる構成を採っているので、前記埋
め込み層が前記半導体基板上の全面に広がることなく形
成されたとしても、その上には絶縁膜が存在している為
、所望部分以外の個所で電極が半導体基板に直接的にコ
ンタクトすることは皆無でなり、従って、短絡事故は発
生せず、製造歩留りは著しく向上する。Effects of the Invention In the semiconductor light emitting device of the present invention, at least a semiconductor substrate made of lead and tellurium, a mesa-shaped active layer made of lead, tin and tellurium formed on the semiconductor substrate, and a Since the structure includes a buried layer, an insulating film formed on the buried layer, and an electrode that contacts the buried layer through an opening formed in the insulating film, the buried layer is formed on the semiconductor substrate. Even if it is formed without spreading over the entire surface, since there is an insulating film on top of it, there is no possibility that the electrode will come into direct contact with the semiconductor substrate at any location other than the desired area, thus preventing short circuit accidents. This does not occur, and the manufacturing yield is significantly improved.
第1図及び第2図は従来例を製造する場合を説明する為
の工程要所に於ける半導体発光装置の要部切断正面図、
第3図乃至第8図は本発明一実施例を製造する場合を説
明する為の工程要所に於ける半導体発光装置の要部切断
正面図及び要部切断斜面図(第5図のみ)である。
図に於いて、11はPb−Te1板、12はp型Pb−
Te−3e閉じ込め層、13はpb−sn−Te活性層
、14はn型Pb−3n・”Fe埋め込み層、15は絶
縁膜、1.5Aは開口、1G及び17は電極である。
特許出願人 富士通株式会社
代理人弁理士 相 谷 昭 司
代理人弁理士 渡 邊 弘 −
第1図
第2図
ム
第3図
第4図1 and 2 are cutaway front views of essential parts of a semiconductor light emitting device at key points in the process for explaining the case of manufacturing a conventional example;
3 to 8 are a cut-away front view and a cut-away oblique view (FIG. 5 only) of the main parts of a semiconductor light emitting device at key points in the process for explaining the case of manufacturing an embodiment of the present invention. be. In the figure, 11 is a Pb-Te1 plate, 12 is a p-type Pb-
Te-3e confinement layer, 13 is a pb-sn-Te active layer, 14 is an n-type Pb-3n·Fe buried layer, 15 is an insulating film, 1.5A is an opening, 1G and 17 are electrodes. Patent application Person Fujitsu Ltd. Representative Patent Attorney Akira Aitani Representative Patent Attorney Hiroshi Watanabe - Figure 1 Figure 2 Figure 3 Figure 4
Claims (1)
板上に形成されたメサ状の鉛・錫・テルルからなる活性
層、その上に形成された埋め込み層、その上に形成され
た絶縁膜、該絶縁膜に形成された開口を介して前記埋め
込み層にコンタクトする電極を備えてなることを特徴と
する半導体発光装置。a semiconductor substrate made of at least lead and tellurium; a mesa-shaped active layer made of lead, tin and tellurium formed on the semiconductor substrate; a buried layer formed thereon; an insulating film formed thereon; A semiconductor light emitting device comprising an electrode that contacts the buried layer through an opening formed in a film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58228463A JPS60120583A (en) | 1983-12-05 | 1983-12-05 | Semiconductor light emitting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58228463A JPS60120583A (en) | 1983-12-05 | 1983-12-05 | Semiconductor light emitting device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60120583A true JPS60120583A (en) | 1985-06-28 |
Family
ID=16876874
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58228463A Pending JPS60120583A (en) | 1983-12-05 | 1983-12-05 | Semiconductor light emitting device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60120583A (en) |
-
1983
- 1983-12-05 JP JP58228463A patent/JPS60120583A/en active Pending
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