JPH08186288A - Semiconductor light-emitting element - Google Patents

Semiconductor light-emitting element

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Publication number
JPH08186288A
JPH08186288A JP33854694A JP33854694A JPH08186288A JP H08186288 A JPH08186288 A JP H08186288A JP 33854694 A JP33854694 A JP 33854694A JP 33854694 A JP33854694 A JP 33854694A JP H08186288 A JPH08186288 A JP H08186288A
Authority
JP
Japan
Prior art keywords
type
electrode
conductivity type
semiconductor layer
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33854694A
Other languages
Japanese (ja)
Inventor
Takashi Iwamoto
岩本  隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP33854694A priority Critical patent/JPH08186288A/en
Publication of JPH08186288A publication Critical patent/JPH08186288A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To provide a semiconductor light-emitting element whose thermal resistance and electrical resistance are low and whose luminous efficiency is high. CONSTITUTION: A low-carrier-concentration layer 8, a p-type clad layer 9, a p-type active layer 6 and an n-type clad layer 2 are grown on a substrate by a liquid phase method or the like. An insulating film is formed on the surface of the n-type clad layer 2, the insulating film in which a p-type electrode 4 is to be formed is etched and removed, Zn is diffused down to a part which reaches at least the active layer 6, and a p-type diffused layer 5 is formed. The substrate is removed selectively, the insulating film is removed additionally, an n-type electrode 3 is formed in the n-type clad layer 2, and the n-type electrode 4 is formed in the p-type diffused layer 5. The shape of the n-type electrode 3 and that of the p-type electrode 4 are formed to be a comb shape, teeth 3a, 4a for the comb shape are formed alternately, and only the surface of the teeth 3a for the comb shape for the n-type electrode 3 is covered with an insulating film 7. A semiconductor light-emitting element 1 is junctiondown mounted on a lead frame or the like.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、LED(発光ダイオー
ド)等の半導体発光素子に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device such as an LED (light emitting diode).

【0002】[0002]

【従来の技術】図3は一般的な従来の半導体発光素子の
一例を示す断面図である。同図(a)において、半導体
発光素子10は、活性層11がp型クラッド層12とn
型クラッド層13に挟み込まれたダブルヘテロ構造を成
し、p型クラッド層12下面にはp型電極14が、n型
クラッド層13上面にはn型電極15が形成され、p型
電極14面をリードフレーム等にマウントし、n型電極
15にワイヤーボンディング等を接続して電流を供給
し、n型クラッド層13側上面から光を取り出すもので
ある。
2. Description of the Related Art FIG. 3 is a sectional view showing an example of a general conventional semiconductor light emitting device. In FIG. 1A, in the semiconductor light emitting device 10, the active layer 11 has a p-type cladding layer 12 and
Forming a double hetero structure sandwiched between the type clad layers 13, a p-type electrode 14 is formed on the lower surface of the p-type clad layer 12, an n-type electrode 15 is formed on the upper surface of the n-type clad layer 13, and a surface of the p-type electrode 14 is formed. Is mounted on a lead frame or the like, wire bonding or the like is connected to the n-type electrode 15 to supply a current, and light is extracted from the upper surface of the n-type cladding layer 13 side.

【0003】[0003]

【発明が解決しようとする課題】ところで、LEDを高
出力で動作させるには最大動作電流を大きくする必要が
ある。LEDの最大動作電流を規定する要因はpn接合
温度Tj である。通常のLEDではTj >100℃で連
続動作させるとLEDの結晶特性が劣化するからであ
る。その対策としては、 1)熱抵抗の低減のため、pn接合部をヒートシンクに
近づけたマウント方法(ジャンクションダウン)。 2)素子の低抵抗化。 が考えられる。
By the way, in order to operate the LED at a high output, it is necessary to increase the maximum operating current. The factor that defines the maximum operating current of the LED is the pn junction temperature Tj. This is because the crystal characteristics of an ordinary LED are deteriorated when it is continuously operated at Tj> 100 ° C. The countermeasures are as follows: 1) To reduce the thermal resistance, mount the pn junction close to the heat sink (junction down). 2) Lower element resistance. Can be considered.

【0004】LEDの素子抵抗Rは、以下の式で表され
る。 R=R1 +R2 +R3 +R4 ここで、 R1 :p型電極の接触抵抗 R2 :p型層の抵抗(電極形状による電流広がり抵抗を
含む) R3 :n型層の抵抗(電極形状による電流広がり抵抗を
含む) R4 :n型電極の接触抵抗 である。通常のLEDにおいては、R2 >>R1 ,R3
,R4 であり、R2 を小さくすることが重要である。
R2 を小さくするためには、 (1)p型層の厚みを薄くする。 (2)電極の面積を大きくする。 ことが必要である。
The element resistance R of the LED is expressed by the following equation. R = R1 + R2 + R3 + R4 where R1: contact resistance of p-type electrode R2: resistance of p-type layer (including current spreading resistance due to electrode shape) R3: resistance of n-type layer (including current spreading resistance due to electrode shape) ) R4: n-type electrode contact resistance. In an ordinary LED, R2 >> R1, R3
, R4, and it is important to reduce R2.
In order to reduce R2, (1) reduce the thickness of the p-type layer. (2) Increase the area of the electrode. It is necessary.

【0005】ところが、(1)については、通常の取扱
をするためにp型層の厚みを150μm以下にすること
は実用上問題である。また、(2)については、図3
(a)に示した半導体発光素子10のような構成では、
電極径を大きくすると光が電極に遮断され光出力が低下
するので、上面の電極はワイヤーボンディングが可能な
程度の極力小さな径、例えば百数十μmの円形にしてい
るのが通例である。
With respect to (1), however, it is a practical problem to set the thickness of the p-type layer to 150 μm or less for normal handling. As for (2), FIG.
In the configuration such as the semiconductor light emitting device 10 shown in (a),
When the electrode diameter is increased, light is blocked by the electrode and the light output is reduced. Therefore, it is customary to make the electrode on the upper surface a diameter as small as possible for wire bonding, for example, a circle of hundreds of tens of μm.

【0006】そこで、n型電極側からp型電極をとるこ
とにより、実効的なp型層厚みを薄くしたものがある。
その構成について図3(b)を参照しながら説明する。
同図において、半導体発光素子16の、同図(a)の半
導体発光素子10と異なる点は、n型クラッド層13の
一部にp型不純物拡散領域16が活性層11に達するま
で形成され、その上面にp型電極14が形成されている
点である。なお、17は、不純物拡散領域16とn型層
13とを分離する分離溝17で、活性層11に達するま
での深さがある。この半導体発光素子16は、n型電極
15とp型電極14が同じ面にあり、ジャンクションダ
ウンマウントされ、p型層を流れる電流の距離(実効的
なp型層厚み)が小さくなっている。ところが、電流の
広がり抵抗は大きく、思ったほど抵抗が下がらないとい
った問題があった。
Therefore, there is one in which the p-type electrode is taken from the n-type electrode side to reduce the effective p-type layer thickness.
The configuration will be described with reference to FIG.
In the figure, the semiconductor light emitting element 16 is different from the semiconductor light emitting element 10 of FIG. 1A in that a p-type impurity diffusion region 16 is formed in a part of the n-type cladding layer 13 until reaching the active layer 11. The point is that the p-type electrode 14 is formed on the upper surface. Reference numeral 17 denotes an isolation groove 17 for isolating the impurity diffusion region 16 and the n-type layer 13, which has a depth to reach the active layer 11. This semiconductor light emitting element 16 has the n-type electrode 15 and the p-type electrode 14 on the same surface, is junction down-mounted, and has a small distance of current flowing through the p-type layer (effective p-type layer thickness). However, the current spreading resistance is large, and there is a problem that the resistance does not decrease as much as expected.

【0007】そこで、本発明は上記の点に着目してなさ
れたものであり、熱抵抗及び素子抵抗が低く発光効率の
高い半導体発光素子を提供することを目的とする。
Therefore, the present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor light emitting element having low heat resistance and element resistance and high luminous efficiency.

【0008】[0008]

【課題を解決するための手段】本発明は、上記目的を達
成する手段として、第一の導電型の半導体層上に形成さ
れた、前記第一の導電型とは逆の第二の導電型の半導体
層と、前記第一の導電型の半導体層表面に形成された第
一の導電型の電極及び第二の導電型の電極とを有し、前
記第二の導電型の半導体層側から光を出力する半導体発
光素子において、前記第一の導電型の電極及び第二の導
電型の電極は、夫々複数の隙間部を有し、一方の電極の
隙間部に他方の電極が、他方の電極の隙間部に一方の電
極が接触することなく形成されており、前記第二の導電
型の電極上に、前記第一の導電型の半導体層表面から前
記第二の導電型の半導体層に達するまで形成された前記
第二の導電型の不純物拡散領域を有することを特徴とす
る半導体発光素子を提供する。
As a means for achieving the above object, the present invention provides a second conductivity type which is formed on a semiconductor layer of a first conductivity type and which is opposite to the first conductivity type. A semiconductor layer, and a first conductivity type electrode and a second conductivity type electrode formed on the surface of the first conductivity type semiconductor layer, and from the second conductivity type semiconductor layer side. In the semiconductor light emitting device that outputs light, the first conductivity type electrode and the second conductivity type electrode each have a plurality of gaps, and the other electrode is provided in the gap of one electrode One of the electrodes is formed in the gap portion of the electrode without contact, on the electrode of the second conductivity type, from the surface of the semiconductor layer of the first conductivity type to the semiconductor layer of the second conductivity type. A semiconductor light emitting device having the second conductivity type impurity diffusion region formed until reaching To provide.

【0009】[0009]

【実施例】以下、添付図面を参照して本発明の一実施例
の半導体発光素子について説明する。図1は、本発明の
一実施例の半導体発光素子を示す図で、同図(a)は電
極面を示す図、同図(b)はAB断面の一部を示す拡大
図である。同図において、半導体発光素子1のn型クラ
ッド層2表面にn型電極3及びp型電極4が櫛形に形成
されている。p型電極4が形成されるn型クラッド層2
の表面からは不純物拡散が行われてp型に変わったp型
拡散層5が活性層6に達するまで形成されている。n型
電極3の櫛の歯3aとp型電極4の櫛の歯4aとは、接
することなく交互に形成されており、n型電極3の櫛の
歯3aのみが絶縁膜(例えばSiN)7により覆われて
いる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor light emitting device according to an embodiment of the present invention will be described below with reference to the accompanying drawings. 1A and 1B are views showing a semiconductor light emitting element according to an embodiment of the present invention, FIG. 1A is a view showing an electrode surface, and FIG. 1B is an enlarged view showing a part of an AB cross section. In the figure, an n-type electrode 3 and a p-type electrode 4 are formed in a comb shape on the surface of the n-type cladding layer 2 of the semiconductor light emitting device 1. n-type clad layer 2 on which p-type electrode 4 is formed
Impurities are diffused from the surface of the p to form the p-type diffusion layer 5 that has changed to the p-type until it reaches the active layer 6. The comb teeth 3a of the n-type electrode 3 and the comb teeth 4a of the p-type electrode 4 are alternately formed without contact with each other, and only the comb teeth 3a of the n-type electrode 3 are made of an insulating film (for example, SiN) 7 Are covered by.

【0010】次に、半導体発光素子1の製造方法につい
て説明する。まず図示しないGaAs基板上に液相法な
どで例えばキャリア濃度が10×1017cm-3以下の低
キャリア濃度GaAlAs層8(膜厚約150μm)、
p型GaAlAsクラッド層9(膜厚約10μm)、p
型GaAlAs活性層6(膜厚約1μm)、n型GaA
lAsクラッド層2(膜厚約5μm)を成長させる。
Next, a method of manufacturing the semiconductor light emitting device 1 will be described. First, a low carrier concentration GaAlAs layer 8 (having a film thickness of about 150 μm) having a carrier concentration of 10 × 10 17 cm −3 or less is formed on a GaAs substrate (not shown) by a liquid phase method or the like.
p-type GaAlAs clad layer 9 (film thickness of about 10 μm), p
-Type GaAlAs active layer 6 (film thickness: about 1 μm), n-type GaA
The 1As clad layer 2 (film thickness of about 5 μm) is grown.

【0011】続いてn型クラッド層2表面にSiN等の
絶縁膜を形成し、p型電極4を形成する部分の絶縁膜を
エッチングで除去し、少なくとも活性層6に達するまで
Zn拡散を行いp型拡散層5を形成する。
Subsequently, an insulating film of SiN or the like is formed on the surface of the n-type cladding layer 2, the insulating film in the portion where the p-type electrode 4 is formed is removed by etching, and Zn is diffused at least until the active layer 6 is reached. The mold diffusion layer 5 is formed.

【0012】次に、GaAs基板を選択的にエッチング
し、更に絶縁膜を除去した後、n型クラッド層2表面に
n型電極3を、p型拡散層5表面にp型電極4を交互で
互いに接することなく櫛形に、その櫛の歯3a,4aの
幅を約5〜10μmとして形成し、n型電極3の櫛の歯
3aを絶縁膜7で覆う。
Next, after selectively etching the GaAs substrate and removing the insulating film, the n-type electrode 3 is alternately formed on the surface of the n-type cladding layer 2 and the p-type electrode 4 is alternately formed on the surface of the p-type diffusion layer 5. The comb teeth 3a and 4a are formed in a comb shape without contacting each other with a width of about 5 to 10 μm, and the comb teeth 3a of the n-type electrode 3 are covered with the insulating film 7.

【0013】本実施例によれば、pn接合位置と電極と
の距離は約5μmと非常に接近しており、発光部で発熱
した熱を効率よく逃すことができる。また、従来のp型
電極が素子上面にあるLEDでは、素子抵抗の大部分を
占めるp型クラッド層の厚みが約150μm と非常に厚
いが、本実施例によればp型クラッド層の実効的厚み
(電流がp型クラッド層を流れる距離)は約20μmと
なり、素子抵抗を大幅に低減できる。本実施例の構造で
400μm×400μmの素子を作製したところ、素子
抵抗は約0.7Ωであった。これは従来の一般的なLE
Dの素子抵抗が約2.5Ωであったのに対して約1/4
と非常に小さくなっている。
According to this embodiment, the distance between the pn junction position and the electrode is very close to about 5 μm, and the heat generated in the light emitting portion can be efficiently dissipated. In the conventional LED having the p-type electrode on the upper surface of the device, the p-type clad layer that occupies most of the device resistance is very thick, about 150 μm. The thickness (the distance that the current flows through the p-type cladding layer) is about 20 μm, and the element resistance can be significantly reduced. When a device of 400 μm × 400 μm was manufactured with the structure of this example, the device resistance was about 0.7Ω. This is a conventional LE
About 1/4 of the device resistance of D was about 2.5Ω
And is very small.

【0014】以上のように作製された半導体発光素子
は、ジャンクションダウンマウントされる。例えば、n
型電極3側のリードフレームは、p型電極4と接するこ
となく、n型電極3が露出された部分3bでできるだけ
広範囲でIn等により接続され、p型電極4側のリード
フレームは、n型電極3及びn型電極3側のリードフレ
ームと接することなく、広範囲でp型電極4とIn等に
より接続させる。つまりp型電極4の櫛の歯4aと隣り
合うn型電極3の櫛の歯3aは絶縁膜7により絶縁され
ているので、p型電極4側のリードフレームはn型電極
3の露出された部分3bを除いて全面的に接続させれば
よい。従って、リードフレームは特に電極形状に合わせ
て複雑な形状とする必要がない。また、広範囲でリード
フレームと接続させることができるので熱を効率よく逃
すことができる。
The semiconductor light emitting device manufactured as described above is junction down mounted. For example, n
The lead frame on the side of the mold electrode 3 is connected to In as far as possible in the exposed portion 3b of the n-type electrode 3 without contacting the p-type electrode 4, and the lead frame on the side of the p-type electrode 4 is n-type. The electrode 3 and the n-type electrode 3 are connected to the p-type electrode 4 by In or the like over a wide range without coming into contact with the lead frame. That is, since the comb tooth 4a of the p-type electrode 4 and the comb tooth 3a of the n-type electrode 3 adjacent to the p-type electrode 4 are insulated by the insulating film 7, the lead frame on the p-type electrode 4 side has the n-type electrode 3 exposed. It suffices to connect the entire surface except the portion 3b. Therefore, it is not necessary for the lead frame to have a complicated shape particularly in accordance with the electrode shape. Further, since it can be connected to the lead frame over a wide range, heat can be efficiently dissipated.

【0015】なお、電極の形状はこれに限ることなく、
n型クラッド層2表面の広範囲に渡って、n型電極3及
びp型電極4が互いに隣り合う部分を広範囲に多く有す
るように構成したものであればよく、p型電極を形成す
る面のn型クラッド層は上述したように不純物拡散さ
れ、p型拡散層を形成させる。また、本実施例では、n
型電極を絶縁膜で覆ったがp型電極を覆うように構成し
てもよい。図2に他の電極形状の例を3パターン(同図
(a)〜(c))示す。同図において、3が第一の導電
型の電極、4が第二の導電型の電極で、必要に応じて2
つの電極を分離する上述したような絶縁膜が形成され
る。
The shape of the electrode is not limited to this,
It is sufficient if the n-type electrode 3 and the p-type electrode 4 are configured so as to have a large number of adjacent portions over a wide range on the surface of the n-type cladding layer 2, and the n-type electrode on the surface on which the p-type electrode is formed is formed. The type clad layer is impurity-diffused as described above to form a p-type diffusion layer. Further, in this embodiment, n
Although the mold electrode is covered with the insulating film, the p-type electrode may be covered. FIG. 2 shows examples of other electrode shapes in three patterns ((a) to (c) in the figure). In the figure, 3 is a first conductivity type electrode, 4 is a second conductivity type electrode, and if necessary, 2
An insulating film as described above that separates the two electrodes is formed.

【0016】また、必要に応じてp型拡散層5とn型ク
ラッド層2との境界にn型クラッド層2表面からp型層
に達するまでの分離溝を形成してもよい。例えば、クラ
ッド層と活性層とのバンドギャップ差が小さい場合に形
成して、活性層を通ることなくp型クラッド層からn型
クラッド層へ直接、電流が流れてしまうのを防ぐ。
If necessary, a separation groove from the surface of the n-type cladding layer 2 to the p-type layer may be formed at the boundary between the p-type diffusion layer 5 and the n-type cladding layer 2. For example, it is formed when the band gap difference between the clad layer and the active layer is small to prevent a current from flowing directly from the p-type clad layer to the n-type clad layer without passing through the active layer.

【0017】本実施例では、GaAlAsダブルヘテロ
構造のLEDを例にとって説明したが、一般的なホモ構
造やシングルヘテロ構造でも同様であり、材料もGaA
lAsに特定されない。
In this embodiment, an LED having a GaAlAs double hetero structure has been described as an example, but the same applies to a general homo structure or a single hetero structure, and the material is GaA.
Not specific to lAs.

【0018】[0018]

【発明の効果】以上説明したように、本発明の発光素子
によれば、以下の効果が得られる。pn接合位置は電極
に非常に接近した構造とすることができ、更に、p型電
極とn型電極とが同じ面の広範囲に形成された電極形状
により、発光部で発熱した熱を効率よく逃すことができ
るので、熱抵抗が非常に小さい。また、素子抵抗に影響
が大きいp型クラッド層の実効的厚みを非常に薄くする
ことができ、素子抵抗を大幅に低減できる。また、p型
電極とn型電極とが同じ面に形成され、更に、絶縁膜に
より一方の電極の一部が絶縁されているので、ジャンク
ションダウンのマウントが容易に可能で、マウントする
リードフレームの形状も電極形状と特に精度よく一致さ
せる必要がなく広範囲で電極と接続でき、熱を効率よく
逃すことができる。更に、低キャリア濃度の半導体層を
有し、この上面から光を取り出すのでフリーキャリア吸
収による光の吸収が少なく、また上面に電極がないので
光が遮断されることもなく、光の取り出し効率が高い。
As described above, according to the light emitting device of the present invention, the following effects can be obtained. The pn junction position can be configured to be very close to the electrode, and the heat generated in the light emitting portion can be efficiently dissipated due to the electrode shape in which the p-type electrode and the n-type electrode are widely formed on the same surface. Therefore, the thermal resistance is very small. Further, the effective thickness of the p-type cladding layer, which greatly affects the element resistance, can be made extremely thin, and the element resistance can be greatly reduced. Further, since the p-type electrode and the n-type electrode are formed on the same surface and a part of one of the electrodes is insulated by the insulating film, it is possible to easily mount the junction down and to mount the lead frame. The shape does not need to match the shape of the electrode particularly precisely, and the electrode can be connected in a wide range, and heat can be efficiently released. Furthermore, since the semiconductor layer has a low carrier concentration and light is extracted from the upper surface, light absorption due to free carrier absorption is small, and since there is no electrode on the upper surface, light is not blocked and light extraction efficiency is improved. high.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の半導体発光素子を示す図で
ある。
FIG. 1 is a diagram showing a semiconductor light emitting device according to an embodiment of the present invention.

【図2】本発明の他の実施例の半導体発光素子の電極形
状を示す図である。
FIG. 2 is a diagram showing an electrode shape of a semiconductor light emitting device according to another embodiment of the present invention.

【図3】従来の半導体発光素子の一例を示す断面図であ
る。
FIG. 3 is a sectional view showing an example of a conventional semiconductor light emitting device.

【符号の説明】[Explanation of symbols]

1 半導体発光素子 2 n型GaAlAsクラッド層(n型クラッド層) 3 n型電極 4 p型電極 5 p型拡散層 6 p型GaAlAs活性層(活性層) 7 絶縁膜 8 低キャリア濃度GaAlAs層(低キャリア濃度
層) 9 p型GaAlAsクラッド層(p型クラッド層)
DESCRIPTION OF SYMBOLS 1 Semiconductor light emitting element 2 n-type GaAlAs clad layer (n-type clad layer) 3 n-type electrode 4 p-type electrode 5 p-type diffusion layer 6 p-type GaAlAs active layer (active layer) 7 insulating film 8 low carrier concentration GaAlAs layer (low) Carrier concentration layer) 9 p-type GaAlAs clad layer (p-type clad layer)

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】第一の導電型の半導体層上に形成された、
前記第一の導電型とは逆の第二の導電型の半導体層と、 前記第一の導電型の半導体層表面に形成された第一の導
電型の電極及び第二の導電型の電極とを有し、前記第二
の導電型の半導体層側から光を出力する半導体発光素子
において、 前記第一の導電型の電極及び第二の導電型の電極は、夫
々複数の隙間部を有し、一方の電極の隙間部に他方の電
極が、他方の電極の隙間部に一方の電極が接触すること
なく形成されており、 前記第二の導電型の電極上に、前記第一の導電型の半導
体層表面から前記第二の導電型の半導体層に達するまで
形成された前記第二の導電型の不純物拡散領域を有する
ことを特徴とする半導体発光素子。
1. A semiconductor device formed on a semiconductor layer of a first conductivity type,
A semiconductor layer of a second conductivity type opposite to the first conductivity type; an electrode of a first conductivity type and an electrode of a second conductivity type formed on the surface of the semiconductor layer of the first conductivity type; In the semiconductor light emitting device that outputs light from the second conductive type semiconductor layer side, the first conductive type electrode and the second conductive type electrode each have a plurality of gaps. , The other electrode is formed in the gap portion of the one electrode without contacting the one electrode in the gap portion of the other electrode, and the first conductivity type is formed on the electrode of the second conductivity type. 2. The semiconductor light emitting device having the impurity region of the second conductivity type formed from the surface of the semiconductor layer to the semiconductor layer of the second conductivity type.
【請求項2】第一の導電型の半導体層上に形成された、
前記第一の導電型とは逆の第二の導電型の半導体層と、 前記第一の導電型の半導体層表面に形成された第一の導
電型の電極及び第二の導電型の電極とを有し、前記第二
の導電型の半導体層側から光を出力する半導体発光素子
において、 前記第一の導電型の電極と第二の導電型の電極とが、互
いに隣り合って複数形成されており、 前記第二の導電型の電極上に、前記第一の導電型の半導
体層表面から前記第二の導電型の半導体層に達するまで
形成された前記第二の導電型の不純物拡散領域を有する
ことを特徴とする半導体発光素子。
2. A semiconductor layer of a first conductivity type formed on the semiconductor layer,
A semiconductor layer of a second conductivity type opposite to the first conductivity type; an electrode of a first conductivity type and an electrode of a second conductivity type formed on the surface of the semiconductor layer of the first conductivity type; In the semiconductor light-emitting element having the second conductivity type semiconductor layer side and outputting light, a plurality of the first conductivity type electrodes and the second conductivity type electrodes are formed adjacent to each other. The second conductivity type impurity diffusion region formed on the second conductivity type electrode from the surface of the first conductivity type semiconductor layer to the semiconductor layer of the second conductivity type. A semiconductor light-emitting device comprising:
【請求項3】前記第一の導電型及び第二の導電型の電極
が櫛形を成し、導電型の異なる夫々の電極の櫛の歯が交
互に複数形成されていることを特徴とする請求項1又は
2に記載の半導体発光素子。
3. The first-conductivity-type and second-conductivity-type electrodes have a comb shape, and a plurality of comb teeth of the electrodes having different conductivity types are alternately formed. Item 3. The semiconductor light emitting device according to item 1 or 2.
【請求項4】前記第一の導電型の電極又は第二の導電型
の電極のどちらか一方の表面一部が絶縁膜で覆われてい
ることを特徴とする請求項1〜請求項3の内いずれか1
項に記載の半導体発光素子。
4. A part of the surface of either the first conductivity type electrode or the second conductivity type electrode is covered with an insulating film. One of
A semiconductor light-emitting device according to item.
【請求項5】前記第二の導電型の半導体層側に低キャリ
ア濃度の半導体層を有することを特徴とする請求項1〜
請求項4の内いずれか1項に記載の半導体発光素子。
5. A semiconductor layer having a low carrier concentration is provided on the side of the second conductivity type semiconductor layer.
The semiconductor light emitting element according to claim 4.
JP33854694A 1994-12-27 1994-12-27 Semiconductor light-emitting element Pending JPH08186288A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33854694A JPH08186288A (en) 1994-12-27 1994-12-27 Semiconductor light-emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33854694A JPH08186288A (en) 1994-12-27 1994-12-27 Semiconductor light-emitting element

Publications (1)

Publication Number Publication Date
JPH08186288A true JPH08186288A (en) 1996-07-16

Family

ID=18319190

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33854694A Pending JPH08186288A (en) 1994-12-27 1994-12-27 Semiconductor light-emitting element

Country Status (1)

Country Link
JP (1) JPH08186288A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001237458A (en) * 1999-12-22 2001-08-31 Lumileds Lighting Us Llc Manufacturing method for iii-nitride led with enhanced light generating capability
JP2009076684A (en) * 2007-09-20 2009-04-09 Harison Toshiba Lighting Corp Light emitting device and lamp fitting

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001237458A (en) * 1999-12-22 2001-08-31 Lumileds Lighting Us Llc Manufacturing method for iii-nitride led with enhanced light generating capability
JP2012060182A (en) * 1999-12-22 2012-03-22 Philips Lumileds Lightng Co Llc Method of manufacturing group iii-nitride led with increased light generating capability
JP2009076684A (en) * 2007-09-20 2009-04-09 Harison Toshiba Lighting Corp Light emitting device and lamp fitting

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