JPH0613654A - Semiconductor light emitting element and its manufacture - Google Patents

Abstract

PURPOSE:To prevent solder from attaching by moving a p-n junction part exposed in a mesa etching side surface of a GaP light emitting diode. CONSTITUTION:A wafer is prepared by forming an n-type first semiconductor region 11 and a p-type second semiconductor region 12 on an n-type semiconductor substrate 10 by an epitaxial growth method. A groove is formed along a division predetermined region of a surface at the side of the second semiconductor region 12 of the wafer. Then, p-type impurities are diffused to include the groove. After an anode electrode 18 and a cathode electrode 19 are formed, a light emitting diode is acquired by cutting by the groove. It is then adhered to a metal substrate 20 by solder 21 with the anode electrode 18 down.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device such as a GaP light emitting diode and a method for manufacturing the same.

[0002]

2. Description of the Related Art A conventional green LED chip is shown in FIG.
As shown in FIG. 3, a substrate (substrate) 1 of n-type gallium phosphide (GaP), an n-type GaP region 2 and a p-type GaP region 3 sequentially stacked thereon by a known liquid phase epitaxial method, and It is composed of electrodes 4 and 5. GaP
Has a bandgap (forbidden band width) Eg of 2.24 eV and an emission wavelength λ of about 555 nm, but it is an indirect transition type, so that the emission efficiency is not so high. Therefore, in general, in addition to the impurities (n-type tellurium and p-type zinc) that determine the conductivity type of the semiconductor region above the n-type GaP region 2, that is, near the pn junction 6 and the p-type GaP region 3. Doping with nitrogen (N), which serves as an isoelectronic trap. As a result, the emission wavelength is slightly larger (about 5
65 nm), but the luminous efficiency can be increased.

[0003]

By the way, this type of G
In the aP light-emitting diode chip, it may be desired to mount the n-type substrate 1 side, that is, the region side where the cathode electrode is provided, as the upper surface in relation to another circuit element. For this purpose, as shown in FIG. 2, when the anode electrode 6 provided in the p-type GaP region 3 is connected to the metal mounting base 7 with the solder 8, the p-type GaP region 3 is thin, so that the solder 8 is pn-bonded. 6, the pn junction 6 may be short-circuited. Therefore, it is conceivable to form the p-type GaP region 3 thick as shown in FIG. However, this p-type GaP region 3
Is doped with nitrogen (N) in addition to zinc (Zn) as a conductivity determining impurity, the pn junction 6 of the p-type region 3 is doped.
The portion apart from acts as a region (absorption edge) that absorbs light generated due to recombination of carriers in the vicinity of the pn junction 6, and reduces the light emission efficiency. As a means for solving this, it is conceivable that the part of the p-type GaP region 3 away from the pn junction is not doped with nitrogen. However, in this case, a lattice defect occurs in the region not doped with nitrogen, and as a result, the luminous efficiency is increased. Can't get too big.

Therefore, it is an object of the present invention to provide a semiconductor light emitting device and a manufacturing method thereof in which an exposed portion of a pn junction can be separated from a mounting surface of a semiconductor chip.

[0005]

The present invention for achieving the above object comprises a first compound semiconductor of the first conductivity type.
A semiconductor region of a second conductivity type, the second semiconductor region having a thickness smaller than that of the first semiconductor region and arranged adjacent to the first semiconductor region. A third semiconductor region made of a compound semiconductor of a second conductivity type formed so as to cover a peripheral edge of a pn junction between the first semiconductor region and the second semiconductor region,
An exposed portion of a pn junction between the third semiconductor region and the first semiconductor region is located on a side surface of a semiconductor chip including the first, second and third semiconductor regions, and The distance between the exposed portion of the pn junction and the surface of the second semiconductor region is larger than the distance between the pn junction between the first and second semiconductor regions and the surface of the second semiconductor region. The present invention relates to a semiconductor light emitting device. The first semiconductor region of the present invention corresponds to the first semiconductor region 11 of the embodiment or the combination of the first semiconductor region 11 and the substrate 10. An invention of a method for achieving the above object is to provide a first semiconductor region of GaP of the first conductivity type and a second semiconductor region of GaP of the second conductivity type on a GaP semiconductor substrate of the first conductivity type. Semiconductor regions are sequentially formed, at least the second semiconductor region is doped with nitrogen, and the second semiconductor region has a total thickness of the semiconductor substrate and the first semiconductor region. A step of preparing a wafer formed to be thinner than that, and etching deeper than a pn junction between the first semiconductor region and the second semiconductor region from the second semiconductor region side of the wafer. Forming a groove in a region to be divided, and forming a third semiconductor region of a second conductivity type by diffusing a second conductivity type impurity into a region of the wafer where the groove is formed. ,
The present invention relates to a method for manufacturing a GaP semiconductor light emitting device, the method including the step of cutting the wafer along the groove.

[0006]

FUNCTION AND EFFECT The third semiconductor region in the present invention is p
It has a function of keeping the exposed portion of the n-junction away from the second semiconductor region. As a result, when the second semiconductor region side is fixed to the mounting substrate with a conductive adhesive such as solder, it becomes difficult for the conductive adhesive to adhere to the pn junction. If a groove is formed in accordance with the method invention and a third semiconductor region is provided therein, p
The movement of the exposed portion of the n-junction can be easily achieved.

[0007]

Next, a green GaP light emitting device, that is, a green light emitting diode (LED) and a method of manufacturing the same according to an embodiment of the present invention will be described with reference to FIGS.

First, as shown in FIG. 4, an n-type GaP (gallium-phosphorus) semiconductor substrate (hereinafter referred to as an n-type substrate) 1
A semiconductor in which a first semiconductor region 11 made of an n-type GaP semiconductor region is formed on the substrate 0 by a liquid phase epitaxial growth method, and a second semiconductor region 12 made of a p-type GaP semiconductor region is formed thereon by an epitaxial growth method. Wafer 13
To prepare. The first semiconductor region 11 forming the pn junction 14 is doped with nitrogen in addition to Te (tellurium) as a conductivity type determining impurity, and the second semiconductor region 12 is doped with Zn ( Nitrogen is doped in addition to (zinc). In addition, the first and second semiconductor regions 1
The thicknesses of 1 and 12 are significantly smaller than the thickness of the substrate 10.

Then, as shown in FIG. 5, the surface of the wafer 13 on the p-type second semiconductor region 12 side is selectively etched to form a mesa-type etching groove 15 having a depth of about 80 μm.
To form. The groove 15 is provided so that the wafer 13 is aligned with the boundary region (division region) of the plurality of diode chip regions 13a, 13b, 13c. Therefore, each diode chip region 13a, 13b, 13c is an island-shaped region separated by the groove 15. The depth of the groove 15 is deeper than the second semiconductor region 12 and reaches the vicinity of the substrate 10. That is, the groove 15 is formed so as to cross the pn junction 14, and the substrate 10 allows each diode chip region 1 to be formed.
It is formed as deep as possible within the range in which the connection of 3a, 13b, and 13c can be maintained. It should be noted that the etching was performed in two steps in order to prevent the width of the groove 15 from increasing due to the lateral etching.

Next, the wafer 13 in which the groove 15 is formed is placed in a diffusion furnace, and Zn ₃ P ₂ is added in an amount of 0.1 to 0.45 mg / cc and P ₂
Is introduced in a small amount as compared with Zn ₃ P ₂ , and 600 to 800 ° C.
Diffusion processing is performed for 10 to 100 hours to form the third semiconductor region 16 made of the p + -type GaP semiconductor region shown in FIG. By any amount introduce P ₂ in addition to Zn ₃ P ₂ in the diffusion step, the phosphorus from the wafer 13 (P)
The out diffusion of is suppressed. The third semiconductor region 16 is formed so as to cover the pn junction of the first and second semiconductor regions 11 and 12 exposed in the groove 15 in FIG. 5, and the third semiconductor region 16 and the first semiconductor region 16 are formed. 1
A new pn junction 17 is formed between the substrate 1 and the substrate 10. When Zn is diffused without masking the main surface of the wafer 13 on the substrate 10 side, Zn is also diffused in the substrate 10. At this time, the inversion layer is removed by polishing or etching.

Next, as shown in FIG. 7, an anode electrode 18 is formed on the third semiconductor region 16 on one main surface of the wafer 13, and a cathode electrode 19 is formed on the substrate 10 on the other main surface by a well-known vacuum deposition method. After the formation by the method, the wafer 13 is cut along the line L shown in the groove 15 to obtain individual light emitting diode chips.

The light emitting diode chip thus formed is fixed to the conductive mounting base 20 made of a metal base, substrate or layer with solder (conductive adhesive) 21 as shown in FIG. That is, the anode electrode 18 is fixed to the mounting substrate 20. When the anode electrode 18 is on the lower side, the light emitting element is arranged in the reverse mesa arrangement, and the solder 21 is attached also to the inclined side surface 22 based on the groove 15 of the mesa type etching. However, since the p-type third semiconductor region 16 is provided, the pn junction 14 between the first and second semiconductor regions 11 and 12 has the inclined side surface 22.
Pn junction 1 based on the third semiconductor region 16 without being exposed to
The exposed portion of 7 is located higher than the pn junction 14 with respect to the mounting base 20, and the solder 2 is placed above the height of the pn junction 14.
Even if 1 is raised, the pn junction is not short-circuited.

Since the thickness of the p-type second semiconductor region 12 of the light emitting device of this embodiment is smaller than that of the structure shown in FIG. 3, the light emitting efficiency does not decrease due to the absorption edge effect that occurs in the structure of FIG. . Therefore, it is possible to obtain a relatively large brightness, despite the configuration in which the anode electrode 18 is on the lower side. Further, the chip divided along the line L in FIG. 7 is not limited to the inverted mesa arrangement in FIG. 8 and can be arranged with the anode electrode 18 on the upper side. That is, since the exposed portion of the pn junction 16 is located substantially in the middle of the side surface of the chip, it does not matter whether the anode electrode 18 or the cathode electrode 19 is on the lower side.

[0014]

Another Embodiment Next, a light emitting device according to another embodiment will be described with reference to FIG. However, in FIG. 9, the same parts as those in FIG. 8 are designated by the same reference numerals, and the description thereof will be omitted.
In this embodiment, the cathode electrode 19 is formed in a ring shape along the peripheral edge of the surface of the n-type substrate 10.
The substrate 10 is exposed to the inside of the window 10 and the window region 10a is formed. One corner of the cathode electrode 19 is a wide lead connection region.

On the other hand, the anode electrode 18 is in contact with the central portion of the second semiconductor region 12 so as to be included in the window region 10a when seen transparently from above the chip. Figure 9
In the light emitting diode of, the third semiconductor region 16 is formed by selective diffusion in the portion corresponding to the inclined side surface 22, and is not formed on the lower surface side of the second semiconductor region 12. An insulating film 23 is formed on the inclined side surface 22 and the lower surface of the second semiconductor region 12. As shown in FIG. 11, an opening 23a is formed in the insulating film 23 at a portion corresponding to the center side region of the lower surface of the second semiconductor region 12. The anode electrode 18 has an opening 23a in the insulating film 23.
Is also connected to the second semiconductor region 12 through and is also formed on the insulating film 23. Since the anode electrode 18 is formed in a large area on the lower surface side of the chip, the mounting substrate 2
Bonding of the solder 21 to 0 becomes strong.

In the light emitting diode of FIG. 9, the third semiconductor region 16 is separated from the anode electrode 18 to prevent channel current from flowing. Further, in the light emitting diode of FIG. 9, as is clear from the current path indicated by the dotted line in the figure, a forward current flows over a wide area of the pn junction 14, and carrier recombination contributing to light emission can be abundantly generated. In particular, since the current flows concentratedly on the center side of the pn junction 14, the amount of light emission due to carrier recombination is large. In the light emitting diode of FIG. 9, this pn junction 1
Since the window region 10a is formed above the center side region of 4, the light can be effectively extracted to the outside of the chip.

Differences between the light emitting diode of FIG. 8 and the light emitting diode of FIG. 9 will be described in more detail below. In the light emitting diode shown in FIG. 8, the anode electrode 18 and the cathode electrode 1
When a voltage for increasing the potential on the anode electrode 18 side is applied between the anode electrode 9 and the anode 9, a forward current flows from the anode electrode 18 toward the cathode electrode 19. This forward current is mainly the first current passing through the second semiconductor region 12 via the pn junction.
Current and a second current passing through the third semiconductor region via the pn junction 17. Here, the second current is a leak current that causes a problem in the voltage-current characteristics of the light emitting diode, and the carrier recombination generated based on the second current is the first one.
Does not contribute to light emission as compared with carrier recombination that occurs based on the electric current. Therefore, it is desirable that the second current does not flow as much as possible. According to the light emitting diode of FIG. 9, the second current is prevented. Of course, the light emitting diode of FIG.
As with the light emitting diode of FIG. 8, it is possible to prevent the solder 21 from adhering to the pn junction.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a conventional light emitting device.

FIG. 2 is a cross-sectional view showing a state in which a conventional light emitting device has an anode attached to a lower side.

FIG. 3 is a cross-sectional view showing a conventional light emitting device having a thick p-type region.

FIG. 4 is a cross-sectional view showing a wafer for manufacturing a green GaP light emitting device according to an embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a state where a groove is formed on a wafer.

FIG. 6 is a cross-sectional view showing a wafer on which a third semiconductor region is formed.

FIG. 7 is a cross-sectional view showing a wafer on which electrodes are formed.

FIG. 8 is a cross-sectional view showing a state in which the light emitting device according to the example is connected to the mounting base with the anode electrode facing downward.

FIG. 9 is a central longitudinal sectional view of a light emitting diode according to another embodiment.

10 is a plan view of the light emitting diode of FIG.

FIG. 11 is a bottom view showing a state in which the anode electrode of the light emitting diode of FIG. 9 is removed.

[Explanation of symbols]

 11 First Semiconductor Region 12 Second Semiconductor Region 16 Third Semiconductor Region 21 Solder

Claims (2)

[Claims] 1. A first semiconductor region made of a compound semiconductor of a first conductivity type, and a first semiconductor region having a thickness smaller than that of the first semiconductor region.
A second semiconductor region formed of a compound semiconductor region of a second conductivity type disposed adjacent to the semiconductor region, and a peripheral edge of a pn junction between the first semiconductor region and the second semiconductor region. A third semiconductor region made of a compound semiconductor of the second conductivity type formed in the first semiconductor region, and a pn between the third semiconductor region and the first semiconductor region.
The exposed portion of the junction is located on the side surface of the semiconductor chip formed including the first, second and third semiconductor regions, and the distance between the exposed portion of the pn junction and the surface of the second semiconductor region. Is larger than the distance between the pn junction between the first and second semiconductor regions and the surface of the second semiconductor region. 2. A first semiconductor region made of GaP of the first conductivity type and a second semiconductor region made of GaP of the second conductivity type are sequentially formed on a GaP semiconductor substrate of the first conductivity type. And at least the second semiconductor region is doped with nitrogen, and the second semiconductor region is formed to be thinner than the total thickness of the semiconductor substrate and the first semiconductor region. A step of preparing a wafer, and etching is performed deeper than a pn junction between the first semiconductor region and the second semiconductor region from the second semiconductor region side of the wafer to form a groove in a region to be divided. And diffusing impurities of the second conductivity type into a region of the wafer in which the groove is formed to form a third semiconductor region of the second conductivity type. Ga having a step of cutting Method for manufacturing P semiconductor light emitting device.