JPS5999440U - 半導体フレ−ム押え部材 - Google Patents

半導体フレ−ム押え部材

Info

Publication number
JPS5999440U
JPS5999440U JP19928482U JP19928482U JPS5999440U JP S5999440 U JPS5999440 U JP S5999440U JP 19928482 U JP19928482 U JP 19928482U JP 19928482 U JP19928482 U JP 19928482U JP S5999440 U JPS5999440 U JP S5999440U
Authority
JP
Japan
Prior art keywords
holding member
semiconductor
frame holding
inner lead
semiconductor frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19928482U
Other languages
English (en)
Japanese (ja)
Other versions
JPH019159Y2 (enrdf_load_stackoverflow
Inventor
別部 政司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP19928482U priority Critical patent/JPS5999440U/ja
Publication of JPS5999440U publication Critical patent/JPS5999440U/ja
Application granted granted Critical
Publication of JPH019159Y2 publication Critical patent/JPH019159Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Wire Bonding (AREA)
JP19928482U 1982-12-23 1982-12-23 半導体フレ−ム押え部材 Granted JPS5999440U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19928482U JPS5999440U (ja) 1982-12-23 1982-12-23 半導体フレ−ム押え部材

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19928482U JPS5999440U (ja) 1982-12-23 1982-12-23 半導体フレ−ム押え部材

Publications (2)

Publication Number Publication Date
JPS5999440U true JPS5999440U (ja) 1984-07-05
JPH019159Y2 JPH019159Y2 (enrdf_load_stackoverflow) 1989-03-13

Family

ID=30424825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19928482U Granted JPS5999440U (ja) 1982-12-23 1982-12-23 半導体フレ−ム押え部材

Country Status (1)

Country Link
JP (1) JPS5999440U (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH019159Y2 (enrdf_load_stackoverflow) 1989-03-13

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