JPS59146963U - リ−ドフレ−ム - Google Patents

リ−ドフレ−ム

Info

Publication number
JPS59146963U
JPS59146963U JP4110683U JP4110683U JPS59146963U JP S59146963 U JPS59146963 U JP S59146963U JP 4110683 U JP4110683 U JP 4110683U JP 4110683 U JP4110683 U JP 4110683U JP S59146963 U JPS59146963 U JP S59146963U
Authority
JP
Japan
Prior art keywords
lead frame
microns
abstract
several
rough surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4110683U
Other languages
English (en)
Inventor
土岐　荘太郎
野口　文信
武夫 藤井
Original Assignee
凸版印刷株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 凸版印刷株式会社 filed Critical 凸版印刷株式会社
Priority to JP4110683U priority Critical patent/JPS59146963U/ja
Publication of JPS59146963U publication Critical patent/JPS59146963U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features

Landscapes

  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は、本考案のリードフレームの一実施例を示す部
分拡大斜視図である。 １・・・・・・リードフレーム、２・・・・・・粗面（
アイランド部）、３・・・・・・インナーリード、４・
・間貴金属めっき部。

Claims (1)

    【実用新案登録請求の範囲】
  1. アイランド部分が数μ〜数１００μの凹凸深度を有する
    粗面でありインナーリード先端部にのみ貴金属めっきを
    施してなるリードフレーム。
JP4110683U 1983-03-22 1983-03-22 リ−ドフレ−ム Pending JPS59146963U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4110683U JPS59146963U (ja) 1983-03-22 1983-03-22 リ−ドフレ−ム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4110683U JPS59146963U (ja) 1983-03-22 1983-03-22 リ−ドフレ−ム

Publications (1)

Publication Number Publication Date
JPS59146963U true JPS59146963U (ja) 1984-10-01

Family

ID=30171704

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4110683U Pending JPS59146963U (ja) 1983-03-22 1983-03-22 リ−ドフレ−ム

Country Status (1)

Country Link
JP (1) JPS59146963U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63110034U (ja) * 1987-01-09 1988-07-15
JPS63249341A (ja) * 1987-04-06 1988-10-17 Tomoegawa Paper Co Ltd 半導体装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5029415U (ja) * 1973-07-10 1975-04-03
JPS5625391B2 (ja) * 1973-01-26 1981-06-11

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5625391B2 (ja) * 1973-01-26 1981-06-11
JPS5029415U (ja) * 1973-07-10 1975-04-03

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63110034U (ja) * 1987-01-09 1988-07-15
JPS63249341A (ja) * 1987-04-06 1988-10-17 Tomoegawa Paper Co Ltd 半導体装置

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