JPS5992537A - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS5992537A JPS5992537A JP57201953A JP20195382A JPS5992537A JP S5992537 A JPS5992537 A JP S5992537A JP 57201953 A JP57201953 A JP 57201953A JP 20195382 A JP20195382 A JP 20195382A JP S5992537 A JPS5992537 A JP S5992537A
- Authority
- JP
- Japan
- Prior art keywords
- film
- electrode
- copper
- aluminum
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
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- H01L2224/05124—Aluminium [Al] as principal constituent
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- H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
【発明の詳細な説明】
本発明は、半導体装置の電極(ポンディングパッド)に
関する。
関する。
半導体装置の電極は、一般に第1図の如く、シリコン基
板11上にSin、膜12を介して設けられたアルミニ
ウム又は、その合金14からなっている。しかしアルミ
ニウムは、耐食性におとり、レジンモールドされた装置
では、アルミニウム電極の腐食が大きな問題となってい
る。これを防止するためには、電極を耐食性ある金属で
形成することが考えられる。その−例として、ベル研究
所のビームリード法、これを改良したRCA社のトライ
メタル電極(第2図参照:A形14−Pt15−Au1
6の三層構造)が知られている。しかし、これらはいず
れも工程が複雑で材料費も多くかかるために、一般には
あまり普及していない。
板11上にSin、膜12を介して設けられたアルミニ
ウム又は、その合金14からなっている。しかしアルミ
ニウムは、耐食性におとり、レジンモールドされた装置
では、アルミニウム電極の腐食が大きな問題となってい
る。これを防止するためには、電極を耐食性ある金属で
形成することが考えられる。その−例として、ベル研究
所のビームリード法、これを改良したRCA社のトライ
メタル電極(第2図参照:A形14−Pt15−Au1
6の三層構造)が知られている。しかし、これらはいず
れも工程が複雑で材料費も多くかかるために、一般には
あまり普及していない。
本発明は、安価で耐食性の良い電極を有する半導体装置
を提供することを目的とする。本発明によれば、電極金
属の保護膜の主材料として安価な銅等を用い、この金属
が酸化してボンディング性の劣化することを防ぐために
、薄い金等の貴金属膜を表面に形成している。
を提供することを目的とする。本発明によれば、電極金
属の保護膜の主材料として安価な銅等を用い、この金属
が酸化してボンディング性の劣化することを防ぐために
、薄い金等の貴金属膜を表面に形成している。
シリコン基板11上にシリコン酸化膜(Sin。
膜)12を介して、アルミニウム又はアルミニウム合金
14の電極が形成されている。この上に形成された保護
膜13上に、真空蒸着、スパッタ法により形成された第
1層としてのチタン膜25、第2層としての銅膜26が
ある。さらにこの上に化学メッキにより形成された第3
層としての金膜27がある。電極部以外のチタン膜25
.銅膜26゜金膜27はホトエツチングにより除去する
。このように形成された電極は、下層として比較的軟質
のアルミニウム層、@層があるためボンディングの荷重
によるクラック発生が防止できる。また、最上層が酸化
しにくい貴金属層なので、金線等とのボンディング性が
よい。又、腐食しやすいアルミニウム層が、耐食性が大
きい金属でおおわれているため腐食にも強い。一方、加
工費も、材料費が少なく、工程も若干増えるだけである
ので、さほど上らない。
14の電極が形成されている。この上に形成された保護
膜13上に、真空蒸着、スパッタ法により形成された第
1層としてのチタン膜25、第2層としての銅膜26が
ある。さらにこの上に化学メッキにより形成された第3
層としての金膜27がある。電極部以外のチタン膜25
.銅膜26゜金膜27はホトエツチングにより除去する
。このように形成された電極は、下層として比較的軟質
のアルミニウム層、@層があるためボンディングの荷重
によるクラック発生が防止できる。また、最上層が酸化
しにくい貴金属層なので、金線等とのボンディング性が
よい。又、腐食しやすいアルミニウム層が、耐食性が大
きい金属でおおわれているため腐食にも強い。一方、加
工費も、材料費が少なく、工程も若干増えるだけである
ので、さほど上らない。
これまでチタン、@、金の組合せについて説明したが、
第1層の金属は、アルミニウムと第2層の保腹膜との接
着層であり、チタンの他クロム。
第1層の金属は、アルミニウムと第2層の保腹膜との接
着層であり、チタンの他クロム。
タングステン、モリブデン等のアルミニウムと反応性の
少ない金属を使用することも出来る。第2層の金属は、
第1層金属を通してアルミニウムと反応しにく(かつ比
較的耐食性のよい金属として、銅の他に鉄、ニッケル等
を使用することが可能である。第3層の金属は、第2層
金属の酸化を防ぎ、ボンディング性を保持、向上させる
目的のものであり、金の他銀、パラジウム等も用いるこ
とができる〇
少ない金属を使用することも出来る。第2層の金属は、
第1層金属を通してアルミニウムと反応しにく(かつ比
較的耐食性のよい金属として、銅の他に鉄、ニッケル等
を使用することが可能である。第3層の金属は、第2層
金属の酸化を防ぎ、ボンディング性を保持、向上させる
目的のものであり、金の他銀、パラジウム等も用いるこ
とができる〇
第1図はアルミニウム又はアルミニウム合金により形成
された電極、 第2図はトライメタル電極、 第3図は本発明の実施例の電極を示す。 尚、図面に使用している符号は、 11・・・シリコン基板、12・・・シリコン酸化膜、
13・・・表面保護膜、14・・・アルミニウム又はア
ルミニウム合金パッド、25・・・第1層保護膜、26
・・・第2層保護膜、27・・・第3層保護膜である。 =17
された電極、 第2図はトライメタル電極、 第3図は本発明の実施例の電極を示す。 尚、図面に使用している符号は、 11・・・シリコン基板、12・・・シリコン酸化膜、
13・・・表面保護膜、14・・・アルミニウム又はア
ルミニウム合金パッド、25・・・第1層保護膜、26
・・・第2層保護膜、27・・・第3層保護膜である。 =17
Claims (1)
- 【特許請求の範囲】 1、アルミニウム又はその合金膜と、その上のこれと反
応性の少ない第1の金属膜と、その上の銅。 鉄、ニッケル又はこれ等の合金より選んだ第2の金属膜
と、さらにその上の貴金属膜とからなる電極を有するこ
とを特徴とする半導体装置。 2、前記第1層の金属としてチタン、クロム又はその合
金、前記第21金属として銅、前記第3層の金属として
金又は銀を夫々用いたことを特徴とする特許請求の範囲
第1項記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57201953A JPS5992537A (ja) | 1982-11-19 | 1982-11-19 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57201953A JPS5992537A (ja) | 1982-11-19 | 1982-11-19 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5992537A true JPS5992537A (ja) | 1984-05-28 |
Family
ID=16449505
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57201953A Pending JPS5992537A (ja) | 1982-11-19 | 1982-11-19 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5992537A (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4953003A (en) * | 1987-05-21 | 1990-08-28 | Siemens Aktiengesellschaft | Power semiconductor device |
US5783485A (en) * | 1996-07-19 | 1998-07-21 | Motorola, Inc. | Process for fabricating a metallized interconnect |
EP1176640A3 (en) * | 2000-07-27 | 2004-03-17 | Texas Instruments Incorporated | Contact structure of an integrated power circuit |
-
1982
- 1982-11-19 JP JP57201953A patent/JPS5992537A/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4953003A (en) * | 1987-05-21 | 1990-08-28 | Siemens Aktiengesellschaft | Power semiconductor device |
US5783485A (en) * | 1996-07-19 | 1998-07-21 | Motorola, Inc. | Process for fabricating a metallized interconnect |
EP1176640A3 (en) * | 2000-07-27 | 2004-03-17 | Texas Instruments Incorporated | Contact structure of an integrated power circuit |
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