JPS5984397A - Ｍｏｓ論理レベルを規定するバツフア回路 - Google Patents

Ｍｏｓ論理レベルを規定するバツフア回路

Info

Publication number
JPS5984397A
JPS5984397A JP58146796A JP14679683A JPS5984397A JP S5984397 A JPS5984397 A JP S5984397A JP 58146796 A JP58146796 A JP 58146796A JP 14679683 A JP14679683 A JP 14679683A JP S5984397 A JPS5984397 A JP S5984397A
Authority
JP
Japan
Prior art keywords
logic
circuit
level
signal
complementary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58146796A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0410157B2 (enExample
Inventor
ヒユ・ハ−バ−ト・チヤオ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5984397A publication Critical patent/JPS5984397A/ja
Publication of JPH0410157B2 publication Critical patent/JPH0410157B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/01855—Interface arrangements synchronous, i.e. using clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
JP58146796A 1982-11-01 1983-08-12 Ｍｏｓ論理レベルを規定するバツフア回路 Granted JPS5984397A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US437991 1982-11-01
US06/437,991 US4496857A (en) 1982-11-01 1982-11-01 High speed low power MOS buffer circuit for converting TTL logic signal levels to MOS logic signal levels

Publications (2)

Publication Number Publication Date
JPS5984397A true JPS5984397A (ja) 1984-05-16
JPH0410157B2 JPH0410157B2 (enExample) 1992-02-24

Family

ID=23738772

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58146796A Granted JPS5984397A (ja) 1982-11-01 1983-08-12 Ｍｏｓ論理レベルを規定するバツフア回路

Country Status (4)

Country Link
US (1) US4496857A (enExample)
EP (1) EP0110060B1 (enExample)
JP (1) JPS5984397A (enExample)
DE (1) DE3369042D1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62100021A (ja) * 1985-10-21 1987-05-09 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション バイポ−ラ−ｆｅｔインタ−フエイス回路
WO2003103144A1 (ja) * 2002-05-30 2003-12-11 ソニー株式会社 レベルシフト回路、表示装置および携帯端末

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3247834A1 (de) * 1982-12-23 1984-06-28 Siemens AG, 1000 Berlin und 8000 München Schaltkreis-baustein
JPS59201460A (ja) * 1983-04-30 1984-11-15 Sharp Corp Ｃｍｏｓ△ｆｅｔ集積回路の製造方法
NL8303835A (nl) * 1983-11-08 1985-06-03 Philips Nv Digitale signaalomkeerschakeling.
US4561702A (en) * 1984-05-09 1985-12-31 Texas Instruments Incorporated CMOS Address buffer circuit
US4716312A (en) * 1985-05-07 1987-12-29 California Institute Of Technology CMOS logic circuit
ATE53723T1 (de) * 1985-08-13 1990-06-15 Siemens Ag Signalumsetzschaltung.
US4697108A (en) * 1986-05-09 1987-09-29 International Business Machines Corp. Complementary input circuit with nonlinear front end and partially coupled latch
JPS62272722A (ja) * 1986-05-21 1987-11-26 Clarion Co Ltd Ｔｔｌ論理レベルｃｍｏｓ入力バツフア
EP0265572A1 (en) * 1986-10-29 1988-05-04 International Business Machines Corporation High signal sensitivity high speed receiver in CMOS technology
IT1201860B (it) * 1986-12-10 1989-02-02 Sgs Microelettronica Spa Circuito logico cmos
LU87147A1 (de) * 1987-10-14 1988-07-14 Siemens Ag Breitbandsignal-koppeleinrichtung
JPH077901B2 (ja) * 1988-02-29 1995-01-30 沖電気工業株式会社 フリップフロップ回路
US4859880A (en) * 1988-06-16 1989-08-22 International Business Machines Corporation High speed CMOS differential driver
US5028817A (en) * 1990-06-14 1991-07-02 Zoran Corporation Tristable output buffer with state transition control
US5410583A (en) * 1993-10-28 1995-04-25 Rca Thomson Licensing Corporation Shift register useful as a select line scanner for a liquid crystal display
US5519344A (en) * 1994-06-30 1996-05-21 Proebsting; Robert J. Fast propagation technique in CMOS integrated circuits
TW461180B (en) * 1998-12-21 2001-10-21 Sony Corp Digital/analog converter circuit, level shift circuit, shift register utilizing level shift circuit, sampling latch circuit, latch circuit and liquid crystal display device incorporating the same
US9270273B2 (en) * 2011-10-28 2016-02-23 Texas Instruments Incorporated Level shifter
US10648551B2 (en) 2017-12-05 2020-05-12 Bell Helicopter Textron Inc. Gearbox split torque equalization system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5542400A (en) * 1978-09-15 1980-03-25 Siemens Ag Address buffer for mossmemory device

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3588537A (en) * 1969-05-05 1971-06-28 Shell Oil Co Digital differential circuit means
US3631528A (en) * 1970-08-14 1971-12-28 Robert S Green Low-power consumption complementary driver and complementary bipolar buffer circuits
US3879621A (en) * 1973-04-18 1975-04-22 Ibm Sense amplifier
US3983543A (en) * 1975-06-30 1976-09-28 International Business Machines Corporation Random access memory read/write buffer circuits incorporating complementary field effect transistors
US4096402A (en) * 1975-12-29 1978-06-20 Mostek Corporation MOSFET buffer for TTL logic input and method of operation
US4038567A (en) * 1976-03-22 1977-07-26 International Business Machines Corporation Memory input signal buffer circuit
US4110639A (en) * 1976-12-09 1978-08-29 Texas Instruments Incorporated Address buffer circuit for high speed semiconductor memory
US4131808A (en) * 1977-08-04 1978-12-26 Fairchild Camera And Instrument Corporation TTL to MOS driver circuit
DE2745302C2 (de) * 1977-10-07 1982-03-18 Eurosil GmbH, 8000 München Schaltungsanordnung zur Kontrolle der Versorgungsspannung für vorzugsweise integrierte Schaltkreise
US4150308A (en) * 1977-10-25 1979-04-17 Motorola, Inc. CMOS level shifter
JPS5522238A (en) * 1978-07-31 1980-02-16 Fujitsu Ltd Decoder circuit
DE2838817A1 (de) * 1978-09-06 1980-03-20 Ibm Deutschland Ttl-kompatible adressverriegelungsschaltung mit feldeffekttransistoren und entsprechendes betriebsverfahren
US4214175A (en) * 1978-09-22 1980-07-22 Fairchild Camera And Instrument Corporation High-performance address buffer for random-access memory
US4258272A (en) * 1979-03-19 1981-03-24 National Semiconductor Corporation TTL to CMOS input buffer circuit
US4291242A (en) * 1979-05-21 1981-09-22 Motorola, Inc. Driver circuit for use in an output buffer
US4318015A (en) * 1979-06-29 1982-03-02 Rca Corporation Level shift circuit
US4307308A (en) * 1979-11-19 1981-12-22 Gte Laboratories Incorporated Digital signal conversion circuit
US4309630A (en) * 1979-12-10 1982-01-05 Bell Telephone Laboratories, Incorporated Buffer circuitry
JPS6037996B2 (ja) * 1980-02-20 1985-08-29 沖電気工業株式会社 バツフア回路
JPS56130885A (en) * 1980-03-18 1981-10-14 Fujitsu Ltd Address buffer circuit
JPS5780774A (en) * 1980-11-07 1982-05-20 Hitachi Ltd Semiconductor integrated circuit device
US4412143A (en) * 1981-03-26 1983-10-25 Ncr Corporation MOS Sense amplifier
US4485317A (en) * 1981-10-02 1984-11-27 Fairchild Camera & Instrument Corp. Dynamic TTL input comparator for CMOS devices

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5542400A (en) * 1978-09-15 1980-03-25 Siemens Ag Address buffer for mossmemory device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62100021A (ja) * 1985-10-21 1987-05-09 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション バイポ−ラ−ｆｅｔインタ−フエイス回路
WO2003103144A1 (ja) * 2002-05-30 2003-12-11 ソニー株式会社 レベルシフト回路、表示装置および携帯端末

Also Published As

Publication number Publication date
DE3369042D1 (en) 1987-02-12
JPH0410157B2 (enExample) 1992-02-24
EP0110060B1 (en) 1987-01-07
EP0110060A1 (en) 1984-06-13
US4496857A (en) 1985-01-29

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