JPS5962261A - Failure detecting method of electronic exchange - Google Patents

Failure detecting method of electronic exchange

Info

Publication number
JPS5962261A
JPS5962261A JP17274082A JP17274082A JPS5962261A JP S5962261 A JPS5962261 A JP S5962261A JP 17274082 A JP17274082 A JP 17274082A JP 17274082 A JP17274082 A JP 17274082A JP S5962261 A JPS5962261 A JP S5962261A
Authority
JP
Japan
Prior art keywords
call connection
connection control
control processor
processor
failure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17274082A
Other languages
Japanese (ja)
Inventor
Hiroshi Fujita
博 藤田
Yoshibumi Miyazaki
宮崎　義文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP17274082A priority Critical patent/JPS5962261A/en
Publication of JPS5962261A publication Critical patent/JPS5962261A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/22—Arrangements for supervision, monitoring or testing
    • H04M3/24—Arrangements for supervision, monitoring or testing with provision for checking the normal operation
    • H04M3/241—Arrangements for supervision, monitoring or testing with provision for checking the normal operation for stored program controlled exchanges

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Monitoring And Testing Of Exchanges (AREA)

Abstract

PURPOSE:To eliminate the need for a failure detecting section and to reduce the cost, by assigning a specific address to each processor of an electronic exchange, and performing test communication of each call connection control processor through a common bus from an input/output control processor. CONSTITUTION:An input/output processor 21 performs test communication through the common bus periodically to call connection control processors 22, 23 provided with a specific address. When a failure is detected in the call connection control processor 22 of the common use system, the address of the call connection control processor 23 is registered as the common use system. Since the failure detecting section is not required, the cost of the hardware is decreased and since the call connection control processor is controlled freely with a specific address, the failed part of the call connection control processor is inspected in detail.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、複数のプロセサで構成される電子交換機に利
用されるプロセサの障害検出方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for detecting faults in processors used in electronic exchanges comprising a plurality of processors.

従来例の構成とその問題点 第１図は従来の障害検出方法を示している。４第１図に
おいて、１は入出力制御プロセサ、２，３は呼接続制御
プロセサ、４，６は障害検出部、６は冗長系切替部、７
は共通バスである。Conventional configuration and problems thereof FIG. 1 shows a conventional fault detection method. 4 In FIG. 1, 1 is an input/output control processor, 2 and 3 are call connection control processors, 4 and 6 are failure detection units, 6 is a redundant system switching unit, and 7
is a common bus.

次に上記従来例の動作について説明する。障害検出部４
は、呼接続制御プロセサ２の動作を監視しており障害発
生時には冗長系切替部６に信号を出力して、現用プロセ
ッサを呼接続制御プロセサ２から呼接続制御プロセッサ
３に切替を指示する。Next, the operation of the above conventional example will be explained. Fault detection unit 4
monitors the operation of the call connection control processor 2, and in the event of a failure, outputs a signal to the redundant system switching section 6 to instruct switching of the active processor from the call connection control processor 2 to the call connection control processor 3.

しかしながら上記従来例においては、呼接続制御プロセ
サの障害を検出するため各呼接続制御プロセサの動作を
監視するだめの障害検出部が必要となり、回路構成が複
雑になり、かつ機器コストが高くなるという問題があっ
た。However, in the above conventional example, in order to detect a failure in a call connection control processor, a failure detection unit is required to monitor the operation of each call connection control processor, resulting in a complicated circuit configuration and high equipment cost. There was a problem.

発明の目的 本発明は、上記従来例の問題点を除去するものであり、
障害検出部を必要としない障害検出方法により冗長系切
替を行なうことを目的とするものである。Purpose of the Invention The present invention eliminates the problems of the above-mentioned conventional example,
The object of this invention is to perform redundant system switching using a fault detection method that does not require a fault detection unit.

発明の構成 本発明は、上記目的を達成するために、冗長系のプロセ
サをも含めて、あらかじめ各プロセサに対して固有のア
ドレスを割当て、入出力制御プロセサから各呼接続制御
プロセサに対して、共通バスを通じてテスト通信を行な
えるようにしたものである。Structure of the Invention In order to achieve the above object, the present invention allocates a unique address to each processor, including redundant processors, in advance, and from an input/output control processor to each call connection control processor, This allows test communication to be performed through a common bus.

実施例の説明 以下に本発明の実施例について、図面とともに説明する
。第２図において、２１は入出力制御プロセサで、２２
．２３はそれぞれ固有のアドレスが伺与された呼処理制
御プロセサである。７は第１図３と同じ各プロセサに接
続されている共通バスである。DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings. In FIG. 2, 21 is an input/output control processor, 22
．． 23 are call processing control processors each assigned a unique address. 7 is a common bus connected to each processor, which is the same as in FIG.

次に上記実施例の動作について説明する。第２図におい
て、人出力制御プロセサ２１は呼接続制御プロセサ２２
．２３に対して定期的に共通バス７を通じてテスト通信
を行なっている。テスト通信の結果、常用系の呼接続制
御プロセサ２２に障害を検出したときには、呼接続制御
プロセサ２３のアドレスを常用系として登録する。Next, the operation of the above embodiment will be explained. In FIG. 2, the human output control processor 21 is the call connection control processor 22.
．． 23 through the common bus 7 on a regular basis. As a result of the test communication, if a failure is detected in the call connection control processor 22 of the regular system, the address of the call connection control processor 23 is registered as the regular system.

発明の効果 本発明は上記のような構成であり、蛙半帷示坤゛′　　
　　　　　　　障害検出部を必要としないだめ、ハード
ウェアのコストダウンができる。さらに入出力制御プロ
セサ２１から、冗長系の呼接続制御プロセサ２２．２３
に対して、その固有アドレスで自由に制御できるだめ、
冗長系切替実施後、障害を検出した呼接続制御プロセサ
の故障箇所を詳細に検査できる利点をもつ。。Effects of the Invention The present invention has the above-mentioned configuration, and has the following features:
Since no failure detection unit is required, hardware costs can be reduced. Further, from the input/output control processor 21, the redundant call connection control processors 22 and 23
can be controlled freely with its unique address,
This method has the advantage of allowing detailed inspection of the failure location of the call connection control processor in which the failure has been detected after redundant system switching has been implemented. .

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来の電子交換機の冗長系構成における障害検
出方法を実現した装置のブロック図、第２図は本発明に
よる障害検出方法を適用した装置のブロック図である。 ２１・・・・・・入出力制御プロセサ、２２．２ａ・・
・・・呼接続制御プロセサ。FIG. 1 is a block diagram of a device that implements a fault detection method in a conventional redundant system configuration of an electronic exchange, and FIG. 2 is a block diagram of a device to which a fault detection method according to the present invention is applied. 21... Input/output control processor, 22.2a...
...Call connection control processor.

Claims (1)

【特許請求の範囲】[Claims] 入出力制御と呼接続制御機能を備えた複数のプロセサで
機能分散し、各プロセサにそれぞれ固有のアドレスを付
与し、互いに通信する手段と、多重化された呼接続制御
プロセサと、前記呼接続制御プロセサの障害検出によっ
て働く冗長系切替機能を保有する手段とを設け、前記呼
接続制御プロセサに対してテスト通信を行なうことで、
障害を検出することを特徴とする電子交換機の障害検出
方法。A means for distributing the functions of a plurality of processors having input/output control and call connection control functions, giving each processor a unique address, and communicating with each other, a multiplexed call connection control processor, and the call connection control. means having a redundant system switching function activated by detecting a fault in the processor, and performing test communication with the call connection control processor;
A fault detection method for an electronic exchange, characterized by detecting a fault.
JP17274082A 1982-09-30 1982-09-30 Failure detecting method of electronic exchange Pending JPS5962261A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17274082A JPS5962261A (en) 1982-09-30 1982-09-30 Failure detecting method of electronic exchange

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17274082A JPS5962261A (en) 1982-09-30 1982-09-30 Failure detecting method of electronic exchange

Publications (1)

Publication Number Publication Date
JPS5962261A true JPS5962261A (en) 1984-04-09

Family

ID=15947432

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17274082A Pending JPS5962261A (en) 1982-09-30 1982-09-30 Failure detecting method of electronic exchange

Country Status (1)

Country Link
JP (1) JPS5962261A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4969050A (en) * 1972-11-07 1974-07-04
JPS55138149A (en) * 1979-04-17 1980-10-28 Hitachi Ltd Multiprocessor fault detection system
JPS5691595A (en) * 1979-12-25 1981-07-24 Nec Corp Composite bus system
JPS5714272A (en) * 1980-06-30 1982-01-25 Nec Corp Mutual diagnostic system for plurale processors in scattered control electronic exchanger

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4969050A (en) * 1972-11-07 1974-07-04
JPS55138149A (en) * 1979-04-17 1980-10-28 Hitachi Ltd Multiprocessor fault detection system
JPS5691595A (en) * 1979-12-25 1981-07-24 Nec Corp Composite bus system
JPS5714272A (en) * 1980-06-30 1982-01-25 Nec Corp Mutual diagnostic system for plurale processors in scattered control electronic exchanger

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