JPS5961963A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5961963A JPS5961963A JP17353682A JP17353682A JPS5961963A JP S5961963 A JPS5961963 A JP S5961963A JP 17353682 A JP17353682 A JP 17353682A JP 17353682 A JP17353682 A JP 17353682A JP S5961963 A JPS5961963 A JP S5961963A
- Authority
- JP
- Japan
- Prior art keywords
- sheet resistance
- resistance value
- diffusion
- diffused
- objective
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 238000009792 diffusion process Methods 0.000 claims abstract description 46
- 239000012535 impurity Substances 0.000 claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims abstract description 8
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 8
- 239000010703 silicon Substances 0.000 claims abstract description 8
- 229910052796 boron Inorganic materials 0.000 claims description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 4
- 229910052733 gallium Inorganic materials 0.000 claims description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 2
- 230000002349 favourable effect Effects 0.000 abstract 2
- 230000001105 regulatory effect Effects 0.000 abstract 2
- 239000006185 dispersion Substances 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 6
- 239000000523 sample Substances 0.000 description 6
- 239000007787 solid Substances 0.000 description 2
- 239000010419 fine particle Substances 0.000 description 1
- 125000001475 halogen functional group Chemical group 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 239000013074 reference sample Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thyristors (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はｎ型シリコン層に深い低濃度のｐ型不純物拡散
層を有するゲート・ターン・オフサイリスク等の半導体
装置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device such as a gate turn off silicone device having a deep, low concentration p-type impurity diffusion layer in an n-type silicon layer.
半導体装置、例えばサイリスタ素子の製造には、低濃度
のｐ型不純物の拡散を必要とする。通常、この拡散不純
物にはガリウム（Ｇａ ）を使用している。ところでサ
イリスク素子の中でも例えばゲート・ターン・オフサイ
リスタにおいては、この拡散に際してシート抵抗値が極
めて正確な範囲になるように行う必要がある。もしシー
ト抵抗が所定の範囲より大きいとオフ特性が不良となり
、逆に所定の範囲よシ小さいとオン特性が不良となる。2. Description of the Related Art Manufacturing semiconductor devices, such as thyristor elements, requires diffusion of p-type impurities at a low concentration. Usually, gallium (Ga) is used as this diffusion impurity. By the way, among thyrisk elements, for example, in a gate turn-off thyristor, it is necessary to carry out this diffusion so that the sheet resistance value falls within an extremely accurate range. If the sheet resistance is larger than a predetermined range, the off-characteristics will be poor, and if the sheet resistance is smaller than the predetermined range, the on-characteristics will be poor.
しかし、通常のａａの拡散で、深い接合を形成し且つ低
不純物濃度拡散（１０’７〜１０”ｃＥ３）により、例
えばシート抵抗を±５０／口の範囲に制御することは難
しい。However, it is difficult to form a deep junction with normal aa diffusion and control the sheet resistance, for example, within the range of ±50/width by low impurity concentration diffusion (10'7 to 10''cE3).
まだｐ型不純物としてよく用いられるボロンｆＢｌだけ
を使って拡散を行った場合には、固溶度が大きい為低濃
度拡散ができなかったシ、イオン半径が小さすぎる為、
所要の耐圧を確保することができず、単独使用には問題
があった。When diffusion was performed using only boron fBl, which is still often used as a p-type impurity, low concentration diffusion was not possible due to its high solid solubility, and the ionic radius was too small.
It was not possible to secure the required pressure resistance, and there was a problem in using it alone.
本発明は上記の点に鑑みてなされたものであって、ゲー
ト・ターン・オフサイリスタ等の製造時に必要とされる
低濃度のｐ型不純物の拡散に際してシート抵抗を目標値
に精度良く調整可能とした半導体装置の製造方法を提供
子゛ることを目的としている。本発明では、この目的を
達成するために、ｎ型シリコン層にＧａを目標とするシ
ート抵抗よシ高くなるように所定の（さに拡散し、更に
Ｂの拡散時間、拡散温度等の制御に基づき目標とするシ
ート抵抗値となるようにＢの拡散を行うことを特徴とし
ている。The present invention has been made in view of the above points, and it is possible to precisely adjust the sheet resistance to a target value when diffusing low concentration p-type impurities required in manufacturing gate turn-off thyristors, etc. The purpose of this invention is to provide a method for manufacturing a semiconductor device. In the present invention, in order to achieve this objective, Ga is diffused into the n-type silicon layer at a predetermined rate so as to have a higher sheet resistance than the target sheet resistance, and the B diffusion time, diffusion temperature, etc. are controlled. It is characterized in that B is diffused so that a target sheet resistance value is achieved based on the method.
以下、本発明の一実施例を添附された図面と共に説明す
る。Hereinafter, one embodiment of the present invention will be described with reference to the accompanying drawings.
まず、ｎ型シリコン層にＧａを、目標とするシート抵抗
よシ高くなるように拡散する。次に、このＧａが拡散さ
れたものにＢを拡散する。この場合、Ｂ拡散条件、例え
ば拡散温度、拡散時間の制御に基づき、目標値の７−ト
抵抗になるようにＢの拡散を行う。First, Ga is diffused into the n-type silicon layer so that the sheet resistance is higher than the target sheet resistance. Next, B is diffused into the Ga-diffused material. In this case, B is diffused to achieve the target value of 7-t resistance based on control of B diffusion conditions, such as diffusion temperature and diffusion time.
但し、実際に半導体素子を含む半導体装置を製造する際
には、前述した拡散工程゛の後、熱処理によシネ細物の
再分布が行なわれる。特に、シート抵抗については、再
分布の際の外方抵抗が大きく影響を及ぼすため、目標と
するシート抵抗の値は、不純物の再分布後の／−ト抵抗
になるように設定する。However, when actually manufacturing a semiconductor device including a semiconductor element, the cine fine particles are redistributed by heat treatment after the above-mentioned diffusion step. In particular, the sheet resistance is greatly influenced by the external resistance during redistribution, so the target value of the sheet resistance is set to be the /-t resistance after the redistribution of impurities.
上述した本発明において採用された拡散工程の説明を第
１図乃至第４図に示す。これらの図面において、Ｎθ、
２７は夫々再分布後の不純物濃度と拡散深さを示じてい
る。An explanation of the diffusion process adopted in the above-described present invention is shown in FIGS. 1 to 4. In these drawings, Nθ,
27 indicates the impurity concentration and diffusion depth after redistribution, respectively.
第１図は目標とするＧａ拡散を行った時の、再分布後の
Ｎθ対χＪの特性図であシ、実際には、第２図の特性図
に示されるようにシート抵抗が目標値より高くなるよう
にＧａ拡散では第２図の特性に基づくサンプルが得られ
る。Figure 1 is a characteristic diagram of Nθ vs. χJ after redistribution when targeted Ga diffusion is performed. When Ga is diffused so as to increase the temperature, a sample based on the characteristics shown in FIG. 2 is obtained.
第３図は第２図のサンプルを調整するためにＢ拡散のみ
を行った場合の再分布後のＮ８対りの特性図である。従
って、第３図の拡散条件を制御することによハロ標値と
なるシート抵抗となるように最終的に第４図の特性が得
られる。FIG. 3 is a characteristic diagram of the N8 pair after redistribution when only B diffusion is performed to adjust the sample in FIG. 2. Therefore, by controlling the diffusion conditions shown in FIG. 3, the characteristics shown in FIG. 4 can be finally obtained so that the sheet resistance becomes the halo target value.
便更に、上述した拡散条件についての制御方法の具体例
に言及する。今、目標とする再分布後のシート抵抗をＣ
（Ω／口）とし、Ｇａ拡散のみを行ったものの再分布後
のシート抵抗をＡ（Ω／口）、Ｂ拡散のみを行ったもの
の再分布後のシート抵抗をＢ（Ω／口）とすると、近似
的に１式が成立することが実験的に確認された。For convenience, a specific example of the control method for the above-mentioned diffusion conditions will be mentioned. Now, the target sheet resistance after redistribution is C
(Ω/port), the sheet resistance after redistribution after performing only Ga diffusion is A (Ω/port), and the sheet resistance after redistribution after performing only B diffusion is B (Ω/port). , it was experimentally confirmed that equation 1 holds approximately.
１ １ １
一十−＝−・・・・・・（１）
Ａ Ｂ に
の第（１）式に、Ａ、Ｃの値を代入し、Ｂの値を求め、
再分布後のシート抵抗がＢ（Ω／Ｉコ）となるような条
件で、Ｂ拡散を行い、シート抵抗を調整する。1 1 1 10 −=−・・・・・・(1) Substitute the values of A and C into equation (1) for A B and find the value of B,
B diffusion is performed to adjust the sheet resistance under conditions such that the sheet resistance after redistribution becomes B (Ω/I).
〈実施例〉
Ｇａ拡散後のシート抵抗（ρ６）が１８６（Ω／口）の
サンプルがあシ、このサンプルとＧａ・拡散後のシート
抵抗がρ、−１２５の基準サンプルとを同等にＢで調整
した。前者のρ−−１８６の再分布後のρ、′は２３６
（Ω／口）、後者のｐＨ−１２５の再分布右後のρ、′
は１５８（Ω／口）である。これらとなる。つまシ、再
分布後にハ’＝４７８（Ω／口）になるよりなり拡散を
行い調整を行えば良い。具体的には９５０℃、６０分の
固体拡散源を用いたＢ拡散を行った。調整した再分布後
のサンプルρ、′は１５７（Ω／口）で、目標のρ、’
＝１５８（Ω／口）とわずか１（Ω／口）違うだけであ
った。<Example> There is a sample with a sheet resistance (ρ6) of 186 (Ω/mouth) after Ga diffusion, and this sample and a reference sample whose sheet resistance after Ga diffusion is ρ, -125 are equivalently B. It was adjusted. After the redistribution of the former ρ−186, ρ,′ is 236
(Ω/mouth), ρ after the latter redistribution of pH-125, ′
is 158 (Ω/mouth). These will be. However, after redistribution, H' = 478 (Ω/mouth), so it is better to perform adjustment by performing diffusion. Specifically, B diffusion was performed using a solid diffusion source at 950° C. for 60 minutes. The sample ρ,′ after the adjusted redistribution is 157 (Ω/mouth), and the target ρ,′
= 158 (Ω/mouth), which was only 1 (Ω/mouth) different.
本発明の一実施例は以上のようであり、従来のＧａ拡散
に比べて、目標とするシート抵抗は、ある値のシート抵
抗以上に規定できるので、略１００％成功する。更にＢ
拡散により正確に目標とするシート抵抗に調整できるの
で、シート抵抗の再現性が極めて良く、目標値からのノ
くラツキは±３免以内に抑えることができる。One embodiment of the present invention is as described above, and compared to conventional Ga diffusion, the target sheet resistance can be defined to be greater than a certain value of sheet resistance, so it is approximately 100% successful. Further B
Since the target sheet resistance can be accurately adjusted by diffusion, the reproducibility of the sheet resistance is extremely good, and the deviation from the target value can be suppressed to within ±3 mm.
本発明は以上のようであシ、低濃度のｐ型不純物の拡散
に際して、シート抵抗を目標値に精度良く調整すること
ができ、特にゲート・ターン・オフサイリスタ等の製造
についてその効果は大きいなお、こうしたｎ型シリコン
層へのｐ型不純物の拡散については、既に特開昭５７−
６６６２８号に開示されている。しかしながら、この刊
行物の場合にはＧａを拡散源とし、ｎ型シリコン層に拡
散深度の浅い高濃度のｐ型不純物層を形成した後、高濃
度のｐ型不純物層を再拡散して、拡散深度の深い低濃度
のｐ型不純物したものに過ぎない。即ち本発明の如（Ｇ
ａを拡散後、目標のシート抵抗値となるようにＢの拡散
を行うことによｐ、Ｇａ及びＢ単独の拡散法の欠点を相
補い、シート抵抗を調整した点の効果を窺知できない。As described above, the present invention can precisely adjust the sheet resistance to a target value when diffusing low concentration p-type impurities, and the present invention is particularly effective in manufacturing gates, turn-off thyristors, etc. The diffusion of p-type impurities into the n-type silicon layer has already been described in Japanese Unexamined Patent Application Publication No. 1986-
No. 66628. However, in the case of this publication, Ga is used as a diffusion source, and after forming a high concentration p-type impurity layer with a shallow diffusion depth in the n-type silicon layer, the high concentration p-type impurity layer is re-diffused and then diffused. It is nothing more than a deep, low concentration p-type impurity. That is, as in the present invention (G
After diffusing a, B is diffused to achieve the target sheet resistance value, thereby compensating for the drawbacks of the method of diffusing p, Ga, and B alone, and the effect of adjusting the sheet resistance cannot be seen.
第１図は目標とするＧａ拡散を行ったときの、再分布後
の不純物濃度（Ｎｓ）と拡散深さくｚ、＃）との関係を
示す特性図、第２図はシート抵抗が目標値よシ高くなる
ようにＧａ拡散を行ったときの、再分布後の不純物濃度
（Ｎｓ）と拡散深さくχＪ）との関係を示す特性図、第
３図は第２図を調整するためのＢ拡散のみを行った時の
、再分布後の不純物濃度（Ｎｓ）と拡散深さくχｊ）と
の関係を示す特性図、第４図は第２図のサンプルを第３
図のＢ拡散で調整したものの再分布後の不純物濃度（Ｎ
ｓ）と拡散深さくχＪ−）との関係を示す特性図である
。
区 区
−Ｎ
蘇 沫
区 区
（′ｖ′） 寸法
法Figure 1 is a characteristic diagram showing the relationship between the impurity concentration (Ns) after redistribution and the diffusion depth z, #) when targeted Ga diffusion is performed, and Figure 2 is a characteristic diagram showing the relationship between the impurity concentration (Ns) after redistribution and the diffusion depth z, #), and Figure 2 shows the relationship between the sheet resistance and the target value. A characteristic diagram showing the relationship between the impurity concentration (Ns) after redistribution and the diffusion depth (χJ) when Ga is diffused to increase the concentration of Ga. Figure 4 is a characteristic diagram showing the relationship between the impurity concentration (Ns) after redistribution and the diffusion depth χj) when only the sample in Figure 2 is
The impurity concentration after redistribution (N
s) and the diffusion depth χJ−). FIG. Ku Ku-N Su Yu Ku Ku ('v') Dimensions
law
Claims (3)
有する半導体装置の製造方法において、前記ｎ型シリコ
ン層にガリウムを目標とするシート抵抗値よシ高くなる
ように所定の深さに拡散し、更にボロンの拡散条件の制
御に基づき目標とするシート抵抗値となるようにボロン
の拡散を行うことを特徴とする半導体装置の製造方法。(1) In a method for manufacturing a semiconductor device having a p-type impurity diffusion layer with a deep concentration in an n-type silicon layer, gallium is added to the n-type silicon layer to a predetermined depth so that the sheet resistance value is higher than the target sheet resistance. 1. A method of manufacturing a semiconductor device, comprising: diffusing boron; and further diffusing boron so as to achieve a target sheet resistance value based on control of boron diffusion conditions.
ことを特徴とする特許請求の範囲第１項記載の半導体装
置の製造方法。(2) The method of manufacturing a semiconductor device according to claim 1, wherein the diffusion conditions are a diffusion time and a diffusion temperature.
スタであることを特徴とする特許請求の範囲第１項及び
第２項記載の半導体装置の製造方法。(3) The method for manufacturing a semiconductor device according to claims 1 and 2, wherein the semiconductor device is a gate turn-off thyristor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17353682A JPS5961963A (en) | 1982-10-01 | 1982-10-01 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17353682A JPS5961963A (en) | 1982-10-01 | 1982-10-01 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5961963A true JPS5961963A (en) | 1984-04-09 |
Family
ID=15962345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17353682A Pending JPS5961963A (en) | 1982-10-01 | 1982-10-01 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5961963A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0539623U (en) * | 1991-07-09 | 1993-05-28 | 日本製箔株式会社 | Filter device for range hood |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5488768A (en) * | 1977-12-26 | 1979-07-14 | Fuji Electric Co Ltd | Manufacture for semiconductor device |
| JPS5596630A (en) * | 1979-01-17 | 1980-07-23 | Toyo Electric Mfg Co Ltd | Method of diffusing gallium |
-
1982
- 1982-10-01 JP JP17353682A patent/JPS5961963A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5488768A (en) * | 1977-12-26 | 1979-07-14 | Fuji Electric Co Ltd | Manufacture for semiconductor device |
| JPS5596630A (en) * | 1979-01-17 | 1980-07-23 | Toyo Electric Mfg Co Ltd | Method of diffusing gallium |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0539623U (en) * | 1991-07-09 | 1993-05-28 | 日本製箔株式会社 | Filter device for range hood |
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