JPS5842273A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5842273A JPS5842273A JP56140490A JP14049081A JPS5842273A JP S5842273 A JPS5842273 A JP S5842273A JP 56140490 A JP56140490 A JP 56140490A JP 14049081 A JP14049081 A JP 14049081A JP S5842273 A JPS5842273 A JP S5842273A
- Authority
- JP
- Japan
- Prior art keywords
- polycrystalline silicon
- rays
- wiring
- polycrystalline
- resistivity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 12
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 23
- 238000000034 method Methods 0.000 claims abstract description 6
- 239000004020 conductor Substances 0.000 claims description 4
- 230000001678 irradiating effect Effects 0.000 claims description 3
- 230000005685 electric field effect Effects 0.000 claims 1
- 238000009413 insulation Methods 0.000 claims 1
- 239000012535 impurity Substances 0.000 abstract description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract description 2
- 239000013078 crystal Substances 0.000 abstract description 2
- 229910052698 phosphorus Inorganic materials 0.000 abstract 1
- 239000011574 phosphorus Substances 0.000 abstract 1
- 239000007787 solid Substances 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 241000283690 Bos taurus Species 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置の製造方法に係り、とくに多結晶シ
リコン【ゲート電極及び配線部の少なくとも一方に用い
た絶縁ゲート型電界効果半導体装置の製造方法に関する
。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing an insulated gate field effect semiconductor device using polycrystalline silicon for at least one of a gate electrode and a wiring portion.
従来、高集積の絶縁ゲート型電界効果半導体装置（以下
、ＭＯ８型半導体装置と称す）では、多結晶シリコンを
ゲート電極及び配線に用いたシリコングー）ＭＯａ型半
導体装置が広く用いられている。このシリコンゲート開
Ｏ８型半導体装置の欠点は、多結晶シリコンの抵抗率が
不純物を添加した場合の下限でも略１０−４Ω・ｃｍと
大きいことである。この友め、半導体装置の集積化が進
むと多結晶シリコンの配線部での抵抗が大きく、高速動
作を妨げていた。Conventionally, among highly integrated insulated gate field effect semiconductor devices (hereinafter referred to as MO8 type semiconductor devices), MOa type semiconductor devices in which polycrystalline silicon is used for gate electrodes and interconnections have been widely used. A drawback of this open silicon gate O8 type semiconductor device is that the resistivity of polycrystalline silicon is as large as approximately 10<-4 >[Omega].cm even at the lower limit when impurities are added. However, as semiconductor devices become more integrated, the resistance in the polycrystalline silicon wiring increases, hindering high-speed operation.
本発明は上記の欠点を無くシ、高集積化と高速動作が同
時に可能なシリコングー）ＭＯａ型牛型体導体装置造方
法を提供することにある。SUMMARY OF THE INVENTION The object of the present invention is to provide a method for manufacturing a silicon MOa type bovine conductor device which eliminates the above-mentioned drawbacks and is capable of high integration and high speed operation at the same time.
本発明では、不純物を添加した多結晶シリコンにレーザ
ー光線、強力な熱光線、荷電粒子線等の放射エネルギー
線１０射することにより、不純物の固溶限界を上げ、多
結晶シリコンの結晶粒径を肥大化して、結果として多結
晶シリコンの抵抗率を減少させる。放射エネルギー線を
照射の際、ゲート電極の多結晶シリコンｌ／ｃは照射さ
れないようにして、シリコングー）ＭＯ８素子の放射エ
ネルギー線による不安化を抑える。In the present invention, polycrystalline silicon doped with impurities is irradiated with 10 radiant energy beams such as laser beams, intense thermal rays, and charged particle beams to increase the solubility limit of impurities and increase the crystal grain size of polycrystalline silicon. , resulting in a decrease in the resistivity of the polycrystalline silicon. When irradiating the radiant energy rays, the polycrystalline silicon l/c of the gate electrode is not irradiated to suppress the instability of the silicon MO8 element due to the radiant energy rays.
かくしてシリコングー）ＭＯ８素子の安定動作は確保し
て、必要な個所の多結晶シリコン配線の抵抗率を減少し
て高速動作を可能にしている。In this way, stable operation of the MO8 element (silicon) is ensured, and the resistivity of the polycrystalline silicon wiring at necessary locations is reduced to enable high-speed operation.
次に本発明の実施例を図面を後層しながら説明する。Next, embodiments of the present invention will be described with reference to the drawings.
第１図はシリコングー）ＭＯ８Ｏ８型体導体装置造工程
において、多結晶シリコン１及び２ｔ−パターニングし
、リンＣＰ）ｔ−多結晶シリコンと拡散層３とに添加し
、さらにレーザー光線を半導体装置に選択照射して込る
際の半導体装置の断面図である。選択照射のためにはマ
スクを用いている。Figure 1 shows silicon goo) MO8O8 type conductor device fabrication process in which polycrystalline silicon 1 and 2t-patterning, phosphor (CP)t-added to polycrystalline silicon and diffusion layer 3, and laser beams are selected for the semiconductor device. FIG. 3 is a cross-sectional view of the semiconductor device during irradiation. A mask is used for selective irradiation.
波長０．５１μｍのＣＷレーザーを照射、多結晶シリコ
ン配線部２の抵抗率ｔ１０””Ω・ｃｍのオーダーで約
１／２０に改善することができる。又、ゲート多結晶シ
リコン部分１にはレーザー光は照射されず、素子は安定
性を保つ、この後の製造工程は通常のシリコングー）Ｍ
Ｏ８Ｏ８型体導体装置一である。By irradiating with a CW laser having a wavelength of 0.51 μm, the resistivity of the polycrystalline silicon wiring portion 2 can be improved to about 1/20 on the order of t10''Ω·cm. In addition, the gate polycrystalline silicon portion 1 is not irradiated with laser light, and the device maintains stability.The subsequent manufacturing process is a normal silicon process)
This is an O8O8 type conductor device.
かくしてその後の熱工程は低温、短時間なので、さな値
を保つことができる。In this way, the subsequent thermal process is performed at a low temperature and for a short period of time, so that a small value can be maintained.
第１ｒＩＡは本発明の一実施例を示すためのシリコング
ー）ＭＯａ型半導体装置の製造工程を示す断面図である
。
なお図において、
ｌ・・・・・・ゲート電極の多結晶シリコン、２・・・
・・・多結晶シリコンの配線部分、３・・川・不純物拡
散層−４・・・・・・シリコン酸化膜、５・・・・・・
シリコン基板、である。1A is a sectional view showing a manufacturing process of a silicon MOa type semiconductor device according to an embodiment of the present invention. In the figure, l...polycrystalline silicon of the gate electrode, 2...
...Polycrystalline silicon wiring part, 3...River/impurity diffusion layer-4...Silicon oxide film, 5...
It is a silicon substrate.
Claims (1)
に用い九絶縁グート屋電界効果牛導体装置において、該
多結晶シリコンの一部の配線部のみに放射エネルギー線
を照射することにより、被照射部の該多結晶シリコンの
抵抗率を減少させる工程を含むことｔ？特徴とする半導
体装置の製造方法。In a nine-insulation electric field effect conductor device using polycrystalline silicon for at least one of the gate electrode and the wiring, by irradiating only a part of the wiring of the polycrystalline silicon with radiant energy rays, it is possible to Including a step of reducing the resistivity of polycrystalline silicon? A method for manufacturing a featured semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56140490A JPH0642493B2 (en) | 1981-09-07 | 1981-09-07 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56140490A JPH0642493B2 (en) | 1981-09-07 | 1981-09-07 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5842273A true JPS5842273A (en) | 1983-03-11 |
| JPH0642493B2 JPH0642493B2 (en) | 1994-06-01 |
Family
ID=15269823
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56140490A Expired - Lifetime JPH0642493B2 (en) | 1981-09-07 | 1981-09-07 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0642493B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4557897A (en) * | 1984-03-02 | 1985-12-10 | The Furukawa Electric Co., Ltd. | Method for supplying cold or hot water |
| JPS62290128A (en) * | 1986-06-10 | 1987-12-17 | Toshiba Corp | Manufacture of semiconductor device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55111170A (en) * | 1979-02-20 | 1980-08-27 | Nec Corp | Method of manufacturing semiconductor device |
| JPS5621367A (en) * | 1979-07-27 | 1981-02-27 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPS5687354A (en) * | 1979-12-17 | 1981-07-15 | Matsushita Electric Ind Co Ltd | Formation of resistor body |
-
1981
- 1981-09-07 JP JP56140490A patent/JPH0642493B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55111170A (en) * | 1979-02-20 | 1980-08-27 | Nec Corp | Method of manufacturing semiconductor device |
| JPS5621367A (en) * | 1979-07-27 | 1981-02-27 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPS5687354A (en) * | 1979-12-17 | 1981-07-15 | Matsushita Electric Ind Co Ltd | Formation of resistor body |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4557897A (en) * | 1984-03-02 | 1985-12-10 | The Furukawa Electric Co., Ltd. | Method for supplying cold or hot water |
| JPS62290128A (en) * | 1986-06-10 | 1987-12-17 | Toshiba Corp | Manufacture of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0642493B2 (en) | 1994-06-01 |
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