JP3077760B2 - Solid phase diffusion method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Purpose of the Invention] (Industrial Application Field) The present invention relates to a solid-phase diffusion method that can contribute to ultra-miniaturization of a semiconductor device.

(Prior Art) In recent years, with the development of semiconductor technology, miniaturization and high integration of semiconductor devices have been advanced. As a method for introducing impurities in such a method of manufacturing a semiconductor device, an ion implantation method or a solid-phase diffusion method has been conventionally used, and the ion implantation method is dominant at present.

In order to advance the miniaturization of the element, it is necessary to reduce the depth of the impurity layer formed by introducing impurities by the above-described method. This is because the impurity layer is formed shallow,
This is for suppressing the lateral spread of the impurity layer. Thus, the error between the design value in the planar direction of the source region and the drain region of the transistor formed of the impurity layer is reduced, and the gate length of the gate electrode formed between the two regions is shortened and increased. It can be formed stably with high accuracy. As a result, the area occupied by the transistor is reduced, and the element can be miniaturized.

As described above, in miniaturization of the element, the depth of the impurity layer must be formed shallow, but it is extremely difficult to implant the impurity at a relatively high concentration and shallowness by the ion implantation method which is currently frequently used. Therefore, there is a limit to making the impurity layer shallow. For this reason, the ion implantation method is unsuitable for ultra-miniaturization of an element requiring a junction formed of an extremely shallow impurity layer of 0.15 μm or less.

Thus, a solid phase diffusion method conventionally used as a method for introducing impurities is advantageous in principle.

In this solid phase diffusion method, a diffusion source layer containing impurities is formed on a layer to be doped with impurities, and the impurities are introduced by thermal diffusion.

For example, a glass layer (BS) containing boron (B) generally used as a P-type impurity for a silicon substrate.
In the case of the doped oxide method in which boron is introduced into a silicon substrate using the (G film) as a diffusion source, the diffusion coefficient in the glass layer is smaller than the diffusion coefficient in the silicon substrate by two digits or more. Therefore, the diffusion of such impurities is often limited by the diffusion of impurities in the glass layer.

Therefore, for example, boron impurities are added to the silicon substrate.
If it is intended to introduce at a high concentration of 10 ²⁰ cm ^-3 or more, using a BSG film containing boron with a higher concentration of the above concentration or more, at a relatively high temperature of 1000 ° C. or more, for example, in a nitrogen gas atmosphere, Diffusion processing must be performed. In such a diffusion process, it is necessary to gradually carry the wafer into or out of the diffusion furnace in order to suppress stress on the wafer. For this reason, the impurities are diffused during this time, and the region into which the impurities are introduced is widened. As a result, it becomes difficult to form a shallow junction impurity layer.

In addition, there is a method of performing thermal diffusion in a short time by using a Rambe heating furnace. In such a short-time diffusion, it is possible to form an impurity layer at a small depth, but on the other hand, variation is increased. It is difficult to stably obtain a desired impurity layer. For this reason, productivity will be reduced during mass production.

(Problems to be Solved by the Invention) As described above, in the ion implantation method and the solid-phase diffusion method conventionally used as a method for introducing impurities, impurities having a high concentration and an extremely shallow junction depth are used. It was difficult to form a layer stably. For this reason, it has been an obstacle in miniaturizing the element.

In view of the above, the present invention has been made in view of the above, and an object of the present invention is to make it possible to stably form an impurity layer having a high concentration and an extremely shallow junction depth, and to realize an ultra-high density semiconductor device. An object of the present invention is to provide a solid-phase diffusion method that can contribute to high integration and ultra-high integration.

[Constitution of the Invention] (Means for Solving the Problems) In order to achieve the above object, a film containing an impurity is formed on a semiconductor layer, and then heat treatment is performed so that the impurity contained in the film is added to the semiconductor layer. In the solid-phase diffusion method of introducing by diffusion, the present invention is characterized in that the heat treatment is performed in an atmosphere having a hydrogen concentration of 5% to 40% and a diffusion temperature of 70 ° C to 1100 ° C.

(Operation) In the above method, the present invention increases the diffusion coefficient of the impurity in the film containing the impurity and the segregation coefficient at the interface between the film containing the impurity and the semiconductor layer.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing an experimental result of a concentration profile in a depth direction of an impurity layer formed by a solid phase diffusion method according to an embodiment of the present invention, as compared with a conventional example.

A feature of the solid-phase diffusion method according to the embodiments of the present invention described below is that heat treatment is performed in an atmosphere of nitrogen gas containing hydrogen.

The experimental example shown in FIG.
Boron (B), which is a type impurity, is introduced to form a P-type impurity layer. The experimental condition is 2 × 20 ²⁰
Using a BSG film containing boron at a relatively low concentration of about cm ^-3 as a diffusion source, thermal diffusion treatment is performed in an atmosphere containing only 10% hydrogen (H ₂ ) at a temperature of about 1000 ° C. and nitrogen gas only. 30
It took about a minute. In FIG. 1, the results in the case of an atmosphere containing hydrogen are shown by dotted lines, and the results in the case of not containing hydrogen are shown by solid lines.

As is clear from FIG. 1, when boron is thermally diffused into silicon in an atmosphere containing hydrogen, the surface concentration of boron on the silicon substrate becomes higher than that in the case where hydrogen is not contained. This is because, by using a gas containing hydrogen as a diffusion atmosphere, the diffusion coefficient in the BSG film and the BSG film /
This is because the segregation coefficient at the silicon interface increases, and the concentration of boron on the silicon surface increases. The present invention has been found for the first time to be able to increase the segregation coefficient by employing a gas containing hydrogen as the diffusion atmosphere. Further, as is clear from FIG. 1, a peak value of the boron concentration is obtained in an extremely shallow region of the silicon substrate.

From these facts, if a BSG film containing boron at a high concentration of 10 ²¹ cm ^-3 or more is used as a diffusion source, the source and drain regions of the field effect transistor having the LDD structure can be used even in thermal diffusion processing at a relatively low temperature. 0.15
It can be formed with a very shallow junction depth of less than μm. In particular, to form such a shallow junction layer,
The hydrogen concentration in the atmosphere is preferably 2% or more and 60% or less, particularly preferably 5% or more and 40% or less, and more preferably 5% or more and 20% or less. The reason is that it is desirable to set the hydrogen concentration in this range because the segregation coefficient can be increased. In addition, if it is lower than 2%, it takes too much time to obtain a desired bonding layer, which is not practical in manufacturing. If it is higher than 60%, the atmosphere becomes extremely explosive due to heat during diffusion, which is dangerous. In addition, since the impurity diffusion process is performed at a relatively low temperature for a long time, a desired impurity layer can be formed more stably than when the diffusion is performed in a short time.

Therefore, even in a low-temperature diffusion process, an impurity layer having a sufficiently high concentration and an extremely shallow junction depth can be stably formed.

Next, one manufacturing method for manufacturing a MOS type FET using the solid state diffusion method according to one embodiment of the present invention will be described with reference to a manufacturing process sectional view shown in FIG.

First, a field insulating film 12 serving as an element isolation region is selectively formed on an n-type single-crystal silicon substrate 11 by a conventional selective oxidation method. As a result, an element formation region surrounded by the field insulating film 12 is formed. Subsequently, a silicon substrate on the element region is thermally oxidized to form an oxide film, and a polycrystalline silicon film is deposited and formed on the oxide film. Thereafter, using the resist pattern as a mask, a part of the oxide film and the polycrystalline silicon film deposited and formed on the silicon substrate 11 are removed by etching. Thus, a gate electrode 14 made of a polycrystalline silicon film is formed on the silicon substrate 11 via the gate oxide film 13. Subsequently, a silicon oxide film 15 is deposited and formed on the entire surface by a CVD method, and a part of the silicon oxide film 15 is etched by a sidewall remaining technique, so that the silicon oxide film 15 remains only on the sidewall of the gate electrode 14. (FIG. 2A).

Next, a BSG film 16 containing boron at a concentration of about 5 × 10 ²¹ cm ⁻³ or more is deposited and formed on the entire surface by, eg, CVD (FIG. 2B).

Next, heat treatment is performed at a relatively low temperature of, for example, about 900 ° C. for 30 minutes in an atmosphere of, for example, nitrogen gas containing hydrogen. As a result, boron in the BSG film 16 is
Thermal diffusion to the silicon substrate 11 on both sides of the gate electrode 14.
In the P, the source and drain regions having an impurity concentration of about 10 ²⁰ cm ^{-3 and} an extremely shallow junction depth of about 0.15 μm are formed.
A type impurity layer 17 is formed. During this thermal diffusion, boron in the BSG film 16 is diffused into the gate electrode 14 made of a polycrystalline silicon film, and the gate electrode 14 becomes a low-resistance P-type silicon film. Note that the processing temperature in the above heat treatment is too low, the diffusion is insufficient and a desired impurity concentration cannot be obtained.On the other hand, if the temperature is too high, the controllability of the diffusion deteriorates, and the practical temperature range is 700 to 1100. The temperature may be selected in the range of about ° C (FIG. 2 (c)).

Finally, after a silicon oxide film 18 is deposited and formed on the front surface by the CVD method, contact holes for forming electrodes are formed in the silicon oxide film 18 and the BSG film 16. Subsequently, the electrode wiring 19 is formed of a metal such as aluminum or molybdenum to complete a P-channel MOS type FET (FIG. 2 (d)).

Note that, in the above embodiment, the step of diffusing boron from the BSG film 16 and then leaving the BSG film 16 was shown, but the BSG film 16 is peeled and removed with a diluted hydrofluoric acid solution or the like. Is also good.

As described above, by using the solid-phase diffusion method according to one embodiment of the present invention, a transistor having a high-concentration and extremely shallow junction source and drain regions can be easily manufactured. Further, even if the heat treatment temperature is lowered within the above-described range, if the impurity concentration of the diffusion source is increased, a sufficient impurity concentration can be ensured. Can be manufactured. Therefore, the solid-phase diffusion method of the present invention is a very effective diffusion method for miniaturizing elements.

The present invention is not limited to the above embodiment, and the gas in the diffusion atmosphere may be an inert gas such as argon or helium containing hydrogen. In the above embodiment, the solid-phase diffusion method of the present invention is applied to diffusion at the surface of the silicon substrate. However, it is also possible to apply the method to diffusion to a three-dimensional surface such as a sidewall of a groove. Even in this case, the impurities can be introduced at a high concentration and uniformly.

[Effects of the Invention] As described above, according to the present invention, the thermal diffusion process is performed in an atmosphere containing hydrogen, so that the diffusion coefficient of the impurity in the diffusion source and the diffusion source and diffusion layer Can be increased even in the heat treatment at a relatively low temperature. This makes it possible to stably form an impurity layer having a high surface concentration and an extremely shallow junction depth. As a result, it is possible to provide a solid-phase diffusion method capable of achieving ultra-high density and ultra-high integration of a semiconductor device.

[Brief description of the drawings]

FIG. 1 is a diagram showing a relationship between a junction depth of an impurity layer and an impurity concentration in a solid-phase diffusion method according to one embodiment of the present invention;
FIG. 2 is a process sectional view showing a method for manufacturing a semiconductor device to which the solid-phase diffusion method of the present invention is applied. 11 silicon substrate, 12 field oxide film, 13 gate oxide film, 14 gate electrode, 15 silicon oxide film, 16 BSG film, 17 impurity layer, 18 silicon oxide Membrane, 19 ... Electrode wiring.

 ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Yoshitaka Tsunashima 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki-shi, Kanagawa Prefecture Toshiba Research Institute, Inc. (56) References JP-A-63-226920 (JP, A) JP-A Sho 50-117374 (JP, A) JP-A-51-108572 (JP, A)

Claims (2)

(57) [Claims] 1. A step of depositing a film containing boron of 10 ²¹ cm ^-3 or more on a semiconductor layer and directly depositing the film, followed by a hydrogen concentration of 5% to 40% and a diffusion temperature of 700 ° C. Diffusing boron contained in the film into the semiconductor layer by heat treatment in an atmosphere at 1100 ° C. to introduce the boron into the semiconductor layer. 2. The method according to claim 1, wherein said hydrogen concentration is 5% to 20%.
The solid phase diffusion method as described.