JPH01232737A - Manufacture of semiconductor element - Google Patents

Manufacture of semiconductor element

Info

Publication number
JPH01232737A
JPH01232737A JP5847988A JP5847988A JPH01232737A JP H01232737 A JPH01232737 A JP H01232737A JP 5847988 A JP5847988 A JP 5847988A JP 5847988 A JP5847988 A JP 5847988A JP H01232737 A JPH01232737 A JP H01232737A
Authority
JP
Japan
Prior art keywords
oxide film
layer
boron
diffusion
type epitaxial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5847988A
Other languages
Japanese (ja)
Inventor
Mamoru Shinohara
衛 篠原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP5847988A priority Critical patent/JPH01232737A/en
Publication of JPH01232737A publication Critical patent/JPH01232737A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To restrain the diffusion amount of an impurity diffused layer in the lateral direction and to augment the integration by a method wherein an N type epitaxial layer is selectively oxidized using a nitride film on an impurity diffused layer as a mask to advance the diffusion of the impurity diffused layer as well as an oxide film is formed on a substrate. CONSTITUTION:The surface of an N type epitaxial layer 11 in the region wherefrom a nitride film 14 is etched away is etched in around 1mum and simultaneously a boron diffused layer 13 diffused in the etching region is further etched away. Next, after removing a photoresist 15 using an organic solution, the layer 11 is selectively oxidized using the nitride film 14 as a mask. Thus, the boron diffused layer 13 is further diffused reaching a P type substrate 10 to isolate the N type epitaxial layer simultaneously forming an oxide film 16 in around 2mum in the selective oxide region on the N type epitaxial layer 11. The diffusion coefficient in the boron oxide film 16 being larger than that in silicon, the boron on the interface oxide film 16 is absorbed into the oxide film 16 during the deposition of the oxide film 16 so that the boron concentration in the boron diffused layer 13 near the oxide film 16 in the selective oxide region may be reduced to decrease the diffusion amount in the lateral direction.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体素子の製造方法に関するものである。[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

〔従来の技術〕[Conventional technology]

従来、この種の製造方法は、「昭和61年度電子通信学
会総合全国大会講演論文集9分冊2:・そ−)2.N1
1504高酎圧BiCMO8の検討、第2−262頁」
に開示されるものがあシ、第2図にその工程図を示して
説明する。
Conventionally, this type of manufacturing method was used in the 1986 IEICE General National Conference Lecture Proceedings Volume 9 Volume 2:・So-)2.N1
1504 Study of high alcohol pressure BiCMO8, pp. 2-262.”
The method disclosed in 2003 is described below with reference to a process diagram shown in FIG.

先ず、第2図(aJに示す如く、P型基板1上に形成さ
れたN型エピタキシャル層2の所定部表面上に、拡散窓
3aを開口した表面酸化膜3を拡散マスクとして、10
00℃のBC4s、?’h及び02の混合ガス雰囲気で
P型不純物のボロンを拡散し、ゾロン拡散層4を形成す
る。
First, as shown in FIG. 2 (aJ), on the surface of a predetermined portion of the N-type epitaxial layer 2 formed on the P-type substrate 1, a surface oxide film 3 with a diffusion window 3a opened therein was used as a diffusion mask, and 10
BC4s at 00℃? Boron as a P-type impurity is diffused in a mixed gas atmosphere of 'h and 02 to form a zolon diffusion layer 4.

その後、第2図(b)に示す如く、上記P型基板1表面
に形成されたボロンガラスを、弗酸系溶液で除去した後
、アニール処理を行ない、ボロン拡散層(不純物層)4
を、P型基板1に到達させて、N型工2タキシャル層2
t−電気的に分離していた。
Thereafter, as shown in FIG. 2(b), after removing the boron glass formed on the surface of the P-type substrate 1 with a hydrofluoric acid solution, an annealing treatment is performed to form a boron diffusion layer (impurity layer) 4.
reaches the P-type substrate 1, and the N-type substrate 2 taxial layer 2
t - electrically isolated.

この場合、アニール処理条件は、N型エピタキシャル層
2の厚ざが厚くなるに伴い高温・長時間が必要となる。
In this case, as the thickness of the N-type epitaxial layer 2 increases, the annealing treatment conditions require a high temperature and a long time.

例えば、N型エピタキシャル層2の厚さAが13μm程
度の場合、1200℃で5時間程度の熱処理が必要であ
る。
For example, when the thickness A of the N-type epitaxial layer 2 is about 13 μm, heat treatment at 1200° C. for about 5 hours is required.

し発明が解決しようとする課題〕 然し乍ら、上述した従来方法においては、熱処理中に、
ボロン拡散層4Vi、横方向にも拡散し、ご(″)拡が
シ幅Bは、縦方向の拡がシ幅A、即ちN型エピタキシャ
ル層2の厚さの概ね0.8倍である。
[Problems to be Solved by the Invention] However, in the above-mentioned conventional method, during heat treatment,
The boron diffusion layer 4Vi is also diffused in the lateral direction, and its width B is approximately 0.8 times the width A in the vertical direction, that is, the thickness of the N-type epitaxial layer 2.

従で・て、約13μmのN型エピタキシャル層2を分店
する不純物層4の横方向の拡がυ幅Bは、約10μmで
ある。よって、分離層、所謂不純物層4の幅は、拡散マ
スクに用いた表面酸化膜3に開口した拡散領域の拡散窓
3aの幅に20μmを加えた、大きな値となう、素子の
微細化が困難になるという問題点があった。
Therefore, the lateral width υ width B of the impurity layer 4 dividing the N-type epitaxial layer 2 of about 13 μm is about 10 μm. Therefore, the width of the separation layer, the so-called impurity layer 4, is a large value equal to the width of the diffusion window 3a of the diffusion region opened in the surface oxide film 3 used as a diffusion mask plus 20 μm. The problem was that it was difficult.

本発明は、上述の問題点に鑑み、不純物層の横方向への
拡散を抑えると共に、分離領域の面積を小さくして、素
子の微細化ができる半導体素子の製造方法を提供するも
のである。
In view of the above-mentioned problems, the present invention provides a method for manufacturing a semiconductor device that suppresses lateral diffusion of an impurity layer, reduces the area of an isolation region, and allows miniaturization of the device.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、上述した目的を達成するため、基板上の所定
部に、不純物拡散層を形成する工程と、該不純物拡散層
の全部又は部分上に、窒〔ヒ膜を形成する工程と該窒化
膜をマスクとして、上記基板表面を、上記不純物拡散層
の厚さ以上エツチング除去する工程と、上記窒化膜をマ
スクとして、選択酸化して、上記不純物拡散層の拡散を
進行させると共に、上記基板上に、酸化膜を形成する工
程と、その後、上記窒化膜を除去する工程とを含むもの
である。
In order to achieve the above-mentioned object, the present invention comprises a step of forming an impurity diffusion layer on a predetermined portion of a substrate, a step of forming a nitride film on all or a portion of the impurity diffusion layer, and a step of forming an impurity diffusion layer on a predetermined portion of a substrate. Using the film as a mask, the surface of the substrate is etched to a thickness equal to or greater than the thickness of the impurity diffusion layer. Using the nitride film as a mask, selective oxidation is performed to progress the diffusion of the impurity diffusion layer, and the surface of the substrate is etched. The method includes a step of forming an oxide film, and then a step of removing the nitride film.

〔作 用〕[For production]

本発明においては、不純物拡散層上の窒fヒ膜全マスク
として、選択酸化し、不純物拡散層の拡散を進行させる
と共に、基板上に酸rヒ膜を形成するので、基板は分離
し、且つ酸化膜界面の不純物は酸化膜中VC吸い込まれ
、酸化膜近傍の不純物拡散層の不純物濃度が/」・さく
なり、不純物拡散層の横方向への拡散量は減少する。
In the present invention, selective oxidation is performed as a full mask of the nitride arsenic film on the impurity diffusion layer to promote diffusion of the impurity diffusion layer, and an oxide arsenic film is formed on the substrate, so that the substrate is separated and The impurities at the oxide film interface are sucked into the oxide film by VC, the impurity concentration of the impurity diffusion layer near the oxide film becomes low, and the amount of lateral diffusion of the impurity diffusion layer decreases.

〔実施例〕〔Example〕

以下、本発明方法に係る一実施例全、第1図にその工程
図を示して説明する。
Hereinafter, one embodiment of the method of the present invention will be described with reference to a process diagram shown in FIG.

先ず、第1図(aJに示す如く、P型基板10上の濃度
がI X 1015cm−3で6〜8μ属厚のN型エピ
タキシャル層ll上に、所定部に拡散窓12aを開口し
た表面酸化膜12をマスクとして、ゾロンを含んだ雰囲
気中で熱処理を行ない、高濃度のボロン拡散JWJ13
を形成する。その際、ボロン拡散層13の濃度は、約I
 X 10”〜8 X 1021α−3程度である。
First, as shown in FIG. 1 (aJ), on the N-type epitaxial layer 11 with a concentration of I x 1015 cm-3 and a thickness of 6 to 8 μm on the P-type substrate 10, a surface oxidation film was formed with a diffusion window 12a opened at a predetermined portion. Using the film 12 as a mask, heat treatment is performed in an atmosphere containing zolon to diffuse high concentration boron JWJ13
form. At that time, the concentration of the boron diffusion layer 13 is approximately I
It is approximately X 10'' to 8 X 1021α-3.

次(で、第1図(b)に示す如く、表面酸fヒ膜12を
弗酸系浴液で除去した後、N型エピタキシャル層11上
に、CVD法を以て1000〜2000′:A厚の窒f
ヒ膜14を形成する。その後、ホトリソ技術を以てボロ
ン拡散層13上の窒化膜14の所定部に、例えばEam
幅で5000〜10000 A厚のホトレジスト15を
形成する。
Next, as shown in FIG. 1(b), after removing the surface oxidized arsenic film 12 with a hydrofluoric acid bath, a layer of 1000 to 2000':A thickness is deposited on the N-type epitaxial layer 11 using the CVD method. nitrogen f
A fillet film 14 is formed. Thereafter, using photolithography, a predetermined portion of the nitride film 14 on the boron diffusion layer 13 is coated with, for example, EAM.
A photoresist 15 having a width of 5,000 to 10,000 Å thick is formed.

その後、第1図(C)に示す如く、上記基板10を、高
周波放電等で活性化した弗素系ガス中に挿入して、窒化
膜14をエツチング除去する。
Thereafter, as shown in FIG. 1C, the substrate 10 is inserted into a fluorine-based gas activated by high frequency discharge or the like, and the nitride film 14 is etched away.

続いて、第1図(d)に示す如く、窒化膜14’tエツ
チング除去した領域のN型エピタキシャル層11の表面
を、約1μmエツチング除去すると同時に、エツチング
領域に拡散されていたボロン拡散層13も除去する。尚
、この場合、窒化膜14のエツチング除去と同様に、活
性化された弗素系ガスによるシリコンの気化現象を利用
しても良く、若しくは、エツチング後残留した窒化膜1
4をマスクとして、アルカリ系溶液にてシリコンの溶融
現象を利用しても良い。
Subsequently, as shown in FIG. 1(d), the surface of the N-type epitaxial layer 11 in the region where the nitride film 14't has been etched is removed by etching by approximately 1 μm, and at the same time, the boron diffusion layer 13 that had been diffused in the etched region is removed. Also removes. In this case, similarly to the etching removal of the nitride film 14, the vaporization of silicon by activated fluorine gas may be used, or the nitride film 1 remaining after etching may be removed.
4 may be used as a mask and the melting phenomenon of silicon may be utilized in an alkaline solution.

次に、第1図(e)に示す如く、ホトレジスト15を有
機溶液で除去した後、窒化膜14をマスクとして、選択
酸fヒを、例えば1200℃の水蒸気雰囲気中で約5時
間程度行なう。斯くして、ゾロン拡散層13の拡散が進
行して、P型基板10に到達し、N型エピタキシャル層
11′f!:分離すると共に、N型エピタキシャル層1
1上の選択酸化領域に、約2μmの酸化膜16が形成さ
れる。ボロンの酸fヒ膜16中の拡散係数は、シリコン
中の拡散係数よシ大きいため、酸fヒ膜16の成長時に
、酸化膜16界面のボロンが酸化膜16中に吸い上げら
れ、選択酸化領域の酸化膜16近傍のゴロン拡散層13
のポロン濃度は小さくなシ、横方向への拡散量は減少す
る。よりて、ポロン拡散層13の横方向への拡がシ幅C
は小さくなシ、例えば、本実施例の場合、約5μ轟とな
る。
Next, as shown in FIG. 1(e), after removing the photoresist 15 with an organic solution, using the nitride film 14 as a mask, selective acid atomization is performed for about 5 hours in a steam atmosphere at 1200 DEG C., for example. In this way, the diffusion of the zolon diffusion layer 13 progresses and reaches the P-type substrate 10, and the N-type epitaxial layer 11'f! : Separation and N-type epitaxial layer 1
An oxide film 16 having a thickness of approximately 2 μm is formed in the selective oxidation region on the oxide film 1 . The diffusion coefficient of boron in the arsenic oxide film 16 is larger than that in silicon, so when the arsenic oxide film 16 grows, boron at the interface of the oxide film 16 is absorbed into the oxide film 16, and the selective oxidation area Goron diffusion layer 13 near the oxide film 16 of
As the poron concentration becomes smaller, the amount of lateral diffusion decreases. Therefore, the width C of the poron diffusion layer 13 in the lateral direction is
is small, for example, in the case of this embodiment, about 5μ.

しかる後、第1図(fJK示す如く、選択酸化のマスク
として用いた窒化膜14を、例えば、170℃程度のリ
ン酸溶液にて除去し、半導体素子を完成する。
Thereafter, as shown in FIG. 1 (fJK), the nitride film 14 used as a mask for selective oxidation is removed using, for example, a phosphoric acid solution at about 170° C. to complete the semiconductor device.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、不純物拡散層上の
窒化膜をマスクとして、選択酸化し、不純物拡散層の拡
散を進行させ、且つ基板上に、酸化膜を形成するので、
酸化膜界面の不純物は、酸化膜中に吸い込まれると共に
、不純物拡散層の横方向への拡散量が抑制され、不純物
拡散層(分離領域)の面積が小はくなり、素子の微絽化
に伴い集積度が向上できる。又、エツチング除去した基
板表面に、選択酸化を行なうので、基板表面が平坦化で
きる等の特有の効果によシ上述の課題を解決し得る。
As explained above, according to the present invention, selective oxidation is performed using the nitride film on the impurity diffusion layer as a mask to advance diffusion of the impurity diffusion layer, and an oxide film is formed on the substrate.
Impurities at the oxide film interface are sucked into the oxide film, and the amount of diffusion in the lateral direction of the impurity diffusion layer is suppressed, reducing the area of the impurity diffusion layer (separation region) and making the device smaller. Accordingly, the degree of integration can be improved. Further, since selective oxidation is performed on the surface of the substrate that has been removed by etching, the above-mentioned problem can be solved by the unique effect that the surface of the substrate can be flattened.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明方法に係る一実施例の工程図、第2図は
従来方法の工程図である。 lO・・・P型基板、11・・・N型エピタキシャル層
、12・・・表面酸化膜、12a・・・拡散窓、13・
・・ポロン拡散層、14・・・窒化膜、15・・・ホト
レノスト、16・・・酸化膜。 特許出願人 沖電気工業株式会社 第1図 第1図
FIG. 1 is a process diagram of an embodiment of the method of the present invention, and FIG. 2 is a process diagram of a conventional method. lO...P type substrate, 11...N type epitaxial layer, 12...surface oxide film, 12a...diffusion window, 13...
... Poron diffusion layer, 14... Nitride film, 15... Photorenost, 16... Oxide film. Patent applicant: Oki Electric Industry Co., Ltd. Figure 1 Figure 1

Claims (1)

【特許請求の範囲】  基板上の所定部に、不純物拡散層を形成する工程と、 該不純物拡散層の全部又は部分上に、窒化膜を形成する
工程と、 該窒化膜をマスクとして、上記基板表面を、上記不純物
拡散層の厚さ以上エッチング除去する工程と、 上記窒化膜をマスクとして、選択酸化して、上記不純物
拡散層の拡散を進行させると共に、上記基板上に、酸化
膜を形成する工程と、 その後、上記窒化膜を除去する工程とを含むことを特徴
とする半導体素子の製造方法。
[Claims] A step of forming an impurity diffusion layer at a predetermined portion on a substrate; a step of forming a nitride film on all or part of the impurity diffusion layer; and a step of forming an impurity diffusion layer on the substrate using the nitride film as a mask. etching the surface to a thickness greater than the thickness of the impurity diffusion layer; selectively oxidizing the nitride film using the nitride film as a mask to advance diffusion of the impurity diffusion layer and forming an oxide film on the substrate; A method for manufacturing a semiconductor device, comprising: a step of removing the nitride film.
JP5847988A 1988-03-14 1988-03-14 Manufacture of semiconductor element Pending JPH01232737A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5847988A JPH01232737A (en) 1988-03-14 1988-03-14 Manufacture of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5847988A JPH01232737A (en) 1988-03-14 1988-03-14 Manufacture of semiconductor element

Publications (1)

Publication Number Publication Date
JPH01232737A true JPH01232737A (en) 1989-09-18

Family

ID=13085567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5847988A Pending JPH01232737A (en) 1988-03-14 1988-03-14 Manufacture of semiconductor element

Country Status (1)

Country Link
JP (1) JPH01232737A (en)

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