JPS5958845A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5958845A
JPS5958845A JP57169258A JP16925882A JPS5958845A JP S5958845 A JPS5958845 A JP S5958845A JP 57169258 A JP57169258 A JP 57169258A JP 16925882 A JP16925882 A JP 16925882A JP S5958845 A JPS5958845 A JP S5958845A
Authority
JP
Japan
Prior art keywords
stem
cap
circumferential surface
glass
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57169258A
Other languages
Japanese (ja)
Inventor
Shoji Onodera
小野寺 庄治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP57169258A priority Critical patent/JPS5958845A/en
Publication of JPS5958845A publication Critical patent/JPS5958845A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the generation of glass cracks on the resistance welding of both a circumferential surface on the side, to which a lead wire for a stem is sealed and attached, and the inner surface of a cap by forming a minute clearance between both. CONSTITUTION:With a stem proper 3, the center of a cricumferential surface on the reverse side to a glass sealing section is a point O, the center of the side circumferential surface of the glass sealing section is a point O', and both centers are displaced only by size (a). When the stem 3 is covered with the cap 2, the minute clearance ( a) is generated between the circumferential surface on the glass sealing section side and the inner surface of the cap. When the stem 1 and the cap 2 are resistance-welded under the state, the push of the circumferential surface of the stem by the inner surface of the cap is prevented, stress to glass is obviated, and the generation of cracks can be obstructed.

Description

【発明の詳細な説明】 技術分野 この発明は金属ステムと金属キャップを抵抗溶接してな
るカンケース内に半導体素子を封止した半導体装置の製
造方法に関し、特に前記ステムとキャップの溶接方法に
関する。
TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device in which a semiconductor element is sealed in a can case formed by resistance welding a metal stem and a metal cap, and more particularly to a method for welding the stem and the cap.

背景技術 パワートランジスタ等の半導体装置には、樹脂封止型の
ものと、カンケース型のものとがある。
BACKGROUND ART Semiconductor devices such as power transistors are classified into resin-sealed type and can case type.

後者のカンケース型のものはhU者に比較して高信頼性
を有し、各種の構造のもの−がある。例えば電力が数ワ
ット以下の場合は、一般に第1図および第2図に示す構
造を有する。第1図はキャップを高さ方向の途中から切
断した平面図であり、第2図は第1図の■−■線に沿う
1191面図である。図において、lはステムで、キャ
ップ2と抵抗溶接されてカンケースを構成している。前
記ステムlは、鉄またはコバールよりなる円形のステム
本体3の下端周縁にキャップ溶接用のフランジ4全有し
、周縁近傍に2個の透孔5,5を有する。前記各透孔5
,5内にはソーダガラス、ホウケイ酸ガラス等よりなる
カラス6.6を介して、鉄・ニッケル合金’A 捷たは
フバール製のリード線7,7気密にしかもステ八本体3
と電気的に絶縁して封着されている。8はステム本体3
の上面に半田等によって固k gれなトランジスタ等の
半導体素子、9゜9は半導体素子8の上面電極とリード
線7,7とを結ぶアルミニウム、金等よりなる金属細線
である。
The latter can case type has higher reliability than the hU type, and there are various types of structures. For example, when the power is several watts or less, the structure generally shown in FIGS. 1 and 2 is used. FIG. 1 is a plan view of the cap cut from the middle in the height direction, and FIG. 2 is a 1191-plane view taken along the line ■-■ in FIG. In the figure, l is a stem, which is resistance welded to the cap 2 to form a can case. The stem 1 has a flange 4 for cap welding on the lower end periphery of a circular stem body 3 made of iron or Kovar, and has two through holes 5 near the periphery. Each of the through holes 5
, 5, through a glass 6.6 made of soda glass, borosilicate glass, etc., lead wires 7, 7 made of iron-nickel alloy 'A' or Fvar are connected in an airtight manner, and the main body 3 of the stator 8
electrically insulated and sealed. 8 is the stem body 3
A semiconductor element such as a transistor is fixed to the upper surface by solder or the like, and 9.9 is a thin metal wire made of aluminum, gold, etc. that connects the upper electrode of the semiconductor element 8 and the lead wires 7, 7.

上記ステム1のステム本体3のフランジ部4を除く直径
寸法は、例えば7.6 m−程度であり、ステム本体3
の周面とリード線7,7を封着している透孔5,5との
間隔寸法は、1m以下の非常に小さいものとなっている
。このため、ステム1とキャップ2とを抵抗溶接する際
に、牛ヤツブ2の内壁とステム1で分流を起すと、ガラ
ス6.6にクランクが入り、気密劣化が生じる。このよ
うな問題を解決する一つの手段として、キャップ2の7
ランジ10の下面にプロジェクションを設けて、溶接条
件を低くすることが考えられているが、完全にカラスク
ラックをなくすことができなかった。
The diameter of the stem body 3 of the stem 1 excluding the flange portion 4 is, for example, about 7.6 m.
The distance between the circumferential surface and the through holes 5, 5 sealing the lead wires 7, 7 is very small, 1 m or less. Therefore, when the stem 1 and the cap 2 are resistance welded, if the flow is divided between the inner wall of the beef goat 2 and the stem 1, the glass 6.6 will be cranked and the airtightness will deteriorate. As one means to solve such problems, 7 of cap 2
Although it has been considered to lower the welding conditions by providing a projection on the lower surface of the lunge 10, it has not been possible to completely eliminate crow cracks.

また、溶接電極の精度にも限度があり、解決策が見い出
せなかった。
Additionally, there were limits to the accuracy of the welding electrode, and no solution could be found.

発明の開示 それゆえ、この発明は上記のステムとキャップの抵抗溶
接時にカラスクラックを生じない製造方法、特に溶接方
法を提供することを目的とする。
DISCLOSURE OF THE INVENTION Therefore, it is an object of the present invention to provide a manufacturing method, particularly a welding method, that does not cause crow cracks during resistance welding of the stem and cap.

この発明はステムのリード線を封着した側の周面とキャ
ップ内面との間に微小間隙を設けた状態で、ステムとキ
ャップとを抵抗溶接することを特徴とするものである。
This invention is characterized in that the stem and the cap are resistance welded with a minute gap provided between the circumferential surface of the stem on the side where the lead wires are sealed and the inner surface of the cap.

すなわち、抵抗溶接時にガラスクラックが発生する原因
は、キャップの内面がステムのガラス封着部の周面を押
圧することによって生ずるものであり、ステムのリード
線到着側の周面とキャップの内面との間に微小間隙を設
けた状態で両者を抵抗溶接することにより、キャップ内
面によるステム周面の押圧を防止し、もってガラスに応
力を学えないようにして、ガラスクランクを防止すると
いう作用効果を奏するものである。
In other words, glass cracks occur during resistance welding because the inner surface of the cap presses against the circumferential surface of the glass sealing part of the stem, and the inner surface of the cap and the circumferential surface of the stem on the lead wire arrival side are By resistance welding the two with a small gap between them, the inner surface of the cap prevents the circumferential surface of the stem from being pressed, which prevents stress from being applied to the glass and prevents glass cranking. It is something that plays.

以下、この発明の実施例を図面を参照して説明する。第
3図はこの発明により製造した半導体装置のキャップを
高ざ方向の中途から切断Let平面図を示す。図におい
て、次の点を除いては第1図および第2図と同様であり
、同一部分または対応部分には同−姦1i(4Qdυを
(t してその説明を省略する。第1図および第2図に
示す半導体装置との相違点は、ステム本体3の形状にあ
る。すなわち、第3図の半導体装置のステム本体3は、
ガラス封着部と反対側の周面の中心点がOにあるのに対
し、ガラス封着部側の周面の中心点は、前記中心点Oよ
りもガラス封着部と反対側に寸法aたけずれたO′にあ
ることであり、正円形状に形成されていないことである
。L7Thがって、ステム本体3にキャップ2を被せた
とき、ステム本体3のガラス封着部側の周面とキャップ
2の内面との間に微小間隙A(=:a)が形成される。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 3 shows a plan view of the cap of the semiconductor device manufactured according to the present invention, cut from halfway in the height direction. The figure is the same as FIGS. 1 and 2 except for the following points, and the same or corresponding parts are shown as (t) and their explanation will be omitted. The difference from the semiconductor device shown in FIG. 2 lies in the shape of the stem body 3. That is, the stem body 3 of the semiconductor device shown in FIG.
The center point of the circumferential surface on the side opposite to the glass sealing section is at O, whereas the center point of the circumferential surface on the side of the glass sealing section is located at a dimension a on the side opposite to the glass sealing section from the center point O. The reason is that it is at an offset O', and that it is not formed in a perfect circular shape. L7Th, when the cap 2 is placed on the stem body 3, a minute gap A (=:a) is formed between the circumferential surface of the stem body 3 on the side of the glass sealing part and the inner surface of the cap 2.

このように、ステム本体3の周面とキャップ2の内面と
の間に微小間隙を設けた状態でステム1とキャップ2と
を抵抗溶接すると、溶接時にキャップ2やステム本体3
に分流が生じても、キャップ2の内面がステム本体3の
周面を強く押圧することが防止され、ガラスに無理な力
が加わらなくなるため、ガラスクラックの発生が防止で
きる。
In this way, when the stem 1 and the cap 2 are resistance welded with a small gap provided between the circumferential surface of the stem body 3 and the inner surface of the cap 2, the cap 2 and the stem body 3 are
Even if a shunt occurs, the inner surface of the cap 2 is prevented from strongly pressing the circumferential surface of the stem body 3, and as no unreasonable force is applied to the glass, the occurrence of glass cracks can be prevented.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図はこの発明の背景となる半導体装置
を示し、第1図はキャップを旨さ方向の中途より切断し
た平面図で、第2図は第1図の」−U線に沿う断面図で
ある。第3図はこの発明の製造方法によって製造された
半導体装置のキャップを高さ方向の中途より切断した平
面図である。 l・・・・・ステム、 2・・・・・・キャップ、 3・・・・ ステム本体、 6・・・・ ガラス、 7・・・・リード系中。 、m−7,、−。 特許出願人   新日本電気株式会社 、′1.パ。 3・、。 −−KL′ 第1図 第2図 第3図 ]
1 and 2 show a semiconductor device which is the background of the present invention, FIG. 1 is a plan view of the cap cut from the middle in the direction of the taste, and FIG. 2 is taken along the -U line of FIG. FIG. FIG. 3 is a plan view of the cap of the semiconductor device manufactured by the manufacturing method of the present invention, cut from the middle in the height direction. l... Stem, 2... Cap, 3... Stem body, 6... Glass, 7... Lead system inside. , m-7,, -. Patent applicant: Nippon Electric Co., Ltd., '1. Pa. 3.. --KL' Figure 1, Figure 2, Figure 3]

Claims (1)

【特許請求の範囲】 1、 周縁部近傍の透孔内にガラスを介してリード線を
気密絶縁的に封着した円形のステムに円形のキャップを
抵抗溶接して固着封止する半導体装置の製造方法におい
て、 前記ステムのリード線を封着した側の周面とキャップ内
面との間に微小間隙を設けた状態で、ステムとキャップ
を抵抗溶接することを特徴とする半導体装置の製造方法
。 2 前記ステムのリード線を封着した側の周面の中心点
か゛、それと反対側の周面の中心点よりも偏心している
、特許請求の範囲第1項記載の半導体装置の製造方法。
[Claims] 1. Manufacture of a semiconductor device in which a circular cap is fixedly sealed by resistance welding to a circular stem in which a lead wire is hermetically and insulatively sealed through a glass in a through hole near the periphery. A method for manufacturing a semiconductor device, comprising: resistance welding the stem and the cap with a minute gap provided between the peripheral surface of the stem on the side where the lead wires are sealed and the inner surface of the cap. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the center point of the circumferential surface of the stem on the side to which the lead wire is sealed is more eccentric than the center point of the circumferential surface of the opposite side.
JP57169258A 1982-09-28 1982-09-28 Manufacture of semiconductor device Pending JPS5958845A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57169258A JPS5958845A (en) 1982-09-28 1982-09-28 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57169258A JPS5958845A (en) 1982-09-28 1982-09-28 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5958845A true JPS5958845A (en) 1984-04-04

Family

ID=15883168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57169258A Pending JPS5958845A (en) 1982-09-28 1982-09-28 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5958845A (en)

Similar Documents

Publication Publication Date Title
JP2003133497A (en) Thin semiconductor device
JPS5958845A (en) Manufacture of semiconductor device
US3931635A (en) Semiconductor device with a control electrode in pressure contact with the semiconductor disc
US3553828A (en) Lead assembly structure for semiconductor devices
JP2003179193A (en) Lead frame and manufacturing method thereof, resin- sealed semiconductor device and manufacturing and inspection methods thereof
JPH01257361A (en) Resin-sealed semiconductor device
JPS6138193Y2 (en)
JPS5932156A (en) Cap mounting structure for semiconductor device
JPH0358450A (en) Ceramic package of semiconductor device
JP2710515B2 (en) Lead frame for resin-sealed semiconductor device
JPH01124227A (en) Semiconductor device
JPH03129840A (en) Resin-sealed semiconductor device
JPS63226948A (en) Hybrid integrated device
JPS6011644Y2 (en) semiconductor equipment
JPH0498861A (en) Resin sealed type semiconductor device
JP2582534B2 (en) Method for manufacturing semiconductor device
JP2723855B2 (en) Method for manufacturing resin-encapsulated semiconductor device
JPH04321255A (en) Airtightly sealing method for semiconductor enclosure
JP2001035988A (en) Semiconductor device
JPH02109410A (en) Resin seal type semiconductor device
JPH06260528A (en) Semiconductor integrated circuit device
JPH031538U (en)
JPH02303056A (en) Manufacture of semiconductor integrated circuit
JPH0766231A (en) Manufacture of face mounting-type semiconductor device
JPS6056303B2 (en) Manufacturing method of semiconductor device