JPS63226948A - Hybrid integrated device - Google Patents

Hybrid integrated device

Info

Publication number
JPS63226948A
JPS63226948A JP62058883A JP5888387A JPS63226948A JP S63226948 A JPS63226948 A JP S63226948A JP 62058883 A JP62058883 A JP 62058883A JP 5888387 A JP5888387 A JP 5888387A JP S63226948 A JPS63226948 A JP S63226948A
Authority
JP
Japan
Prior art keywords
lid
package
hybrid integrated
electrodes
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62058883A
Other languages
Japanese (ja)
Inventor
Tomio Ito
伊藤 外美男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
New Japan Radio Co Ltd
Original Assignee
New Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by New Japan Radio Co Ltd filed Critical New Japan Radio Co Ltd
Priority to JP62058883A priority Critical patent/JPS63226948A/en
Publication of JPS63226948A publication Critical patent/JPS63226948A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0284Details of three-dimensional rigid printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/144Stacked arrangements of planar printed circuit boards

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To enhance the integration density without expanding an external shape by a method wherein a separate hybrid integrated circuit is constituted and a connecting electrode is installed at the inside face of a lid while another connecting electrode is installed at a package so that both connecting electrodes can be connected to each other by an airtight sealing operation of the lid and the package. CONSTITUTION:At a hybrid integrated device where a hybrid integrated circuit is constituted at an inside bottom 3a of a package 3 and the upper part is sealed airtightly by a lid 7, a separate hybrid integrated circuit is constituted at an inside face of the lid, and connecting electrodes 9 are installed; connecting electrodes 5 are also installed at the package 3; when the lid 7 and the package 3 are sealed airtightly, both connecting electrodes 9, 5 are connected mutually. For example, after individual prescribed electronic components have been connected to wiring patterns at an inside bottom 3a of the package 3 and other wiring patterns at an inside face 7a of the lid 7, a solder ring 6 is brought into coincidence with 9 stepped part 3b of the package 3. Then, the lid 7 is positioned and is put on the upper face of the solder ring 6; after that, the solder ring 6 is melted by heating; electrodes 4 and 8 for airtightness use and the connecting electrodes 5 and 9 are molten-bonded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、集積度を向上した混成集積装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a hybrid integrated device with an improved degree of integration.

〔従来技術〕[Prior art]

従来から混成集積回路は、第5図に示すようにパッケー
ジ本体1の配線パターンが形成された底面1aに半導体
素子等の回路構成部品を搭載接続して、その上面を蓋2
により気密封止して構成されている。従って、集積度は
底面1aの大きさのみによって決まり、それを増大する
にはパッケージ本体1そのものを大きくする必要があり
、外形の大形化を余儀なくされていた。
Conventionally, a hybrid integrated circuit has been constructed by mounting and connecting circuit components such as semiconductor elements on the bottom surface 1a of a package body 1 on which a wiring pattern is formed, as shown in FIG.
The structure is hermetically sealed. Therefore, the degree of integration is determined only by the size of the bottom surface 1a, and to increase it, it is necessary to increase the size of the package body 1 itself, which necessitates an increase in the external size.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、外形の大形化を伴うことなく集積度を
向上できるようにした混成集積装置を提供することであ
る。
An object of the present invention is to provide a hybrid integration device that can improve the degree of integration without increasing the external size.

〔発明の構成〕[Structure of the invention]

このために本発明は、パッケージ本体の内底に混成集積
回路を構成し上面を蓋で気密封止した混成集積装置にお
いて、 上記蓋の内面に別の混成集積回路を構成すると共に接続
電極を設け、且つ上記パッケージ本体にも接続電極を設
けて、上記蓋の上記パッケージ本体に対する気密封止に
より上記両接続電極が相互に接続されるように構成した
To this end, the present invention provides a hybrid integrated device in which a hybrid integrated circuit is formed on the inner bottom of a package body and the top surface is hermetically sealed with a lid, in which another hybrid integrated circuit is formed on the inner surface of the lid, and connection electrodes are provided. , and the package body is also provided with connection electrodes, and the two connection electrodes are connected to each other by hermetically sealing the lid to the package body.

〔実施例〕〔Example〕

以下、本発明の実施例について説明する。第1図は乃至
第4図は本発明の一実施例を説明するための図である。
Examples of the present invention will be described below. 1 to 4 are diagrams for explaining one embodiment of the present invention.

3はパンケージ本体であり、その凹形状の内底3aに電
子部品を搭載接続するための配線パターンを有し、また
その内底3aを囲む壁の上面段部3bの外隅には全周に
亘って気密封止電極4が形成され、同段部3bにおける
その電極4の内側には内底3aから引き出された接続電
極群5が適宜配置で形成されている。
Reference numeral 3 designates a pan cage main body, which has a wiring pattern for mounting and connecting electronic components on its concave inner bottom 3a, and has a wiring pattern on the outer corner of the upper step 3b of the wall surrounding the inner bottom 3a. A hermetic sealing electrode 4 is formed over the same, and a group of connection electrodes 5 drawn out from the inner bottom 3a are formed in an appropriate arrangement inside the electrode 4 in the same step portion 3b.

6はソルダリングであり、ペーストを有する半田板で成
り、上記上面段部3bの気密封止電極4に対応した外形
の気密封止用部6a、上記接続電極群5に対応した位置
・外形の接続電極用部6b、及び接続電極用部6bを気
密封止用部6aに接続する連結部6Cで構成されている
Reference numeral 6 denotes soldering, which is made of a solder plate with paste, and includes an airtight sealing part 6a with an outer shape corresponding to the airtight sealing electrode 4 of the upper step part 3b, and a position and outer shape corresponding to the connection electrode group 5. It is composed of a connecting electrode part 6b and a connecting part 6C that connects the connecting electrode part 6b to the hermetically sealing part 6a.

7はパッケージ本体3の上面を封止するための蓋であり
、その内面7aには電子部品を搭載接続するための配線
パターンが形成されている。そして、その内面7aの周
囲には上記した気密封止電極4に対応した形状の気密封
止電極8と内面の配線パターンに接続した接続電極群9
が形成されている。この接続電極群9は各電極の配置が
上記したパッケージ本体4の接続電極群5の各電極に対
応している。
Reference numeral 7 denotes a lid for sealing the upper surface of the package body 3, and a wiring pattern for mounting and connecting electronic components is formed on its inner surface 7a. Around the inner surface 7a, a hermetically sealed electrode 8 having a shape corresponding to the hermetically sealed electrode 4 described above and a connection electrode group 9 connected to the wiring pattern on the inner surface are provided.
is formed. The arrangement of each electrode in this connection electrode group 9 corresponds to each electrode in the connection electrode group 5 of the package body 4 described above.

さて、組み立てに当たっては、パッケージ本体3の内底
3aの配線パターンと蓋7の内面7aの配線パターンに
各々所定の電子部品を接続した後に、ソルダリング6を
そのパッケージ本体3の段部3bに合致させる。このと
き、ソルダリング6の接続電極用部6bがパンケージ本
体3の接続電極5に合致するように位置決めを行う。ま
た、このときソルダリング6の気密封止用部6aはパン
ケージ本体3の気密封止用電極4に合致する。
Now, in assembling, after connecting the predetermined electronic components to the wiring pattern on the inner bottom 3a of the package body 3 and the wiring pattern on the inner surface 7a of the lid 7, the solder ring 6 is aligned with the step 3b of the package body 3. let At this time, positioning is performed so that the connection electrode portion 6b of the solder ring 6 matches the connection electrode 5 of the pan cage body 3. Further, at this time, the hermetic sealing portion 6a of the solder ring 6 matches the hermetic sealing electrode 4 of the pan cage body 3.

次に、M7をその接続電極群9の個々の電極がバフケー
ジ本体3の接続電極群5の個々の電極に対応するように
位置決めした後に、ソルダリング6の上面に被せる。
Next, the M7 is positioned so that the individual electrodes of the connection electrode group 9 correspond to the individual electrodes of the connection electrode group 5 of the buff cage main body 3, and then placed on the upper surface of the solder ring 6.

そして、この後に熱を加えると、ソルダリング6の溶融
によって、気密用電極4と8、接続電極群5と9の対応
するものが溶着し、このときそのソルダリング6の連結
部6Cが溶解切断するので、気密封止用部6aから接続
電極用部6bが分離するようになる。
Then, when heat is applied after this, the solder ring 6 melts and the corresponding ones of the airtight electrodes 4 and 8 and the connection electrode groups 5 and 9 are welded together, and at this time, the connecting part 6C of the solder ring 6 is melted and cut. Therefore, the connection electrode portion 6b is separated from the hermetic sealing portion 6a.

従って、パッケージ本体3の内底3aに形成された回路
とM7の内面7aに形成された回路とが、接続電極群5
と9によって相互に接続され、しかもその接続部分の全
周囲が気密封止電極4と8によって封止されるようにな
る。
Therefore, the circuit formed on the inner bottom 3a of the package body 3 and the circuit formed on the inner surface 7a of M7 are connected to the connection electrode group 5.
and 9, and the entire periphery of the connected portion is sealed by hermetically sealed electrodes 4 and 8.

なお、本実施例の混成集積装置は、パッケージ本体3に
対して蓋7を正確な位置で嵌め込む必要があるが、これ
は両者間に凸部と凹部による位置決め部を設けたり、或
い−は蓋7の形状を非対称或いは台形等の方向性を持っ
た形状に形成して特定の方向でのみパッケージ本体3の
段部3bに嵌まり込むようにすれば良い。
In addition, in the hybrid stacking device of this embodiment, it is necessary to fit the lid 7 into the package body 3 at an accurate position, but this can be done by providing a positioning part with a convex part and a concave part between them, or by - Alternatively, the lid 7 may be formed into a directional shape such as an asymmetrical or trapezoidal shape so that it fits into the stepped portion 3b of the package body 3 only in a specific direction.

〔発明の効果〕〔Effect of the invention〕

以上から本発明によれば、蓋の内面にも混成集積回路を
構成することができるので、従来と同一の大きさであっ
ても集積度を大幅に向上させることができるようになる
As described above, according to the present invention, a hybrid integrated circuit can also be formed on the inner surface of the lid, so that the degree of integration can be significantly improved even if the size is the same as that of the conventional one.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の混成集積装置の分解説明図
、第2図は同実施例の蓋の内面の平面図、第3図は同実
施例のソルダリングの平面図、第4図は同実施例のパッ
ケージ本体の平面図、第5図は従来の混成集積装置の説
明図である。 1・・・パッケージ本体、2・・・蓋、3・・・パッケ
ージ本体、4・・・気密封止電極、5・・・接続電極群
、6・・・ソルダリング、7・・・蓋、8・・・気密封
止電極、9・・・接続電極群。 代理人 弁理士 長 尾 常 明 第3図 融 忙 第4図
FIG. 1 is an exploded explanatory view of a hybrid integration device according to an embodiment of the present invention, FIG. 2 is a plan view of the inner surface of the lid of the same embodiment, FIG. 3 is a plan view of soldering of the same embodiment, and FIG. This figure is a plan view of the package body of the same embodiment, and FIG. 5 is an explanatory diagram of a conventional hybrid integration device. DESCRIPTION OF SYMBOLS 1... Package main body, 2... Lid, 3... Package main body, 4... Hermetically sealed electrode, 5... Connection electrode group, 6... Soldering, 7... Lid, 8... Hermetic sealing electrode, 9... Connection electrode group. Agent Patent Attorney Tsuneaki Nagao Figure 3, Figure 4

Claims (1)

【特許請求の範囲】[Claims] (1).パッケージ本体の内底に混成集積回路を構成し
上面を蓋で気密封止した混成集積装置において、 上記蓋の内面に別の混成集積回路を構成すると共に接続
電極を設け、且つ上記パッケージ本体にも接続電極を設
けて、上記蓋の上記パッケージ本体に対する気密封止に
より上記両接続電極が相互に接続されるように構成した
ことを特徴とする混成集積装置。
(1). In a hybrid integrated device in which a hybrid integrated circuit is configured on the inner bottom of a package body and the top surface is hermetically sealed with a lid, another hybrid integrated circuit is configured on the inner surface of the lid, and connection electrodes are provided, and also on the package body. A hybrid integrated device characterized in that a connection electrode is provided, and the two connection electrodes are connected to each other by hermetically sealing the lid to the package body.
JP62058883A 1987-03-16 1987-03-16 Hybrid integrated device Pending JPS63226948A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62058883A JPS63226948A (en) 1987-03-16 1987-03-16 Hybrid integrated device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62058883A JPS63226948A (en) 1987-03-16 1987-03-16 Hybrid integrated device

Publications (1)

Publication Number Publication Date
JPS63226948A true JPS63226948A (en) 1988-09-21

Family

ID=13097168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62058883A Pending JPS63226948A (en) 1987-03-16 1987-03-16 Hybrid integrated device

Country Status (1)

Country Link
JP (1) JPS63226948A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0713252A3 (en) * 1994-11-16 1998-01-07 Nec Corporation Circuit elements mounting
WO2001065604A3 (en) * 2000-02-28 2002-01-31 Ericsson Inc Functional lid for rf power package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0713252A3 (en) * 1994-11-16 1998-01-07 Nec Corporation Circuit elements mounting
WO2001065604A3 (en) * 2000-02-28 2002-01-31 Ericsson Inc Functional lid for rf power package

Similar Documents

Publication Publication Date Title
JP3045089B2 (en) Device package structure and method of manufacturing the same
JPH08148603A (en) Ball grid array type semiconductor device and manufacture thereof
JPH03136355A (en) Semiconductor device with heat sink
JPS63226948A (en) Hybrid integrated device
WO2020037858A1 (en) Quartz crystal oscillator and method for manufacturing the quartz crystal oscillator
JPS6118008Y2 (en)
JPS63208250A (en) Package structure of integrated circuit
JP3274661B2 (en) Semiconductor device
JPS638138Y2 (en)
JPS6234455Y2 (en)
JPS6329555A (en) Sealed electronic device
JPH069510Y2 (en) Package for semiconductor device with reference hole
JPH0638432Y2 (en) Semiconductor hermetically sealed package
JPS6393136A (en) Transistor device
JPH0126538B2 (en)
JPS5949695B2 (en) Manufacturing method for glass-sealed semiconductor devices
JPS5841653Y2 (en) airtight terminal
JPS60186041A (en) Hermetic seal structure of integrated circuit
JPS6235544A (en) Resin-sealed semiconductor device
JP2753363B2 (en) Semiconductor device
JPS6077444A (en) Semiconductor device
JP2000268808A (en) Terminal part for lead battery
JPS59181558A (en) Semiconductor device
JPH01125960A (en) Manufacture of semiconductor device
JPS60223142A (en) Semiconductor device