JPS5954974U - Printed board - Google Patents
Printed boardInfo
- Publication number
- JPS5954974U JPS5954974U JP14866182U JP14866182U JPS5954974U JP S5954974 U JPS5954974 U JP S5954974U JP 14866182 U JP14866182 U JP 14866182U JP 14866182 U JP14866182 U JP 14866182U JP S5954974 U JPS5954974 U JP S5954974U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- board section
- pattern forming
- forming surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Combinations Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来例を示す要部平面図、第２図は同じく半田
ブリッジ形成状態を示す要部縦断面図である。第３図な
いし第６図は本考案の一実施例を示すものであり、第３
図はプリント基板の外観斜視図、第４図は接続用ランド
と接続孔を重ねる状態の部分斜視図、第５図はその重ね
合せ状態を示す部分平面図、第６図は半田ディツプを施
した状態を示す部分縦断面図である。FIG. 1 is a plan view of a main part showing a conventional example, and FIG. 2 is a longitudinal cross-sectional view of a main part showing a solder bridge formation state. Figures 3 to 6 show one embodiment of the present invention.
The figure is a perspective view of the external appearance of the printed circuit board, Figure 4 is a partial perspective view of the connection land and connection hole overlapped, Figure 5 is a partial plan view showing the overlapping state, and Figure 6 is the solder dip applied. FIG. 3 is a partial vertical cross-sectional view showing the state.
Claims (1)
ンドを設け、第２のプリント基板部の配線パターン形成
面に接続用ランドを設けるとともに該接続用ランドの外
周の一部と交叉する形で接続孔を穿設し、上記第１のプ
リント基板部の配線パターン形成面上に第２のプリント
基板部を載置して第２のプリント基板部のパターン形成
面が最外部に位置するようになすとともに上記第１のプ
リント基板部に設けられる接続用ランドと上記第２のプ
リント基板部に設けられる接続孔とを重ね合せて接合し
、上記各プリント基板部の接続用ランド間を半田付して
１、上、記各プリント基板部を接続するようにしたこと
を特徴とするプリント基板。A connecting land is provided on the wiring pattern forming surface of the first printed circuit board section, and a connecting land is provided on the wiring pattern forming surface of the second printed circuit board section, and intersects with a part of the outer periphery of the connecting land. A connection hole is formed, and a second printed circuit board section is placed on the wiring pattern forming surface of the first printed circuit board section so that the pattern forming surface of the second printed circuit board section is located at the outermost side. At the same time, the connection land provided on the first printed circuit board section and the connection hole provided on the second printed circuit board section are overlapped and joined, and the connection lands of each of the above printed circuit board sections are soldered. 1. A printed circuit board, characterized in that each of the printed circuit board sections described above is connected to each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14866182U JPS5954974U (en) | 1982-09-30 | 1982-09-30 | Printed board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14866182U JPS5954974U (en) | 1982-09-30 | 1982-09-30 | Printed board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5954974U true JPS5954974U (en) | 1984-04-10 |
Family
ID=30330222
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14866182U Pending JPS5954974U (en) | 1982-09-30 | 1982-09-30 | Printed board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5954974U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016528725A (en) * | 2013-07-24 | 2016-09-15 | エルジー ディスプレイ カンパニー リミテッド | Method for manufacturing structure of flexible printed circuit board |
-
1982
- 1982-09-30 JP JP14866182U patent/JPS5954974U/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016528725A (en) * | 2013-07-24 | 2016-09-15 | エルジー ディスプレイ カンパニー リミテッド | Method for manufacturing structure of flexible printed circuit board |
| US10206290B2 (en) | 2013-07-24 | 2019-02-12 | Lg Display Co., Ltd. | Method for manufacturing structure for flexible printed circuit boards |
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