JPS593628Y2 - クロックパルス発振器 - Google Patents

クロックパルス発振器

Info

Publication number
JPS593628Y2
JPS593628Y2 JP1977172651U JP17265177U JPS593628Y2 JP S593628 Y2 JPS593628 Y2 JP S593628Y2 JP 1977172651 U JP1977172651 U JP 1977172651U JP 17265177 U JP17265177 U JP 17265177U JP S593628 Y2 JPS593628 Y2 JP S593628Y2
Authority
JP
Japan
Prior art keywords
pulse
gate
input
oscillator
clock pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1977172651U
Other languages
English (en)
Japanese (ja)
Other versions
JPS5389150U (mo
Inventor
トーマス・マツクストン・クローフオード
Original Assignee
横河・ヒュ−レット・パッカ−ド株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 横河・ヒュ−レット・パッカ−ド株式会社 filed Critical 横河・ヒュ−レット・パッカ−ド株式会社
Publication of JPS5389150U publication Critical patent/JPS5389150U/ja
Application granted granted Critical
Publication of JPS593628Y2 publication Critical patent/JPS593628Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H04L7/0276—Self-sustaining, e.g. by tuned delay line and a feedback path to a logical gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP1977172651U 1976-12-21 1977-12-21 クロックパルス発振器 Expired JPS593628Y2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB53391/76A GB1570207A (en) 1976-12-21 1976-12-21 Oscillator circuit

Publications (2)

Publication Number Publication Date
JPS5389150U JPS5389150U (mo) 1978-07-21
JPS593628Y2 true JPS593628Y2 (ja) 1984-02-01

Family

ID=10467639

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1977172651U Expired JPS593628Y2 (ja) 1976-12-21 1977-12-21 クロックパルス発振器

Country Status (2)

Country Link
JP (1) JPS593628Y2 (mo)
GB (1) GB1570207A (mo)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4523158A (en) * 1983-02-02 1985-06-11 Rca Corporation Clock regenerator using two on-off oscillators
US4646030A (en) * 1986-03-03 1987-02-24 Tektronix, Inc. Triggered frequency locked oscillator having programmable delay circuit
US4887051A (en) * 1989-01-23 1989-12-12 Autek Systems Corporation Low phase jitter oscillator

Also Published As

Publication number Publication date
JPS5389150U (mo) 1978-07-21
GB1570207A (en) 1980-06-25

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