JPS59217335A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS59217335A
JPS59217335A JP9063983A JP9063983A JPS59217335A JP S59217335 A JPS59217335 A JP S59217335A JP 9063983 A JP9063983 A JP 9063983A JP 9063983 A JP9063983 A JP 9063983A JP S59217335 A JPS59217335 A JP S59217335A
Authority
JP
Japan
Prior art keywords
solder
volume
powder
semiconductor device
aluminum powder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9063983A
Other languages
English (en)
Inventor
Atsushi Tanaka
篤 田中
Hiroyuki Baba
博之 馬場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Components Co Ltd
Original Assignee
Toshiba Corp
Toshiba Components Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Components Co Ltd filed Critical Toshiba Corp
Priority to JP9063983A priority Critical patent/JPS59217335A/ja
Publication of JPS59217335A publication Critical patent/JPS59217335A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 ［発明の技術分Ｗｆ］ この発明は子導体装置にかかり、特に素子台床ｌ二手導
体素子を接合するろう層の熱伝導を向上させ、放熱特性
のすぐれた半導体装置を提供する。
［発明の技術的背景］ 一例の半導体装置Ｃ二おける高出力用半導体装置の一部
の構造を第１図に示す図において（１）は半導体素子で
、例えば銅のような熱伝導の良好な金属で形成された素
子台床（２）にろう層（８）を介して接合されている。
なお、（１α）は半導体素子の配設側主面のめつきニッ
ケル層、（２ａ）は素子台床（２）の半導体素子配設側
主面に形成されためっきニッケル層である。上配ろう層
Ｃ二は従来、金共晶を主成分とする金・すす、金・シリ
コン系と、鉛を主成分とする鉛・すす系、すずを主成分
とするすす系などのはんだが用いられていた。
［背景技術の問題点］ 叙上の背景技術には次の問題がある。
まず、金共晶系の接合は放熱特性では優れているが、半
導体素子のチップサイズが例えば２１１Ｍ角を超える大
型になると、熱歪によるクラックを生じやすくなる。こ
れを防止するため、従来はタングステン、モリブデンな
どの低い熱膨張率の板材を補償板として用いることによ
って応力を緩和する手段が講ぜられていたが、接合材、
熱補償板のいずれも高価である問題点がある。
次の鉛・すす系、およびすす系の接合は上記金共晶に比
し、チップクラックやコストについ【は有利であるが、
放熱特性において劣っており、熱抵抗値が大であること
から安全動作領域（ＡＳＯ）が狭い。この安全動作領域
は接合温度の上昇とともＣ１狭くなるもので、高出力用
半導体装置では特ｇユ重要な定格であり、これが狭いこ
とは重大な問題である。
［発明の目的］ この発明は上記従来の問題点（二対処し、チップクラッ
クを低減し放熱特性のすぐれた半導体装置の構造を提供
する。
［発明の概要］ この発明にかかる半導体装置は半導体素子を素子台床に
接合するろう層がすずまたは鉛を主成分どするはん７社
にこれよりも熱伝導率の高い金属の粉体を含有させたも
のであることを特徴とする。
［発明の実施例］ 次■二この発明を１実施例につき図面を参照して詳細（
１説１夕」する。−例の高出力半導体装置の一部を示す
第２図ｆ二おいて、半導体素子（１）とこれが接合され
る素子台床（２）は従来と変わらないので、第１図で示
したものと同じ符号を付して示し説明を省略する。
ろう層＠は鉛・すず（３７％）ｉ−１んだ（１１α）（
−１粒径０．１〜１０，０μφのアルミニウム粉体（１
１４）を体積パーセントで０．１．０．５．０．１０．
０．２０．０．３０．０゜４０．０．５０．０．６０．
０の各パーセントで配合含有させて９種類を形成し、夫
々によって素子台床に半導体素子を接合したものについ
て熱抵抗値を測定した。その測定結果は第３図に示すよ
う（二、アルミニウム粉体の配合率が体積パーセントで
５％以上で熱抵抗（’Ｃ／ｗ　）は顕著に低減し、従来
を示す０チ、５チ未満の配合率とは明Ｍｔｉｔ二判別で
きる。
次に上記９種類の半導体装置によって温度変化△’ｒｃ
＝　１００℃で熱抵抗の変゛化率が１．５倍以上のもの
を不良として熱疲労試験を行ない、第４図に示す結果が
得られた。同図はアルミニウム粉体の配合率と不良発生
率との相関を示し、効果が顕著なアルミニウム粉体の配
合率の範囲は体積パーセントで４０．０％未満であるこ
とが確認できた。
叙上の両データを合わせて鑑みると、はんだｉ二配合さ
れるアルミニウム粉体の配合率は体積パーセントで５．
０〜４０．０％の範囲が好適であると判断された。
［発明の効果］ この発明によれば、鉛・すす系、またはすす系のはんだ
材に比し放熱特性が優れている上（二、金共晶系の接合
材にみられるチップクラックのない半導体装置を得るこ
とができる顕著な利点がある。
そして、この発明は一般の半導体装置はもとより、高出
力用半導体装置に用いられて著効がある。
次Ｃ二、はん１ビ【−配合される金属粉体はアルミニウ
ムｆ−限られることなくはんだの主成分の鉛またはずす
よりも熱伝導率の大きい金属を選んで適用でき、熱伝導
率の大きい金属はど効果は太きい。
【図面の簡単な説明】
第１図は従来の半導体装置の一部を示す断面図、第２図
はこの発明の１実施物」の半導体装置の一部を示す断面
図、第３図は従来の半導体装置と１実施例の半導体装置
の熱抵抗の分布を示す線図、カ４図は熱疲労試験の成績
を示す線図である。 １　−、−−−−半導体素子 １α　−一〜−−半尋体素子のめつきニッケル層２　−
−−−−−−素子台床 ２α　−一一一〜−−素子台床のめつきニッケル層１１
−−−−−−−−ろう層　　１１．２−−−−−−−は
んだ１１４−−−−−一一アルミニウム粉体代理人弁理
士　井　上　−男

Claims (1)

    【特許請求の範囲】
  1. 半導体素子が素子台床にろう層を介して接合された半導
    体装Ｍｌ二おいて、ろう層がすずまたは鉛を生成分とす
    るはんだにこれよりも熱伝導率の高い金属の粉体な含有
    させたものであることを特徴とする半導体装置。
JP9063983A 1983-05-25 1983-05-25 半導体装置 Pending JPS59217335A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9063983A JPS59217335A (ja) 1983-05-25 1983-05-25 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9063983A JPS59217335A (ja) 1983-05-25 1983-05-25 半導体装置

Publications (1)

Publication Number Publication Date
JPS59217335A true JPS59217335A (ja) 1984-12-07

Family

ID=14004067

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9063983A Pending JPS59217335A (ja) 1983-05-25 1983-05-25 半導体装置

Country Status (1)

Country Link
JP (1) JPS59217335A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4870083A (en) * 1987-11-24 1989-09-26 Merrell Dow Pharmaceuticals Inc. 1,4-Disubstituted-piperidinyl compounds useful as analgesics and muscle relaxants
JPH02207539A (ja) * 1989-02-07 1990-08-17 Sanken Electric Co Ltd 半導体装置
KR100695116B1 (ko) * 2004-12-27 2007-03-14 삼성전기주식회사 디바이스 패키지용 솔더

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4870083A (en) * 1987-11-24 1989-09-26 Merrell Dow Pharmaceuticals Inc. 1,4-Disubstituted-piperidinyl compounds useful as analgesics and muscle relaxants
JPH02207539A (ja) * 1989-02-07 1990-08-17 Sanken Electric Co Ltd 半導体装置
KR100695116B1 (ko) * 2004-12-27 2007-03-14 삼성전기주식회사 디바이스 패키지용 솔더

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