JPS59202642A - 混成集積回路装置の製造方法 - Google Patents

混成集積回路装置の製造方法

Info

Publication number
JPS59202642A
JPS59202642A JP7793683A JP7793683A JPS59202642A JP S59202642 A JPS59202642 A JP S59202642A JP 7793683 A JP7793683 A JP 7793683A JP 7793683 A JP7793683 A JP 7793683A JP S59202642 A JPS59202642 A JP S59202642A
Authority
JP
Japan
Prior art keywords
resin
chip
substrate
nitrogen gas
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7793683A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0367337B2 (enrdf_load_stackoverflow
Inventor
Koji Tanaka
幸二 田中
Chikashi Ito
史 伊藤
Toshio Sonobe
園部 俊夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP7793683A priority Critical patent/JPS59202642A/ja
Publication of JPS59202642A publication Critical patent/JPS59202642A/ja
Publication of JPH0367337B2 publication Critical patent/JPH0367337B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP7793683A 1983-05-02 1983-05-02 混成集積回路装置の製造方法 Granted JPS59202642A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7793683A JPS59202642A (ja) 1983-05-02 1983-05-02 混成集積回路装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7793683A JPS59202642A (ja) 1983-05-02 1983-05-02 混成集積回路装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59202642A true JPS59202642A (ja) 1984-11-16
JPH0367337B2 JPH0367337B2 (enrdf_load_stackoverflow) 1991-10-22

Family

ID=13647960

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7793683A Granted JPS59202642A (ja) 1983-05-02 1983-05-02 混成集積回路装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59202642A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61177738A (ja) * 1985-01-28 1986-08-09 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 相互接続体
JPS62116542U (enrdf_load_stackoverflow) * 1986-01-17 1987-07-24
JPH01132129A (ja) * 1987-11-18 1989-05-24 Sanyo Electric Co Ltd 混成集積回路の製造方法
US6376915B1 (en) 1999-02-26 2002-04-23 Rohm Co., Ltd Semiconductor device and semiconductor chip

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5232554A (en) * 1975-09-05 1977-03-11 Int Standard Electric Corp Ac generating electronic unit
JPS5831539A (ja) * 1981-08-19 1983-02-24 Nec Corp 混成集積回路の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5232554A (en) * 1975-09-05 1977-03-11 Int Standard Electric Corp Ac generating electronic unit
JPS5831539A (ja) * 1981-08-19 1983-02-24 Nec Corp 混成集積回路の製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61177738A (ja) * 1985-01-28 1986-08-09 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 相互接続体
JPS62116542U (enrdf_load_stackoverflow) * 1986-01-17 1987-07-24
JPH01132129A (ja) * 1987-11-18 1989-05-24 Sanyo Electric Co Ltd 混成集積回路の製造方法
US6376915B1 (en) 1999-02-26 2002-04-23 Rohm Co., Ltd Semiconductor device and semiconductor chip

Also Published As

Publication number Publication date
JPH0367337B2 (enrdf_load_stackoverflow) 1991-10-22

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