JPS59201296A - Ｅｃｃ付メモリの誤り訂正チエツク方式 - Google Patents

Ｅｃｃ付メモリの誤り訂正チエツク方式

Info

Publication number
JPS59201296A
JPS59201296A JP58075277A JP7527783A JPS59201296A JP S59201296 A JPS59201296 A JP S59201296A JP 58075277 A JP58075277 A JP 58075277A JP 7527783 A JP7527783 A JP 7527783A JP S59201296 A JPS59201296 A JP S59201296A
Authority
JP
Japan
Prior art keywords
data
error
memory
ecc
check
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58075277A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6240742B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Katsuyuki Iwata
勝行 岩田
Kazuhiro Hara
一広 原
Noriyuki Toyoki
豊木　則行
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58075277A priority Critical patent/JPS59201296A/ja
Publication of JPS59201296A publication Critical patent/JPS59201296A/ja
Publication of JPS6240742B2 publication Critical patent/JPS6240742B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP58075277A 1983-04-28 1983-04-28 Ｅｃｃ付メモリの誤り訂正チエツク方式 Granted JPS59201296A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58075277A JPS59201296A (ja) 1983-04-28 1983-04-28 Ｅｃｃ付メモリの誤り訂正チエツク方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58075277A JPS59201296A (ja) 1983-04-28 1983-04-28 Ｅｃｃ付メモリの誤り訂正チエツク方式

Publications (2)

Publication Number Publication Date
JPS59201296A true JPS59201296A (ja) 1984-11-14
JPS6240742B2 JPS6240742B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1987-08-29

Family

ID=13571570

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58075277A Granted JPS59201296A (ja) 1983-04-28 1983-04-28 Ｅｃｃ付メモリの誤り訂正チエツク方式

Country Status (1)

Country Link
JP (1) JPS59201296A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61139857A (ja) * 1984-12-12 1986-06-27 Fujitsu Ltd メモリ回路の検査方式
JP2010003348A (ja) * 2008-06-19 2010-01-07 Toshiba Corp 半導体記憶装置及び誤り訂正方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5427342A (en) * 1977-08-02 1979-03-01 Nippon Telegr & Teleph Corp <Ntt> Mic-formed bridge t-type constant resistance circuit
JPS5690500A (en) * 1979-12-25 1981-07-22 Toshiba Corp Semiconductor memory device
JPS57208699A (en) * 1981-06-19 1982-12-21 Fujitsu Ltd Storage device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5427342A (en) * 1977-08-02 1979-03-01 Nippon Telegr & Teleph Corp <Ntt> Mic-formed bridge t-type constant resistance circuit
JPS5690500A (en) * 1979-12-25 1981-07-22 Toshiba Corp Semiconductor memory device
JPS57208699A (en) * 1981-06-19 1982-12-21 Fujitsu Ltd Storage device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61139857A (ja) * 1984-12-12 1986-06-27 Fujitsu Ltd メモリ回路の検査方式
JP2010003348A (ja) * 2008-06-19 2010-01-07 Toshiba Corp 半導体記憶装置及び誤り訂正方法

Also Published As

Publication number Publication date
JPS6240742B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1987-08-29

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