JPS59198052A - 位相同期回路 - Google Patents

位相同期回路

Info

Publication number
JPS59198052A
JPS59198052A JP7220183A JP7220183A JPS59198052A JP S59198052 A JPS59198052 A JP S59198052A JP 7220183 A JP7220183 A JP 7220183A JP 7220183 A JP7220183 A JP 7220183A JP S59198052 A JPS59198052 A JP S59198052A
Authority
JP
Japan
Prior art keywords
phase
signals
complex multiplier
circuit
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7220183A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0151110B2 (https=
Inventor
Tomohiko Taniguchi
智彦 谷口
Shigeyuki Umigami
重之 海上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7220183A priority Critical patent/JPS59198052A/ja
Publication of JPS59198052A publication Critical patent/JPS59198052A/ja
Publication of JPH0151110B2 publication Critical patent/JPH0151110B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/02—Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
    • H04L27/06—Demodulator circuits; Receiver circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
JP7220183A 1983-04-26 1983-04-26 位相同期回路 Granted JPS59198052A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7220183A JPS59198052A (ja) 1983-04-26 1983-04-26 位相同期回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7220183A JPS59198052A (ja) 1983-04-26 1983-04-26 位相同期回路

Publications (2)

Publication Number Publication Date
JPS59198052A true JPS59198052A (ja) 1984-11-09
JPH0151110B2 JPH0151110B2 (https=) 1989-11-01

Family

ID=13482378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7220183A Granted JPS59198052A (ja) 1983-04-26 1983-04-26 位相同期回路

Country Status (1)

Country Link
JP (1) JPS59198052A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6046618A (en) * 1997-05-12 2000-04-04 Samsung Electronics Co., Ltd. Phase correction circuit and method therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6046618A (en) * 1997-05-12 2000-04-04 Samsung Electronics Co., Ltd. Phase correction circuit and method therefor

Also Published As

Publication number Publication date
JPH0151110B2 (https=) 1989-11-01

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