JPS59178843A - ル−プネツトワ−クにおける優先権制御方式 - Google Patents
ル−プネツトワ−クにおける優先権制御方式Info
- Publication number
- JPS59178843A JPS59178843A JP58054117A JP5411783A JPS59178843A JP S59178843 A JPS59178843 A JP S59178843A JP 58054117 A JP58054117 A JP 58054117A JP 5411783 A JP5411783 A JP 5411783A JP S59178843 A JPS59178843 A JP S59178843A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- priority
- transmission
- circuit
- loop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005540 biological transmission Effects 0.000 claims abstract description 51
- 244000144992 flock Species 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 3
- 239000000872 buffer Substances 0.000 abstract description 15
- 238000001514 detection method Methods 0.000 description 10
- 238000011144 upstream manufacturing Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/42—Loop networks
- H04L12/427—Loop networks with decentralised control
- H04L12/433—Loop networks with decentralised control with asynchronous transmission, e.g. token ring, register insertion
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Small-Scale Networks (AREA)
- Communication Control (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58054117A JPS59178843A (ja) | 1983-03-30 | 1983-03-30 | ル−プネツトワ−クにおける優先権制御方式 |
DE8383112151T DE3382313D1 (de) | 1982-12-03 | 1983-12-02 | Ringnetzsystem gesteuert durch eine einfache taktstation. |
CA000442460A CA1201784A (en) | 1982-12-03 | 1983-12-02 | Loop network system controlled by a simple clock station |
EP83112151A EP0111277B1 (en) | 1982-12-03 | 1983-12-02 | Loop network system controlled by a simple clock station |
US06/824,035 US4627051A (en) | 1982-12-03 | 1986-01-30 | Loop network system controlled by a simple clock station |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58054117A JPS59178843A (ja) | 1983-03-30 | 1983-03-30 | ル−プネツトワ−クにおける優先権制御方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59178843A true JPS59178843A (ja) | 1984-10-11 |
JPH0550175B2 JPH0550175B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1993-07-28 |
Family
ID=12961650
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58054117A Granted JPS59178843A (ja) | 1982-12-03 | 1983-03-30 | ル−プネツトワ−クにおける優先権制御方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59178843A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01112846A (ja) * | 1987-10-26 | 1989-05-01 | Nec Corp | 伝送路アクセス制御回路 |
-
1983
- 1983-03-30 JP JP58054117A patent/JPS59178843A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01112846A (ja) * | 1987-10-26 | 1989-05-01 | Nec Corp | 伝送路アクセス制御回路 |
Also Published As
Publication number | Publication date |
---|---|
JPH0550175B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1993-07-28 |